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dubhe: glibc: Update recipe and added patches

Update glibc recipe make CFLAGS, ASFLAGS parameter and added patches.

Signed-off-by: yang.lee <yang.lee@starfivetech.com>
yang.lee 1 year ago
parent
commit
5d19833dde

+ 245 - 0
recipes-core/glibc/glibc/0001-RISCV-enable-align-loops-8-for-optimized-func.patch

@@ -0,0 +1,245 @@
+From 1199d8653f9c8e6f7d197a040f83e6374bcb376c Mon Sep 17 00:00:00 2001
+From: "demin.han" <demin.han@starfivetech.com>
+Date: Wed, 15 Mar 2023 15:29:14 +0800
+Subject: [PATCH 1/2] [RISCV] enable align-loops=8 for optimized func
+
+---
+ sysdeps/riscv/rv64/multiarch/memchr_as.S  | 1 +
+ sysdeps/riscv/rv64/multiarch/memcmp_as.S  | 6 ++----
+ sysdeps/riscv/rv64/multiarch/memcpy_as.S  | 2 ++
+ sysdeps/riscv/rv64/multiarch/memmove_as.S | 6 ++++--
+ sysdeps/riscv/rv64/multiarch/memrchr.S    | 1 +
+ sysdeps/riscv/rv64/multiarch/memset_as.S  | 2 +-
+ sysdeps/riscv/rv64/multiarch/strcmp_as.S  | 2 +-
+ sysdeps/riscv/rv64/multiarch/strlen_as.S  | 2 +-
+ sysdeps/riscv/rv64/strchr.S               | 1 +
+ sysdeps/riscv/rv64/strchrnul.S            | 1 +
+ sysdeps/riscv/rv64/strncmp.S              | 1 +
+ sysdeps/riscv/rv64/strnlen.S              | 2 +-
+ 12 files changed, 17 insertions(+), 10 deletions(-)
+
+diff --git a/sysdeps/riscv/rv64/multiarch/memchr_as.S b/sysdeps/riscv/rv64/multiarch/memchr_as.S
+index 4d3221c60e..1294562e1b 100644
+--- a/sysdeps/riscv/rv64/multiarch/memchr_as.S
++++ b/sysdeps/riscv/rv64/multiarch/memchr_as.S
+@@ -55,6 +55,7 @@ ENTRY (__memchr)
+     slli    a3, a1, 32
+     or      a1, a1, a3
+     li      a5, -1
++    .p2align 3
+ .L_loop:
+     ld      a3, 0(a0)
+     xor     a3, a3, a1
+diff --git a/sysdeps/riscv/rv64/multiarch/memcmp_as.S b/sysdeps/riscv/rv64/multiarch/memcmp_as.S
+index 972f6cb5fd..8e8fd680d6 100644
+--- a/sysdeps/riscv/rv64/multiarch/memcmp_as.S
++++ b/sysdeps/riscv/rv64/multiarch/memcmp_as.S
+@@ -57,6 +57,7 @@ ENTRY (memcmp)
+     andi    t5, a1, 0x7
+     andi    a2, a2, (16-1)
+     bnez    t5, .L_merge
++    .p2align 3
+ .L_loop:
+     ld      a3, 0(a1)
+     ld      a0, 0(a5)
+@@ -99,9 +100,6 @@ ENTRY (memcmp)
+     li      a0, 0
+     ret
+ 
+-    .balign 4
+-    .option push
+-    .option norvc
+ .L_merge:
+     andi    a1, a1, -8
+     ld      t2, 0(a1)
+@@ -109,6 +107,7 @@ ENTRY (memcmp)
+     neg     t4, t3
+     andi    t4, t4, (64 - 1)
+     srl     t1, t2, t3
++    .p2align 3
+ 1:
+     ld      t2, 8(a1)
+     sll     a3, t2, t4
+@@ -123,7 +122,6 @@ ENTRY (memcmp)
+     ld      a0, 8(a5)
+     bne     a3, a0, .L_end
+     srl     t1, t2, t3
+-    .option pop
+ 
+     addi    a5, a5, 16
+     addi    a1, a1, 16
+diff --git a/sysdeps/riscv/rv64/multiarch/memcpy_as.S b/sysdeps/riscv/rv64/multiarch/memcpy_as.S
+index fae522684c..35419d2f9f 100644
+--- a/sysdeps/riscv/rv64/multiarch/memcpy_as.S
++++ b/sysdeps/riscv/rv64/multiarch/memcpy_as.S
+@@ -78,6 +78,7 @@ ENTRY (memcpy)
+     andi    a4, a2, -32
+     beqz    a4, .L_tail
+     add     a4, a4, a5
++    .p2align  3
+ .L_loop:
+     copy_32B a5, a1
+     addi    a5, a5, 32
+@@ -121,6 +122,7 @@ ENTRY (memcpy)
+     neg     t4, t3
+     andi    t4, t4, (64 - 1)
+     srl     t1, t2, t3
++    .p2align 3
+ 1:
+     ld      t2, 8(a1)
+     sll     a3, t2, t4
+diff --git a/sysdeps/riscv/rv64/multiarch/memmove_as.S b/sysdeps/riscv/rv64/multiarch/memmove_as.S
+index 35d0905186..b859f9778d 100644
+--- a/sysdeps/riscv/rv64/multiarch/memmove_as.S
++++ b/sysdeps/riscv/rv64/multiarch/memmove_as.S
+@@ -58,6 +58,7 @@ ENTRY (memmove)
+     andi    a2, a2, (32 - 1)
+     beqz    a4, .L_8B_fwd
+     add     a4, a4, a5
++    .p2align 3
+ 0:
+     ld      a3, 0(a1)
+     sd      a3, 0(a5)
+@@ -102,7 +103,6 @@ ENTRY (memmove)
+ .L_ret_fwd:
+     ret
+ 
+-    .balign 4
+ .L_merge_fwd:
+     andi    a4, a2, -8
+     beqz    a4, .L_byte_tail_fwd
+@@ -113,6 +113,7 @@ ENTRY (memmove)
+     neg     t4, t3
+     andi    t4, t4, (64 - 1)
+     srl     t1, t2, t3
++    .p2align 3
+ 1:
+     ld      t2, 8(a1)
+     sll     a3, t2, t4
+@@ -149,6 +150,7 @@ ENTRY (memmove)
+     andi    a2, a2, (32 - 1)
+     beqz    a4, .L_8B_bwd
+     sub     a4, a5, a4
++    .p2align 3
+ 0:
+     addi    a5, a5, -32
+     addi    a1, a1, -32
+@@ -193,7 +195,6 @@ ENTRY (memmove)
+ .L_ret_bwd:
+     ret
+ 
+-    .balign 4
+ .L_merge_bwd:
+     andi    a4, a2, -8
+     beqz    a4, .L_byte_tail_bwd
+@@ -204,6 +205,7 @@ ENTRY (memmove)
+     neg     t4, t3
+     andi    t4, t4, (64 - 1)
+     sll     t1, t2, t4
++    .p2align 3
+ 1:
+     ld      t2, -8(a1)
+     srl     a3, t2, t3
+diff --git a/sysdeps/riscv/rv64/multiarch/memrchr.S b/sysdeps/riscv/rv64/multiarch/memrchr.S
+index b72a13e62a..223db0702a 100644
+--- a/sysdeps/riscv/rv64/multiarch/memrchr.S
++++ b/sysdeps/riscv/rv64/multiarch/memrchr.S
+@@ -59,6 +59,7 @@ ENTRY (MEMRCHR)
+     slli    a3, a1, 32
+     or      a1, a1, a3
+     li      a5, -1
++    .p2align 3
+ .L_loop:
+     ld      a3, -8(a0)
+     xor     a3, a3, a1
+diff --git a/sysdeps/riscv/rv64/multiarch/memset_as.S b/sysdeps/riscv/rv64/multiarch/memset_as.S
+index 455033adf0..0793237051 100644
+--- a/sysdeps/riscv/rv64/multiarch/memset_as.S
++++ b/sysdeps/riscv/rv64/multiarch/memset_as.S
+@@ -63,7 +63,7 @@ ENTRY (memset)
+     andi    a4, a2, -64
+     beqz    a4, .L_tail
+     add     a4, a4, a5
+-
++    .p2align 3
+ .L_loop:
+     sd      a1, 0(a5)
+     sd      a1, 8(a5)
+diff --git a/sysdeps/riscv/rv64/multiarch/strcmp_as.S b/sysdeps/riscv/rv64/multiarch/strcmp_as.S
+index 40bdbfef08..e23eb9f74c 100644
+--- a/sysdeps/riscv/rv64/multiarch/strcmp_as.S
++++ b/sysdeps/riscv/rv64/multiarch/strcmp_as.S
+@@ -57,7 +57,7 @@ ENTRY (strcmp)
+       ret
+     .endif
+   .endm
+-
++.p2align 3
+ .Lloop:
+   add   a0, a0, N*8
+   add   a1, a1, N*8
+diff --git a/sysdeps/riscv/rv64/multiarch/strlen_as.S b/sysdeps/riscv/rv64/multiarch/strlen_as.S
+index 862f5ebb72..9601ab2b11 100644
+--- a/sysdeps/riscv/rv64/multiarch/strlen_as.S
++++ b/sysdeps/riscv/rv64/multiarch/strlen_as.S
+@@ -36,7 +36,7 @@ ENTRY (strlen)
+   addi  a3, a1, 8
+   li    a4, -1
+ 
+-  .align 2
++  .p2align 3
+ .Lloop:
+   ld    a2, 8(a1)
+   addi  a1, a1, 8
+diff --git a/sysdeps/riscv/rv64/strchr.S b/sysdeps/riscv/rv64/strchr.S
+index 2d108800c1..dfeec6da7e 100644
+--- a/sysdeps/riscv/rv64/strchr.S
++++ b/sysdeps/riscv/rv64/strchr.S
+@@ -41,6 +41,7 @@ ENTRY (strchr)
+ 
+   li    a5, -1
+   addi  a0, a0, -8
++  .p2align 3
+ .Lloop:
+   addi  a0, a0, 8
+   ld    a2, 0(a0)
+diff --git a/sysdeps/riscv/rv64/strchrnul.S b/sysdeps/riscv/rv64/strchrnul.S
+index 3e48445f11..6cf125cf46 100644
+--- a/sysdeps/riscv/rv64/strchrnul.S
++++ b/sysdeps/riscv/rv64/strchrnul.S
+@@ -41,6 +41,7 @@ ENTRY (__strchrnul)
+ 
+   li    a5, -1
+   addi  a0, a0, -8
++  .p2align 3
+ .Lloop:
+   addi  a0, a0, 8
+   ld    a2, 0(a0)
+diff --git a/sysdeps/riscv/rv64/strncmp.S b/sysdeps/riscv/rv64/strncmp.S
+index 85245df98d..200bee4fe1 100644
+--- a/sysdeps/riscv/rv64/strncmp.S
++++ b/sysdeps/riscv/rv64/strncmp.S
+@@ -27,6 +27,7 @@ ENTRY (strncmp)
+   beqz  a4, .Lenter
+   j     .Lmisaligned
+ 
++  .p2align 3
+ .Lloop:
+   addi  a0, a0, 8
+   addi  a1, a1, 8
+diff --git a/sysdeps/riscv/rv64/strnlen.S b/sysdeps/riscv/rv64/strnlen.S
+index 73757b69f2..502f108710 100644
+--- a/sysdeps/riscv/rv64/strnlen.S
++++ b/sysdeps/riscv/rv64/strnlen.S
+@@ -37,7 +37,7 @@ ENTRY (__strnlen)
+   beqz  a4, .Llenth
+   addi  a5, a5, 1
+   j     .Lmisaligned  
+-
++.p2align 3
+ .Laligned:
+   addi  a5, a5, 8
+   addi  a1, a1, -8
+-- 
+2.25.1
+

+ 297 - 0
recipes-core/glibc/glibc/0002-RISCV-revert-strchrnul-strncmp-strnlen.patch

@@ -0,0 +1,297 @@
+From 0dfcc83599765108e12ab6630a16bd27adae2b6a Mon Sep 17 00:00:00 2001
+From: "max.ma" <max.ma@starfivetech.com>
+Date: Thu, 16 Mar 2023 00:22:15 -0700
+Subject: [PATCH 2/2] [RISCV] revert strchrnul/strncmp/strnlen
+
+---
+ .../riscv/rv64/multiarch/ifunc-impl-list.c    | 11 ---
+ sysdeps/riscv/rv64/multiarch/rtld-strchrnul.S |  1 -
+ sysdeps/riscv/rv64/multiarch/rtld-strncmp.S   |  1 -
+ sysdeps/riscv/rv64/strchrnul.S                | 80 -------------------
+ sysdeps/riscv/rv64/strncmp.S                  | 74 -----------------
+ sysdeps/riscv/rv64/strnlen.S                  | 65 ---------------
+ 6 files changed, 232 deletions(-)
+ delete mode 100644 sysdeps/riscv/rv64/multiarch/rtld-strchrnul.S
+ delete mode 100644 sysdeps/riscv/rv64/multiarch/rtld-strncmp.S
+ delete mode 100644 sysdeps/riscv/rv64/strchrnul.S
+ delete mode 100644 sysdeps/riscv/rv64/strncmp.S
+ delete mode 100644 sysdeps/riscv/rv64/strnlen.S
+
+diff --git a/sysdeps/riscv/rv64/multiarch/ifunc-impl-list.c b/sysdeps/riscv/rv64/multiarch/ifunc-impl-list.c
+index 7bba6fa30c..07d584deec 100644
+--- a/sysdeps/riscv/rv64/multiarch/ifunc-impl-list.c
++++ b/sysdeps/riscv/rv64/multiarch/ifunc-impl-list.c
+@@ -61,17 +61,6 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
+ 	      IFUNC_IMPL_ADD (array, i, memset, use_rvv, __memset_vector)
+ 	      IFUNC_IMPL_ADD (array, i, memset, 1, __memset_riscv));
+ 
+-  IFUNC_IMPL (i, name, strchr,
+-	      IFUNC_IMPL_ADD (array, i, strchr, use_rvv, __strchr_riscv)
+-	      IFUNC_IMPL_ADD (array, i, strchr, 1, __strchr_riscv));
+-
+-  IFUNC_IMPL (i, name, strchrnul,
+-	      IFUNC_IMPL_ADD (array, i, strchrnul, use_rvv, __strchrnul_riscv)
+-	      IFUNC_IMPL_ADD (array, i, strchrnul, 1, __strchrnul_riscv));
+-
+-  IFUNC_IMPL (i, name, strncmp,
+-	      IFUNC_IMPL_ADD (array, i, strncmp, use_rvv, __strncmp_riscv)
+-	      IFUNC_IMPL_ADD (array, i, strncmp, 1, __strncmp_riscv));
+ #endif
+   return i;
+ }
+diff --git a/sysdeps/riscv/rv64/multiarch/rtld-strchrnul.S b/sysdeps/riscv/rv64/multiarch/rtld-strchrnul.S
+deleted file mode 100644
+index 5799994393..0000000000
+--- a/sysdeps/riscv/rv64/multiarch/rtld-strchrnul.S
++++ /dev/null
+@@ -1 +0,0 @@
+-#include "../strchrnul.S"
+diff --git a/sysdeps/riscv/rv64/multiarch/rtld-strncmp.S b/sysdeps/riscv/rv64/multiarch/rtld-strncmp.S
+deleted file mode 100644
+index c5a02a137c..0000000000
+--- a/sysdeps/riscv/rv64/multiarch/rtld-strncmp.S
++++ /dev/null
+@@ -1 +0,0 @@
+-#include "../strncmp.S"
+diff --git a/sysdeps/riscv/rv64/strchrnul.S b/sysdeps/riscv/rv64/strchrnul.S
+deleted file mode 100644
+index 6cf125cf46..0000000000
+--- a/sysdeps/riscv/rv64/strchrnul.S
++++ /dev/null
+@@ -1,80 +0,0 @@
+-/* The assembly function for strchrnul.  RISC-V version.
+-   Copyright (C) 2018 Free Software Foundation, Inc.
+-   This file is part of the GNU C Library.
+-
+-   The GNU C Library is free software; you can redistribute it and/or
+-   modify it under the terms of the GNU Lesser General Public
+-   License as published by the Free Software Foundation; either
+-   version 2.1 of the License, or (at your option) any later version.
+-
+-   The GNU C Library is distributed in the hope that it will be useful,
+-   but WITHOUT ANY WARRANTY; without even the implied warranty of
+-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+-   Lesser General Public License for more details.
+-
+-   You should have received a copy of the GNU Lesser General Public
+-   License along with the GNU C Library.  If not, see
+-   <http://www.gnu.org/licenses/>.  */
+-
+-#include <sysdep.h>
+-
+-	.p2align 6
+-ENTRY (__strchrnul)
+-  andi  a1, a1, 0xff
+-
+-.Lmisaligned:
+-  andi  a5, a0, 7
+-  beqz  a5, .Laligned
+-  lbu   a5, 0(a0)
+-  beq   a5, a1, .Ldone
+-  beqz  a5, .Ldone
+-  addi  a0, a0, 1
+-  j .Lmisaligned
+-
+-.Laligned:
+-  slli  a5, a1, 0x8
+-  or    a5, a5, a1
+-  slli  t0, a5, 0x10
+-  or    t0, t0, a5
+-  slli  a5, t0, 0x20
+-  or    t0, t0, a5
+-
+-  li    a5, -1
+-  addi  a0, a0, -8
+-  .p2align 3
+-.Lloop:
+-  addi  a0, a0, 8
+-  ld    a2, 0(a0)
+-  orc.b t1, a2
+-  bne   t1, a5, .Lnull
+-  xor   a3, a2, t0
+-  orc.b a3, a3
+-  bne   a3, a5, .Lfind
+-  orc.b a2, a2
+-  beq   a2, a5, .Lloop
+-
+-.Ldone:
+-  ret
+-
+-.Lfind:
+-  not   a3, a3
+-  ctz   a3, a3
+-  srli  a3, a3, 3
+-  add   a0, a0, a3
+-  ret
+-
+-# cases in which a null byte was detected
+-.Lnull:
+-  bne   a2, t0, .Lend
+-  j .Lfind
+-
+-.Lend:
+-  lbu   a5, 0(a0)
+-  beq   a5, a1, .Ldone
+-  beqz  a5, .Ldone
+-  addi  a0, a0, 1
+-  j .Lend
+-
+-END (__strchrnul)
+-weak_alias (__strchrnul,strchrnul)
+-libc_hidden_builtin_def (__strchrnul)
+\ No newline at end of file
+diff --git a/sysdeps/riscv/rv64/strncmp.S b/sysdeps/riscv/rv64/strncmp.S
+deleted file mode 100644
+index 200bee4fe1..0000000000
+--- a/sysdeps/riscv/rv64/strncmp.S
++++ /dev/null
+@@ -1,74 +0,0 @@
+-/* The assembly function for strncmp.  RISC-V version.
+-   Copyright (C) 2018 Free Software Foundation, Inc.
+-   This file is part of the GNU C Library.
+-
+-   The GNU C Library is free software; you can redistribute it and/or
+-   modify it under the terms of the GNU Lesser General Public
+-   License as published by the Free Software Foundation; either
+-   version 2.1 of the License, or (at your option) any later version.
+-
+-   The GNU C Library is distributed in the hope that it will be useful,
+-   but WITHOUT ANY WARRANTY; without even the implied warranty of
+-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+-   Lesser General Public License for more details.
+-
+-   You should have received a copy of the GNU Lesser General Public
+-   License along with the GNU C Library.  If not, see
+-   <http://www.gnu.org/licenses/>.  */
+-
+-#include <sysdep.h>
+-
+-	.p2align 6
+-ENTRY (strncmp)
+-  beqz  a2, .Lequal
+-  or    a4, a0, a1
+-  li    t2, -1
+-  and   a4, a4, 7
+-  beqz  a4, .Lenter
+-  j     .Lmisaligned
+-
+-  .p2align 3
+-.Lloop:
+-  addi  a0, a0, 8
+-  addi  a1, a1, 8
+-  addi  a2, a2, -8
+-
+-.Lenter:
+-  addi  a5, a2, -8
+-  blez  a5, .Lmisaligned
+-  ld    a3, 0(a0)
+-  ld    a4, 0(a1)
+-  orc.b t0, a3
+-  bne   t0, t2, .Lnull
+-  beq   a3, a4, .Lloop
+-  rev8  a6, a3
+-  rev8  a7, a4
+-  bgeu  a6, a7, 1f
+-  li    a0, -1
+-  ret
+-1:
+-  li    a0, 1
+-  ret
+-
+-.Lmisaligned:
+-  blez  a2, .Ldone
+-  lbu   a3, 0(a0)
+-  lbu   a4, 0(a1)
+-  addi  a0, a0, 1
+-  addi  a1, a1, 1
+-  addi  a2, a2, -1
+-  bne   a3, a4, .Ldone
+-  bnez  a3, .Lmisaligned
+-.Ldone:
+-  sub   a0, a3, a4
+-  ret
+-
+-# cases in which a null byte was detected
+-.Lnull:
+-  bne   a3, a4, .Lmisaligned
+-.Lequal:
+-  li    a0, 0
+-  ret
+-
+-END (strncmp)
+-libc_hidden_builtin_def (strncmp)
+\ No newline at end of file
+diff --git a/sysdeps/riscv/rv64/strnlen.S b/sysdeps/riscv/rv64/strnlen.S
+deleted file mode 100644
+index 502f108710..0000000000
+--- a/sysdeps/riscv/rv64/strnlen.S
++++ /dev/null
+@@ -1,65 +0,0 @@
+-/* The assembly function for strnlen.  RISC-V version.
+-   Copyright (C) 2018 Free Software Foundation, Inc.
+-   This file is part of the GNU C Library.
+-
+-   The GNU C Library is free software; you can redistribute it and/or
+-   modify it under the terms of the GNU Lesser General Public
+-   License as published by the Free Software Foundation; either
+-   version 2.1 of the License, or (at your option) any later version.
+-
+-   The GNU C Library is distributed in the hope that it will be useful,
+-   but WITHOUT ANY WARRANTY; without even the implied warranty of
+-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+-   Lesser General Public License for more details.
+-
+-   You should have received a copy of the GNU Lesser General Public
+-   License along with the GNU C Library.  If not, see
+-   <http://www.gnu.org/licenses/>.  */
+-
+-#include <sysdep.h>
+-
+-	.p2align 6
+-ENTRY (__strnlen)
+-  mv    a2, a0
+-  mv    a0, a1
+-  li    a3, -1
+-  beqz  a1, .Ldone
+-  add   a0, a2, a1
+-  bleu  a2, a0, 1f
+-  li    a0, -1
+-1:
+-  mv    a5, a2
+-
+-.Lmisaligned:
+-  andi  a4, a5, 7
+-  beqz  a4, .Lloop
+-  lbu   a4, 0(a5)
+-  beqz  a4, .Llenth
+-  addi  a5, a5, 1
+-  j     .Lmisaligned  
+-.p2align 3
+-.Laligned:
+-  addi  a5, a5, 8
+-  addi  a1, a1, -8
+-.Lloop:
+-  bleu  a1, x0, .Llenth
+-  ld    a4, 0(a5)
+-  orc.b a4, a4
+-  beq   a4, a3, .Laligned
+-  not   a4, a4
+-  ctz   a4, a4
+-  srli  a4, a4, 3
+-  add   a5, a5, a4
+-.Llenth:
+-  minu  a5, a5, a0
+-  sub   a0, a5, a2
+-.Ldone:
+-  ret
+-
+-END (__strnlen)
+-
+-#ifndef STRNLEN
+-libc_hidden_def (__strnlen)
+-weak_alias (__strnlen, strnlen)
+-#endif
+-libc_hidden_def (strnlen)
+-- 
+2.25.1
+

+ 4 - 0
recipes-core/glibc/glibc_2.36.bb

@@ -74,6 +74,8 @@ SRC_URI =  "${GLIBC_GIT_URI};branch=${SRCBRANCH};name=glibc \
            file://0017-fix-strchr-missing-index-weak-alias.patch \
            file://0018-fix-memmove-align-fail-because-of-typo.patch \
            file://0019-fix-missing-alias-functions.patch \
+	   file://0001-RISCV-enable-align-loops-8-for-optimized-func.patch \
+	   file://0002-RISCV-revert-strchrnul-strncmp-strnlen.patch \
 	   "
 S = "${WORKDIR}/git"
 B = "${WORKDIR}/build-${TARGET_SYS}"
@@ -84,6 +86,8 @@ PACKAGES_DYNAMIC = ""
 BUILD_CPPFLAGS = "-I${STAGING_INCDIR_NATIVE}"
 TARGET_CPPFLAGS = "-I${STAGING_DIR_TARGET}${includedir}"
 
+EXTRA_OEMAKE:class-target += "CFLAGS+=' -march=rv64gc_zba_zbb_zbc_zbs' ASFLAGS+=' -march=rv64gc_zba_zbb_zbc_zbs'"
+
 GLIBC_BROKEN_LOCALES = ""
 
 GLIBCPIE ??= ""