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AmpereAltraPkg: Support get SubNUMA node region for Ampere silicons

This change helps to update the following:
- Add logic to get SubNUMA node region for Ampere silicons
  (Altra and Altra Max processor) as a common API in AmpereCpuLibCommon.
- Leverage the added API of AmpereCpuLibCommon accordingly.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Vu Nguyen 1 year ago
parent
commit
d8d167f11a

+ 22 - 83
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c

@@ -1,6 +1,6 @@
 /** @file
 
-  Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+  Copyright (c) 2020 - 2023, Ampere Computing LLC. All rights reserved.<BR>
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -65,74 +65,8 @@ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER MADTTableHeaderTemplate = {
     ),
 };
 
-UINT32 Ac01CoreOrderMonolithic[PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM] = {
-  36, 52, 40, 56, 32, 48, 44, 60,
-  20, 68, 24, 72, 16, 64, 28, 76,
-  4, 8, 0, 12, 38, 54, 42, 58,
-  34, 50, 46, 62, 22, 70, 26, 74,
-  18, 66, 30, 78, 6, 10, 2, 14,
-  37, 53, 41, 57, 33, 49, 45, 61,
-  21, 69, 25, 73, 17, 65, 29, 77,
-  5, 9, 1, 13, 39, 55, 43, 59,
-  35, 51, 47, 63, 23, 71, 27, 75,
-  19, 67, 31, 79, 7, 11, 3, 15,
-};
-
-UINT32 Ac01CoreOrderHemisphere[PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM] = {
-  32, 48, 16, 64, 36, 52, 0, 20,
-  68, 4, 34, 50, 18, 66, 38, 54,
-  2, 22, 70, 6, 33, 49, 17, 65,
-  37, 53, 1, 21, 69, 5, 35, 51,
-  19, 67, 39, 55, 3, 23, 71, 7,
-  44, 60, 28, 76, 40, 56, 12, 24,
-  72, 8, 46, 62, 30, 78, 42, 58,
-  14, 26, 74, 10, 45, 61, 29, 77,
-  41, 57, 13, 25, 73, 9, 47, 63,
-  31, 79, 43, 59, 15, 27, 75, 11,
-};
-
-UINT32 Ac01CoreOrderQuadrant[PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM] = {
-  16, 32, 0, 20, 4, 18, 34, 2,
-  22, 6, 17, 33, 1, 21, 5, 19,
-  35, 3, 23, 7, 48, 64, 52, 68,
-  36, 50, 66, 54, 70, 38, 49, 65,
-  53, 69, 37, 51, 67, 55, 71, 39,
-  28, 44, 12, 24, 8, 30, 46, 14,
-  26, 10, 29, 45, 13, 25, 9, 31,
-  47, 15, 27, 11, 60, 76, 56, 72,
-  40, 62, 78, 58, 74, 42, 61, 77,
-  57, 73, 41, 63, 79, 59, 75, 43,
-};
-
 EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *MadtTablePointer;
 
-UINT32 *
-CpuGetCoreOrder (
-  VOID
-  )
-{
-  UINT8              SubNumaMode;
-
-  SubNumaMode = CpuGetSubNumaMode ();
-  switch (SubNumaMode) {
-  case SUBNUMA_MODE_MONOLITHIC:
-    return (UINT32 *)&Ac01CoreOrderMonolithic;
-
-  case SUBNUMA_MODE_HEMISPHERE:
-    return (UINT32 *)&Ac01CoreOrderHemisphere;
-
-  case SUBNUMA_MODE_QUADRANT:
-    return (UINT32 *)&Ac01CoreOrderQuadrant;
-
-  default:
-    // Should never reach here
-    ASSERT (FALSE);
-    return NULL;
-  }
-
-  return NULL;
-}
-
 UINT32
 AcpiInstallMadtProcessorNode (
   VOID   *EntryPointer,
@@ -245,6 +179,7 @@ AcpiInstallMadtTable (
   INTN                       Index;
   EFI_STATUS                 Status;
   UINTN                      Size;
+  UINTN                      Length;
   UINT32                     *CoreOrder;
   UINT32                     SktMaxCoreNum;
 
@@ -258,14 +193,14 @@ AcpiInstallMadtTable (
   }
 
   Size = sizeof (MADTTableHeaderTemplate) +
-          (PLATFORM_CPU_MAX_NUM_CORES * sizeof (GiccTemplate)) +
-          sizeof (GicDTemplate) +
-          (PLATFORM_CPU_MAX_SOCKET * sizeof (GicRTemplate)) +
-          ((SOCKET0_LAST_RC - SOCKET0_FIRST_RC +  1) * sizeof (GicItsTemplate));
+         sizeof (GiccTemplate) * GetNumberOfActiveCores () +
+         sizeof (GicDTemplate) +
+         sizeof (GicRTemplate) * GetNumberOfActiveSockets () +
+         sizeof (GicItsTemplate) * (SOCKET0_LAST_RC - SOCKET0_FIRST_RC +  1);
   if (IsSlaveSocketActive ()) {
-    Size += ((SOCKET1_LAST_RC - SOCKET1_FIRST_RC +  1) * sizeof (GicItsTemplate));
+    Size += (sizeof (GicItsTemplate) * (SOCKET1_LAST_RC - SOCKET1_FIRST_RC +  1));
   } else if (!IsSlaveSocketAvailable ()) {
-    Size += 2 * sizeof (GicItsTemplate); /* RCA0/1 */
+    Size += sizeof (GicItsTemplate) * 2; /* RCA0/1 */
   }
 
   MadtTablePointer =
@@ -279,52 +214,56 @@ AcpiInstallMadtTable (
                                     sizeof (MADTTableHeaderTemplate));
 
   /* Install Gic interface for each processor */
-  Size = 0;
+  Length = 0;
   CoreOrder = CpuGetCoreOrder ();
   ASSERT (CoreOrder != NULL);
   SktMaxCoreNum = PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM;
   for (Index = 0; Index < SktMaxCoreNum; Index++) {
     if (IsCpuEnabled (CoreOrder[Index])) {
-      Size += AcpiInstallMadtProcessorNode ((VOID *)((UINT64)GiccEntryPointer + Size), CoreOrder[Index]);
+      Length += AcpiInstallMadtProcessorNode ((VOID *)((UINT64)GiccEntryPointer + Length), CoreOrder[Index]);
     }
   }
 
   for (Index = 0; Index < SktMaxCoreNum; Index++) {
     if (IsCpuEnabled (CoreOrder[Index] + SktMaxCoreNum)) {
-      Size += AcpiInstallMadtProcessorNode ((VOID *)((UINT64)GiccEntryPointer + Size), CoreOrder[Index] + SktMaxCoreNum);
+      Length += AcpiInstallMadtProcessorNode ((VOID *)((UINT64)GiccEntryPointer + Length), CoreOrder[Index] + SktMaxCoreNum);
     }
   }
 
   /* Install Gic Distributor */
-  Size += AcpiInstallMadtGicD ((VOID *)((UINT64)GiccEntryPointer + Size));
+  Length += AcpiInstallMadtGicD ((VOID *)((UINT64)GiccEntryPointer + Length));
 
   /* Install Gic Redistributor */
   for (Index = 0; Index < PLATFORM_CPU_MAX_SOCKET; Index++) {
-    Size += AcpiInstallMadtGicR ((VOID *)((UINT64)GiccEntryPointer + Size), Index);
+    Length += AcpiInstallMadtGicR ((VOID *)((UINT64)GiccEntryPointer + Length), Index);
   }
 
   /* Install Gic ITS */
   if (!IsSlaveSocketAvailable ()) {
     for (Index = 0; Index <= 1; Index++) { /* RCA0/1 */
-      Size += AcpiInstallMadtGicIts ((VOID *)((UINT64)GiccEntryPointer + Size), Index);
+      Length += AcpiInstallMadtGicIts ((VOID *)((UINT64)GiccEntryPointer + Length), Index);
     }
   }
   for (Index = SOCKET0_FIRST_RC; Index <= SOCKET0_LAST_RC; Index++) {
-    Size += AcpiInstallMadtGicIts ((VOID *)((UINT64)GiccEntryPointer + Size), Index);
+    Length += AcpiInstallMadtGicIts ((VOID *)((UINT64)GiccEntryPointer + Length), Index);
   }
   if (IsSlaveSocketActive ()) {
     for (Index = SOCKET1_FIRST_RC; Index <= SOCKET1_LAST_RC; Index++) {
-      Size += AcpiInstallMadtGicIts ((VOID *)((UINT64)GiccEntryPointer + Size), Index);
+      Length += AcpiInstallMadtGicIts ((VOID *)((UINT64)GiccEntryPointer + Length), Index);
     }
   }
+
   CopyMem (
     MadtTablePointer,
     &MADTTableHeaderTemplate,
     sizeof (MADTTableHeaderTemplate)
     );
 
-  Size += sizeof (MADTTableHeaderTemplate);
-  MadtTablePointer->Header.Length = Size;
+  Length += sizeof (MADTTableHeaderTemplate);
+  MadtTablePointer->Header.Length = Length;
+
+  ASSERT (Size == Length);
+
   CopyMem (
     MadtTablePointer->Header.OemId,
     PcdGetPtr (PcdAcpiDefaultOemId),

+ 12 - 19
Silicon/Ampere/AmpereAltraPkg/Include/Library/AmpereCpuLib.h

@@ -1,6 +1,6 @@
 /** @file
 
-  Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+  Copyright (c) 2020 - 2023, Ampere Computing LLC. All rights reserved.<BR>
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -16,11 +16,6 @@
 #define MONOLITIC_NUM_OF_REGION        1
 #define HEMISPHERE_NUM_OF_REGION       2
 #define QUADRANT_NUM_OF_REGION         4
-#define SUBNUMA_CPM_REGION_SIZE        4
-#define NUM_OF_CPM_PER_MESH_ROW        8
-
-#define CPM_PER_ROW_OFFSET(CpmId)      ((CpmId) % NUM_OF_CPM_PER_MESH_ROW)
-#define CPM_ROW_NUMBER(CpmId)          ((CpmId) / NUM_OF_CPM_PER_MESH_ROW)
 
 #define SOCKET_ID(CpuId)               ((CpuId) / (PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM))
 #define CLUSTER_ID(CpuId)              (((CpuId) / PLATFORM_CPU_NUM_CORES_PER_CPM) % PLATFORM_CPU_MAX_CPM)
@@ -65,6 +60,17 @@ CpuGetVoltage (
   UINT8 Socket
   );
 
+/**
+  Get CPU Core order number.
+
+  @return   UINT8      The order number.
+
+**/
+UINT32 *
+CpuGetCoreOrder (
+  VOID
+  );
+
 /**
   Get the SubNUMA mode.
 
@@ -183,19 +189,6 @@ GetMaximumNumberOfCores (
   VOID
   );
 
-/**
-  Get the maximum number of CPM per socket. This number
-  should be the same for all sockets.
-
-  @return   UINT32      Maximum number of CPM.
-
-**/
-UINT16
-EFIAPI
-GetMaximumNumberOfCPMs (
-  VOID
-  );
-
 /**
   Get the number of active cores of a sockets.
 

+ 172 - 73
Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/AmpereCpuLibCommon.c

@@ -1,6 +1,6 @@
 /** @file
 
-  Copyright (c) 2021, Ampere Computing LLC. All rights reserved.<BR>
+  Copyright (c) 2021 - 2023, Ampere Computing LLC. All rights reserved.<BR>
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -19,6 +19,108 @@
 #include <NVParamDef.h>
 #include <Platform/Ac01.h>
 
+UINT32 Ac01CoreOrderMonolithic[PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM] = {
+  36, 37, 40, 41, 52, 53, 56, 57, 32, 33,
+  44, 45, 48, 49, 60, 61, 20, 21, 24, 25,
+  68, 69, 72, 73, 16, 17, 28, 29, 64, 65,
+  76, 77,  4,  5,  8,  9,  0,  1, 12, 13,
+  38, 39, 42, 43, 54, 55, 58, 59, 34, 35,
+  46, 47, 50, 51, 62, 63, 22, 23, 26, 27,
+  70, 71, 74, 75, 18, 19, 30, 31, 66, 67,
+  78, 79,  6,  7, 10, 11,  2,  3, 14, 15,
+  80, 81, 82, 83, 84, 85, 86, 87,
+  88, 89, 90, 91, 92, 93, 94, 95,
+  96, 97, 98, 99, 100, 101, 102, 103,
+  104, 105, 106, 107, 108, 109, 110, 111,
+  112, 113, 114, 115, 116, 117, 118, 119,
+  120, 121, 122, 123, 124, 125, 126, 127,
+};
+
+UINT32 Ac01CoreOrderHemisphere[PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM] = {
+  32, 33, 48, 49, 16, 17, 64, 65, 36, 37,
+  52, 53,  0,  1, 20, 21, 68, 69,  4,  5,
+  34, 35, 50, 51, 18, 19, 66, 67, 38, 39,
+  54, 55,  2,  3, 22, 23, 70, 71,  6,  7,
+  44, 45, 60, 61, 28, 29, 76, 77, 40, 41,
+  56, 57, 12, 13, 24, 25, 72, 73,  8,  9,
+  46, 47, 62, 63, 30, 31, 78, 79, 42, 43,
+  58, 59, 14, 15, 26, 27, 74, 75, 10, 11,
+  80, 81, 82, 83, 84, 85, 86, 87,
+  88, 89, 90, 91, 92, 93, 94, 95,
+  96, 97, 98, 99, 100, 101, 102, 103,
+  104, 105, 106, 107, 108, 109, 110, 111,
+  112, 113, 114, 115, 116, 117, 118, 119,
+  120, 121, 122, 123, 124, 125, 126, 127,
+};
+
+UINT32 Ac01CoreOrderQuadrant[PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM] = {
+  16, 17, 32, 33,  0,  1, 20, 21,  4,  5,
+  18, 19, 34, 35,  2,  3, 22, 23,  6,  7,
+  48, 49, 64, 65, 52, 53, 68, 69, 36, 37,
+  50, 51, 66, 67, 54, 55, 70, 71, 38, 39,
+  28, 29, 44, 45, 12, 13, 24, 25,  8,  9,
+  30, 31, 46, 47, 14, 15, 26, 27, 10, 11,
+  60, 61, 76, 77, 56, 57, 72, 73, 40, 41,
+  62, 63, 78, 79, 58, 59, 74, 75, 42, 43,
+  80, 81, 82, 83, 84, 85, 86, 87,
+  88, 89, 90, 91, 92, 93, 94, 95,
+  96, 97, 98, 99, 100, 101, 102, 103,
+  104, 105, 106, 107, 108, 109, 110, 111,
+  112, 113, 114, 115, 116, 117, 118, 119,
+  120, 121, 122, 123, 124, 125, 126, 127,
+};
+
+UINT32 Ac02CoreOrderMonolithic[PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM] = {
+  36, 37, 40, 41, 52, 53, 56, 57, 32, 33,
+  44, 45, 48, 49, 60, 61, 20, 21, 24, 25,
+  68, 69, 72, 73, 16, 17, 28, 29, 64, 65,
+  76, 77,  4,  5,  8,  9, 84, 85, 88, 89,
+  0,  1, 12, 13, 80, 81, 92, 93, 100, 101,
+  104, 105, 96, 97, 108, 109, 116, 117, 120, 121,
+  112, 113, 124, 125, 38, 39, 42, 43, 54, 55,
+  58, 59, 34, 35, 46, 47, 50, 51, 62, 63,
+  22, 23, 26, 27, 70, 71, 74, 75, 18, 19,
+  30, 31, 66, 67, 78, 79,  6,  7, 10, 11,
+  86, 87, 90, 91,  2,  3, 14, 15, 82, 83,
+  94, 95, 102, 103, 106, 107, 98, 99, 110, 111,
+  118, 119, 122, 123, 114, 115, 126, 127,
+};
+
+UINT32 Ac02CoreOrderHemisphere[PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM] = {
+  32, 33, 48, 49, 16, 17, 64, 65, 36, 37,
+  52, 53,  0,  1, 20, 21, 68, 69, 80, 81,
+  4,  5, 84, 85, 96, 97, 100, 101, 112, 113,
+  116, 117, 34, 35, 50, 51, 18, 19, 66, 67,
+  38, 39, 54, 55, 2, 3, 22, 23, 70, 71,
+  82, 83, 6, 7, 86, 87, 98, 99, 102, 103,
+  114, 115, 118, 119, 44, 45, 60, 61, 28, 29,
+  76, 77, 40, 41, 56, 57, 12, 13, 24, 25,
+  72, 73, 92, 93, 8, 9, 88, 89, 108, 109,
+  104, 105, 124, 125, 120, 121, 46, 47, 62, 63,
+  30, 31, 78, 79, 42, 43, 58, 59, 14, 15,
+  26, 27, 74, 75, 94, 95, 10, 11, 90, 91,
+  110, 111, 106, 107, 126, 127, 122, 123,
+};
+
+UINT32 Ac02CoreOrderQuadrant[PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM] = {
+  16, 17, 32, 33,  0,  1, 20, 21,
+  36, 37,  4,  5, 84, 85, 96, 97,
+  18, 19, 34, 35,  2,  3, 22, 23,
+  38, 39,  6,  7, 86, 87, 98, 99,
+  48, 49, 64, 65, 52, 53, 68, 69,
+  80, 81, 100, 101, 112, 113, 116, 117,
+  50, 51, 66, 67, 54, 55, 70, 71,
+  82, 83, 102, 103, 114, 115, 118, 119,
+  28, 29, 44, 45, 12, 13, 24, 25,
+  40, 41,  8,  9, 88, 89, 108, 109,
+  30, 31, 46, 47, 14, 15, 26, 27,
+  42, 43, 10, 11, 90, 91, 110, 111,
+  60, 61, 76, 77, 56, 57, 72, 73,
+  92, 93, 104, 105, 124, 125, 120, 121,
+  62, 63, 78, 79, 58, 59, 74, 75,
+  94, 95, 106, 107, 126, 127, 122, 123,
+};
+
 PLATFORM_INFO_HOB *
 GetPlatformHob (
   VOID
@@ -94,6 +196,42 @@ CpuGetVoltage (
   return Voltage;
 }
 
+/**
+  Get CPU Core order number.
+
+  @return   UINT32*      The order number.
+
+**/
+UINT32 *
+CpuGetCoreOrder (
+  VOID
+  )
+{
+  UINT32             *CoreOrder;
+  UINT8              SubNumaMode;
+  BOOLEAN            IsAc01;
+
+  SubNumaMode = CpuGetSubNumaMode ();
+  IsAc01 = IsAc01Processor ();
+
+  switch (SubNumaMode) {
+  case SUBNUMA_MODE_MONOLITHIC:
+  default:
+    CoreOrder = IsAc01 ? Ac01CoreOrderMonolithic : Ac02CoreOrderMonolithic;
+    break;
+
+  case SUBNUMA_MODE_HEMISPHERE:
+    CoreOrder = IsAc01 ? Ac01CoreOrderHemisphere : Ac02CoreOrderHemisphere;
+    break;
+
+  case SUBNUMA_MODE_QUADRANT:
+    CoreOrder = IsAc01 ? Ac01CoreOrderQuadrant : Ac02CoreOrderQuadrant;
+    break;
+  }
+
+  return CoreOrder;
+}
+
 /**
   Get the SubNUMA mode.
 
@@ -157,14 +295,28 @@ CpuGetNumberOfSubNumaRegion (
   return NumberOfSubNumaRegion;
 }
 
-/**
-  Get the SubNUMA node of a CPM.
+STATIC
+UINT8
+CpuGetLogicCoreId (
+  UINT32 PhyCoreId
+  )
+{
+  UINT32             *CoreOrder;
+  UINT8              LogicCoreId;
+  UINT8              SktMaxCoreNum ;
 
-  @param    SocketId    Socket index.
-  @param    Cpm         CPM index.
-  @return   UINT8       The SubNUMA node of a CPM.
+  CoreOrder = CpuGetCoreOrder();
+  SktMaxCoreNum = PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM;
+
+  for (LogicCoreId = 0; LogicCoreId < SktMaxCoreNum; LogicCoreId++) {
+    if (CoreOrder[LogicCoreId] == PhyCoreId) {
+      return LogicCoreId;
+    }
+  }
+
+  return 0;
+}
 
-**/
 UINT8
 EFIAPI
 CpuGetSubNumNode (
@@ -172,67 +324,30 @@ CpuGetSubNumNode (
   UINT16 Cpm
   )
 {
-  BOOLEAN IsAsymMesh;
-  UINT8   SubNumaNode;
-  UINT16  MaxNumberOfCPM;
-  UINT8   MiddleRow;
-  UINT8   QuadrantHigherRowNodeNumber[NUM_OF_CPM_PER_MESH_ROW] = {1, 1, 1, 1, 3, 3, 3, 3};
-  UINT8   QuadrantLowerRowNodeNumber[NUM_OF_CPM_PER_MESH_ROW]  = {0, 0, 0, 0, 2, 2, 2, 2};
-  UINT8   QuadrantMiddleRowNodeNumber[NUM_OF_CPM_PER_MESH_ROW] = {0, 0, 1, 1, 3, 3, 2, 2};
-  UINT8   SubNumaMode;
-
-  MaxNumberOfCPM = GetMaximumNumberOfCPMs ();
-  SubNumaMode = CpuGetSubNumaMode ();
-  ASSERT (SubNumaMode <= SUBNUMA_MODE_QUADRANT);
+  UINT8 LogicCoreId;
+  UINT8 MaxFamliyCore;
+  UINT8 MaxNumCorePerNode;
+  UINT8 SubNumaNode;
 
-  switch (SubNumaMode) {
+  LogicCoreId = CpuGetLogicCoreId (Cpm * PLATFORM_CPU_NUM_CORES_PER_CPM);
+  MaxFamliyCore = IsAc01Processor () ? MAX_AMPERE_ALTRA_CORES : MAX_AMPERE_ALTRA_MAX_CORES;
+
+  switch (CpuGetSubNumaMode ()) {
   case SUBNUMA_MODE_MONOLITHIC:
     SubNumaNode = (SocketId == 0) ? 0 : 1;
     break;
 
   case SUBNUMA_MODE_HEMISPHERE:
-    if (CPM_PER_ROW_OFFSET (Cpm) >= SUBNUMA_CPM_REGION_SIZE) {
-      SubNumaNode = 1;
-    } else {
-      SubNumaNode = 0;
-    }
-
+    MaxNumCorePerNode = MaxFamliyCore / HEMISPHERE_NUM_OF_REGION;
+    SubNumaNode = LogicCoreId / MaxNumCorePerNode;
     if (SocketId == 1) {
       SubNumaNode += HEMISPHERE_NUM_OF_REGION;
     }
     break;
 
   case SUBNUMA_MODE_QUADRANT:
-    //
-    // CPM Mesh Rows
-    //
-    // |---------------------------------------|
-    // | 00 ----------- 03 | 04 ----------- 07 | Row 0
-    // |-------------------|-------------------|
-    // | 08 ----------- 11 | 12 ----------- 15 | Row 1
-    // |-------------------|-------------------|
-    // | 16 - 17 | 18 - 19 | 20 - 21 | 22 - 23 | Middle Row
-    // |-------------------|-------------------|
-    // | 24 ----------- 27 | 28 ----------- 31 | Row 3
-    // |-------------------|-------------------|
-    // | 32 ----------- 35 | 36 ----------- 39 | Row 4
-    // |---------------------------------------|
-    //
-
-    IsAsymMesh = (BOOLEAN)(CPM_ROW_NUMBER (MaxNumberOfCPM) % 2 != 0);
-    MiddleRow = CPM_ROW_NUMBER (MaxNumberOfCPM) / 2;
-    if (IsAsymMesh
-        && CPM_ROW_NUMBER (Cpm) == MiddleRow)
-    {
-      SubNumaNode = QuadrantMiddleRowNodeNumber[CPM_PER_ROW_OFFSET (Cpm)];
-
-    } else if (CPM_ROW_NUMBER (Cpm) >= MiddleRow) {
-      SubNumaNode = QuadrantHigherRowNodeNumber[CPM_PER_ROW_OFFSET (Cpm)];
-
-    } else {
-      SubNumaNode = QuadrantLowerRowNodeNumber[CPM_PER_ROW_OFFSET (Cpm)];
-    }
-
+    MaxNumCorePerNode = MaxFamliyCore / QUADRANT_NUM_OF_REGION;
+    SubNumaNode = LogicCoreId / MaxNumCorePerNode;
     if (SocketId == 1) {
       SubNumaNode += QUADRANT_NUM_OF_REGION;
     }
@@ -240,7 +355,7 @@ CpuGetSubNumNode (
 
   default:
     // Should never reach there.
-    SubNumaNode = 0;
+    SubNumaNode = (SocketId == 0) ? 0 : 1;
     ASSERT (FALSE);
     break;
   }
@@ -479,22 +594,6 @@ GetMaximumNumberOfCores (
   return PlatformHob->MaxNumOfCore[0];
 }
 
-/**
-  Get the maximum number of CPM per socket. This number
-  should be the same for all sockets.
-
-  @return   UINT16      Maximum number of CPM.
-
-**/
-UINT16
-EFIAPI
-GetMaximumNumberOfCPMs (
-  VOID
-  )
-{
-  return GetMaximumNumberOfCores () / PLATFORM_CPU_NUM_CORES_PER_CPM;
-}
-
 /**
   Get the number of active cores of a sockets.