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@@ -421,6 +421,66 @@ static_assert(offsetof(UContext<ContextTraits64>, mcontext.fpregs) ==
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offsetof(ucontext_t, uc_mcontext.fpregs),
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"context offset mismatch");
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#endif
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+#elif defined(ARCH_CPU_RISCV_FAMILY)
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+
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+struct MContext32 {
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+ uint32_t gregs[32];
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+ uint64_t fpregs[32];
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+ unsigned int fcsr;
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+};
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+
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+struct MContext64 {
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+ uint64_t gregs[32];
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+ uint64_t fpregs[32];
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+ unsigned int fcsr;
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+};
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+
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+struct ContextTraits32 : public Traits32 {
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+ using MContext = MContext32;
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+ using SignalThreadContext = ThreadContext::t32_t;
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+ using SignalFloatContext = FloatContext::f32_t;
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+ using CPUContext = CPUContextRISCV;
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+};
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+
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+struct ContextTraits64 : public Traits64 {
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+ using MContext = MContext64;
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+ using SignalThreadContext = ThreadContext::t64_t;
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+ using SignalFloatContext = FloatContext::f64_t;
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+ using CPUContext = CPUContextRISCV64;
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+};
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+
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+template <typename Traits>
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+struct UContext {
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+ typename Traits::ULong flags;
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+ typename Traits::Address link;
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+ SignalStack<Traits> stack;
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+ Sigset<Traits> sigmask;
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+ char padding[128 - sizeof(sigmask)];
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+ typename Traits::Char_64Only padding2[8];
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+ typename Traits::MContext mcontext;
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+};
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+
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+#if defined(ARCH_CPU_RISCV)
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+static_assert(offsetof(UContext<ContextTraits32>, mcontext) ==
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+ offsetof(ucontext_t, uc_mcontext),
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+ "context offset mismatch");
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+static_assert(offsetof(UContext<ContextTraits32>, mcontext.gregs) ==
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+ offsetof(ucontext_t, uc_mcontext.__gregs),
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+ "context offset mismatch");
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+static_assert(offsetof(UContext<ContextTraits32>, mcontext.fpregs) ==
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+ offsetof(ucontext_t, uc_mcontext.__fpregs),
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+ "context offset mismatch");
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+#elif defined(ARCH_CPU_RISCV64)
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+static_assert(offsetof(UContext<ContextTraits64>, mcontext) ==
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+ offsetof(ucontext_t, uc_mcontext),
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+ "context offset mismatch");
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+static_assert(offsetof(UContext<ContextTraits64>, mcontext.gregs) ==
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+ offsetof(ucontext_t, uc_mcontext.__gregs),
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+ "context offset mismatch");
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+static_assert(offsetof(UContext<ContextTraits64>, mcontext.fpregs) ==
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+ offsetof(ucontext_t, uc_mcontext.__fpregs),
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+ "context offset mismatch");
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+#endif
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#else
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#error Port.
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