Maximilian Rehkopf
|
684e2c3b81
FPGA/BSX: fix checksum registers
|
12 years ago |
Maximilian Rehkopf
|
8148f5567c
FPGA: properly synchronize external signals
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12 years ago |
Maximilian Rehkopf
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37a309fd0e
FPGA: improve BS support (more date fields, initial download data support)
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12 years ago |
Maximilian Rehkopf
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86576d2e48
FPGA: clean up (port size mismatches, unused regs/wires, ...)
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12 years ago |
ikari
|
a8d64311c6
FPGA: code formatting, update synthesis configuration, timing
|
13 years ago |
ikari
|
34188532f9
uPD77C25 (DSP1-4) (preliminary)
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13 years ago |
ikari
|
7e8f5679e6
FPGA: RTC fixes + calculate day of week
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13 years ago |
ikari
|
6b9acae5c2
BS-X support (FPGA)
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13 years ago |