spl.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2019 NXP
  4. */
  5. #include <common.h>
  6. #include <cpu_func.h>
  7. #include <hang.h>
  8. #include <image.h>
  9. #include <spl.h>
  10. #include <asm/io.h>
  11. #include <asm/mach-imx/iomux-v3.h>
  12. #include <asm/arch/clock.h>
  13. #include <asm/arch/imx8mm_pins.h>
  14. #include <asm/arch/sys_proto.h>
  15. #include <asm/mach-imx/boot_mode.h>
  16. #include <asm/arch/ddr.h>
  17. #include <dm/uclass.h>
  18. #include <dm/device.h>
  19. #include <dm/uclass-internal.h>
  20. #include <dm/device-internal.h>
  21. #include <power/pmic.h>
  22. #include <power/bd71837.h>
  23. DECLARE_GLOBAL_DATA_PTR;
  24. int spl_board_boot_device(enum boot_device boot_dev_spl)
  25. {
  26. switch (boot_dev_spl) {
  27. case SD2_BOOT:
  28. case MMC2_BOOT:
  29. return BOOT_DEVICE_MMC1;
  30. case SD3_BOOT:
  31. case MMC3_BOOT:
  32. return BOOT_DEVICE_MMC2;
  33. default:
  34. return BOOT_DEVICE_NONE;
  35. }
  36. }
  37. static void spl_dram_init(void)
  38. {
  39. ddr_init(&dram_timing);
  40. }
  41. void spl_board_init(void)
  42. {
  43. puts("Normal Boot\n");
  44. }
  45. #ifdef CONFIG_SPL_LOAD_FIT
  46. int board_fit_config_name_match(const char *name)
  47. {
  48. /* Just empty function now - can't decide what to choose */
  49. debug("%s: %s\n", __func__, name);
  50. return 0;
  51. }
  52. #endif
  53. #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
  54. #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
  55. static iomux_v3_cfg_t const uart_pads[] = {
  56. IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
  57. IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
  58. };
  59. static iomux_v3_cfg_t const wdog_pads[] = {
  60. IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
  61. };
  62. int board_early_init_f(void)
  63. {
  64. struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
  65. imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
  66. set_wdog_reset(wdog);
  67. imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
  68. return 0;
  69. }
  70. static int power_init_board(void)
  71. {
  72. struct udevice *dev;
  73. int ret;
  74. ret = pmic_get("pmic@4b", &dev);
  75. if (ret == -ENODEV) {
  76. puts("No pmic\n");
  77. return 0;
  78. }
  79. if (ret != 0)
  80. return ret;
  81. /* decrease RESET key long push time from the default 10s to 10ms */
  82. pmic_reg_write(dev, BD718XX_PWRONCONFIG1, 0x0);
  83. /* unlock the PMIC regs */
  84. pmic_reg_write(dev, BD718XX_REGLOCK, 0x1);
  85. /* increase VDD_SOC to typical value 0.85v before first DRAM access */
  86. pmic_reg_write(dev, BD718XX_BUCK1_VOLT_RUN, 0x0f);
  87. /* increase VDD_DRAM to 0.975v for 3Ghz DDR */
  88. pmic_reg_write(dev, BD718XX_1ST_NODVS_BUCK_VOLT, 0x83);
  89. #ifndef CONFIG_IMX8M_LPDDR4
  90. /* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */
  91. pmic_reg_write(dev, BD718XX_4TH_NODVS_BUCK_VOLT, 0x28);
  92. #endif
  93. /* lock the PMIC regs */
  94. pmic_reg_write(dev, BD718XX_REGLOCK, 0x11);
  95. return 0;
  96. }
  97. void board_init_f(ulong dummy)
  98. {
  99. struct udevice *dev;
  100. int ret;
  101. arch_cpu_init();
  102. init_uart_clk(1);
  103. board_early_init_f();
  104. timer_init();
  105. preloader_console_init();
  106. /* Clear the BSS. */
  107. memset(__bss_start, 0, __bss_end - __bss_start);
  108. ret = spl_early_init();
  109. if (ret) {
  110. debug("spl_early_init() failed: %d\n", ret);
  111. hang();
  112. }
  113. ret = uclass_get_device_by_name(UCLASS_CLK,
  114. "clock-controller@30380000",
  115. &dev);
  116. if (ret < 0) {
  117. printf("Failed to find clock node. Check device tree\n");
  118. hang();
  119. }
  120. enable_tzc380();
  121. power_init_board();
  122. /* DDR initialization */
  123. spl_dram_init();
  124. board_init_r(NULL, 0);
  125. }