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@@ -204,7 +204,7 @@ static int zynq_dma_xfer_init(bitstream_type bstype)
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/* Clear loopback bit */
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clrbits_le32(&devcfg_base->mctrl, DEVCFG_MCTRL_PCAP_LPBK);
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- if (bstype != BIT_PARTIAL) {
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+ if (bstype != BIT_PARTIAL && bstype != BIT_NONE) {
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zynq_slcr_devcfg_disable();
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/* Setting PCFG_PROG_B signal to high */
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@@ -511,7 +511,8 @@ struct xilinx_fpga_op zynq_op = {
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* Load the encrypted image from src addr and decrypt the image and
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* place it back the decrypted image into dstaddr.
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*/
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-int zynq_decrypt_load(u32 srcaddr, u32 srclen, u32 dstaddr, u32 dstlen)
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+int zynq_decrypt_load(u32 srcaddr, u32 srclen, u32 dstaddr, u32 dstlen,
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+ u8 bstype)
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{
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if (srcaddr < SZ_1M || dstaddr < SZ_1M) {
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printf("%s: src and dst addr should be > 1M\n",
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@@ -519,7 +520,7 @@ int zynq_decrypt_load(u32 srcaddr, u32 srclen, u32 dstaddr, u32 dstlen)
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return FPGA_FAIL;
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}
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- if (zynq_dma_xfer_init(BIT_NONE)) {
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+ if (zynq_dma_xfer_init(bstype)) {
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printf("%s: zynq_dma_xfer_init FAIL\n", __func__);
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return FPGA_FAIL;
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}
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