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@@ -825,25 +825,22 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
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/* Step 4 - ring already allocated */
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/* Step 5 */
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- ep0_ctx->ep_info2 = cpu_to_le32(CTRL_EP << EP_TYPE_SHIFT);
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+ ep0_ctx->ep_info2 = cpu_to_le32(EP_TYPE(CTRL_EP));
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debug("SPEED = %d\n", speed);
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switch (speed) {
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case USB_SPEED_SUPER:
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- ep0_ctx->ep_info2 |= cpu_to_le32(((512 & MAX_PACKET_MASK) <<
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- MAX_PACKET_SHIFT));
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+ ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(512));
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debug("Setting Packet size = 512bytes\n");
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break;
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case USB_SPEED_HIGH:
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/* USB core guesses at a 64-byte max packet first for FS devices */
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case USB_SPEED_FULL:
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- ep0_ctx->ep_info2 |= cpu_to_le32(((64 & MAX_PACKET_MASK) <<
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- MAX_PACKET_SHIFT));
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+ ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(64));
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debug("Setting Packet size = 64bytes\n");
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break;
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case USB_SPEED_LOW:
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- ep0_ctx->ep_info2 |= cpu_to_le32(((8 & MAX_PACKET_MASK) <<
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- MAX_PACKET_SHIFT));
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+ ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(8));
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debug("Setting Packet size = 8bytes\n");
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break;
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default:
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@@ -852,9 +849,7 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
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}
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/* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */
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- ep0_ctx->ep_info2 |=
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- cpu_to_le32(((0 & MAX_BURST_MASK) << MAX_BURST_SHIFT) |
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- ((3 & ERROR_COUNT_MASK) << ERROR_COUNT_SHIFT));
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+ ep0_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(0) | ERROR_COUNT(3));
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trb_64 = virt_to_phys(virt_dev->eps[0].ring->first_seg->trbs);
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ep0_ctx->deq = cpu_to_le64(trb_64 | virt_dev->eps[0].ring->cycle_state);
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