0001-arm-dts-owl-s500-Fix-incorrect-PPI.patch 2.0 KB

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  1. From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
  2. Subject: [PATCH 1/4] arm: dts: owl-s500: Fix incorrect PPI interrupt specifiers
  3. To: Rob Herring <robh+dt@kernel.org>,
  4. Andreas Färber <afaerber@suse.de>,
  5. Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
  6. Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
  7. linux-kernel@vger.kernel.org
  8. Date: Mon, 15 Jun 2020 03:19:08 +0300 (10 weeks, 3 days, 20 hours ago)
  9. X-Mailer: git-send-email 2.27.0
  10. The PPI interrupts for cortex-a9 were incorrectly specified, fix them.
  11. Fixes: fdfe7f4f9d85 ("ARM: dts: Add Actions Semi S500 and LeMaker Guitar")
  12. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
  13. Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
  14. ---
  15. arch/arm/boot/dts/owl-s500.dtsi | 6 +++---
  16. 1 file changed, 3 insertions(+), 3 deletions(-)
  17. diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
  18. index 5ceb6cc4451d..1dbe4e8b38ac 100644
  19. --- a/arch/arm/boot/dts/owl-s500.dtsi
  20. +++ b/arch/arm/boot/dts/owl-s500.dtsi
  21. @@ -84,21 +84,21 @@ scu: scu@b0020000 {
  22. global_timer: timer@b0020200 {
  23. compatible = "arm,cortex-a9-global-timer";
  24. reg = <0xb0020200 0x100>;
  25. - interrupts = <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
  26. + interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
  27. status = "disabled";
  28. };
  29. twd_timer: timer@b0020600 {
  30. compatible = "arm,cortex-a9-twd-timer";
  31. reg = <0xb0020600 0x20>;
  32. - interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
  33. + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
  34. status = "disabled";
  35. };
  36. twd_wdt: wdt@b0020620 {
  37. compatible = "arm,cortex-a9-twd-wdt";
  38. reg = <0xb0020620 0xe0>;
  39. - interrupts = <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
  40. + interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
  41. status = "disabled";
  42. };
  43. --
  44. 2.27.0