0001-arm-dts-sync-dts-for-Allwinner-H6.patch 5.9 KB

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  1. From 99cade8743158889b3e8db93c003b3318ebd4bda Mon Sep 17 00:00:00 2001
  2. From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= <peron.clem@gmail.com>
  3. Date: Sun, 11 Aug 2019 22:38:57 +0200
  4. Subject: [PATCH] arm: dts: sync dts for Allwinner H6
  5. MIME-Version: 1.0
  6. Content-Type: text/plain; charset=UTF-8
  7. Content-Transfer-Encoding: 8bit
  8. Sync Kernel DTS for Allwinner H6 boards.
  9. Drop /omit-if-no-ref/ keyword as it's not supported by U-boot.
  10. commit <d45331b00ddb> Linux 5.3-rc4
  11. Signed-off-by: Clément Péron <peron.clem@gmail.com>
  12. ---
  13. arch/arm/dts/sun50i-h6-beelink-gs1.dts | 76 ++++++++++++++++++++++++++
  14. arch/arm/dts/sun50i-h6-pine-h64.dts | 12 ++++
  15. arch/arm/dts/sun50i-h6.dtsi | 46 +++++++++++++++-
  16. 3 files changed, 131 insertions(+), 3 deletions(-)
  17. diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
  18. index 54b0882bed..0dc33c90dd 100644
  19. --- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts
  20. +++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
  21. @@ -14,6 +14,7 @@
  22. compatible = "azw,beelink-gs1", "allwinner,sun50i-h6";
  23. aliases {
  24. + ethernet0 = &emac;
  25. serial0 = &uart0;
  26. };
  27. @@ -21,6 +22,17 @@
  28. stdout-path = "serial0:115200n8";
  29. };
  30. + connector {
  31. + compatible = "hdmi-connector";
  32. + type = "a";
  33. +
  34. + port {
  35. + hdmi_con_in: endpoint {
  36. + remote-endpoint = <&hdmi_out_con>;
  37. + };
  38. + };
  39. + };
  40. +
  41. leds {
  42. compatible = "gpio-leds";
  43. @@ -41,6 +53,40 @@
  44. };
  45. };
  46. +&de {
  47. + status = "okay";
  48. +};
  49. +
  50. +&ehci0 {
  51. + status = "okay";
  52. +};
  53. +
  54. +&emac {
  55. + pinctrl-names = "default";
  56. + pinctrl-0 = <&ext_rgmii_pins>;
  57. + phy-mode = "rgmii";
  58. + phy-handle = <&ext_rgmii_phy>;
  59. + phy-supply = <&reg_aldo2>;
  60. + status = "okay";
  61. +};
  62. +
  63. +&hdmi {
  64. + status = "okay";
  65. +};
  66. +
  67. +&hdmi_out {
  68. + hdmi_out_con: endpoint {
  69. + remote-endpoint = <&hdmi_con_in>;
  70. + };
  71. +};
  72. +
  73. +&mdio {
  74. + ext_rgmii_phy: ethernet-phy@1 {
  75. + compatible = "ethernet-phy-ieee802.3-c22";
  76. + reg = <1>;
  77. + };
  78. +};
  79. +
  80. &mmc0 {
  81. vmmc-supply = <&reg_cldo1>;
  82. cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
  83. @@ -57,6 +103,15 @@
  84. status = "okay";
  85. };
  86. +&ohci0 {
  87. + status = "okay";
  88. +};
  89. +
  90. +&pio {
  91. + vcc-pd-supply = <&reg_cldo1>;
  92. + vcc-pg-supply = <&reg_aldo1>;
  93. +};
  94. +
  95. &r_i2c {
  96. status = "okay";
  97. @@ -177,8 +232,29 @@
  98. };
  99. };
  100. +&r_pio {
  101. + /*
  102. + * PL0 and PL1 are used for PMIC I2C
  103. + * don't enable the pl-supply else
  104. + * it will fail at boot
  105. + *
  106. + * vcc-pl-supply = <&reg_aldo1>;
  107. + */
  108. + vcc-pm-supply = <&reg_aldo1>;
  109. +};
  110. +
  111. &uart0 {
  112. pinctrl-names = "default";
  113. pinctrl-0 = <&uart0_ph_pins>;
  114. status = "okay";
  115. };
  116. +
  117. +&usb2otg {
  118. + dr_mode = "host";
  119. + status = "okay";
  120. +};
  121. +
  122. +&usb2phy {
  123. + usb0_vbus-supply = <&reg_vcc5v>;
  124. + status = "okay";
  125. +};
  126. diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts b/arch/arm/dts/sun50i-h6-pine-h64.dts
  127. index 4802902e12..1898345183 100644
  128. --- a/arch/arm/dts/sun50i-h6-pine-h64.dts
  129. +++ b/arch/arm/dts/sun50i-h6-pine-h64.dts
  130. @@ -127,6 +127,12 @@
  131. status = "okay";
  132. };
  133. +&pio {
  134. + vcc-pc-supply = <&reg_bldo2>;
  135. + vcc-pd-supply = <&reg_cldo1>;
  136. + vcc-pg-supply = <&reg_aldo1>;
  137. +};
  138. +
  139. &r_i2c {
  140. status = "okay";
  141. @@ -243,10 +249,16 @@
  142. pcf8563: rtc@51 {
  143. compatible = "nxp,pcf8563";
  144. reg = <0x51>;
  145. + interrupt-parent = <&r_intc>;
  146. + interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
  147. #clock-cells = <0>;
  148. };
  149. };
  150. +&r_pio {
  151. + vcc-pm-supply = <&reg_aldo1>;
  152. +};
  153. +
  154. &uart0 {
  155. pinctrl-names = "default";
  156. pinctrl-0 = <&uart0_ph_pins>;
  157. diff --git a/arch/arm/dts/sun50i-h6.dtsi b/arch/arm/dts/sun50i-h6.dtsi
  158. index e0dc4a05c1..a117f479ae 100644
  159. --- a/arch/arm/dts/sun50i-h6.dtsi
  160. +++ b/arch/arm/dts/sun50i-h6.dtsi
  161. @@ -101,7 +101,7 @@
  162. #size-cells = <1>;
  163. ranges;
  164. - display-engine@1000000 {
  165. + bus@1000000 {
  166. compatible = "allwinner,sun50i-h6-de3",
  167. "allwinner,sun50i-a64-de2";
  168. reg = <0x1000000 0x400000>;
  169. @@ -203,11 +203,32 @@
  170. #reset-cells = <1>;
  171. };
  172. + dma: dma-controller@3002000 {
  173. + compatible = "allwinner,sun50i-h6-dma";
  174. + reg = <0x03002000 0x1000>;
  175. + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
  176. + clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>;
  177. + clock-names = "bus", "mbus";
  178. + dma-channels = <16>;
  179. + dma-requests = <46>;
  180. + resets = <&ccu RST_BUS_DMA>;
  181. + #dma-cells = <1>;
  182. + };
  183. +
  184. sid: sid@3006000 {
  185. compatible = "allwinner,sun50i-h6-sid";
  186. reg = <0x03006000 0x400>;
  187. };
  188. + watchdog: watchdog@30090a0 {
  189. + compatible = "allwinner,sun50i-h6-wdt",
  190. + "allwinner,sun6i-a31-wdt";
  191. + reg = <0x030090a0 0x20>;
  192. + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
  193. + /* Broken on some H6 boards */
  194. + status = "disabled";
  195. + };
  196. +
  197. pio: pinctrl@300b000 {
  198. compatible = "allwinner,sun50i-h6-pinctrl";
  199. reg = <0x0300b000 0x400>;
  200. @@ -243,6 +264,18 @@
  201. bias-pull-up;
  202. };
  203. + /*
  204. + * /omit-if-no-ref/ isn't supported by U-boot
  205. + * keep this comment to avoid bad sync with Linux
  206. + */
  207. + mmc1_pins: mmc1-pins {
  208. + pins = "PG0", "PG1", "PG2", "PG3",
  209. + "PG4", "PG5";
  210. + function = "mmc1";
  211. + drive-strength = <30>;
  212. + bias-pull-up;
  213. + };
  214. +
  215. mmc2_pins: mmc2-pins {
  216. pins = "PC1", "PC4", "PC5", "PC6",
  217. "PC7", "PC8", "PC9", "PC10",
  218. @@ -294,6 +327,8 @@
  219. resets = <&ccu RST_BUS_MMC1>;
  220. reset-names = "ahb";
  221. interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
  222. + pinctrl-names = "default";
  223. + pinctrl-0 = <&mmc1_pins>;
  224. status = "disabled";
  225. #address-cells = <1>;
  226. #size-cells = <0>;
  227. @@ -445,7 +480,6 @@
  228. resets = <&ccu RST_BUS_OHCI3>,
  229. <&ccu RST_BUS_EHCI3>;
  230. phys = <&usb2phy 3>;
  231. - phy-names = "usb";
  232. status = "disabled";
  233. };
  234. @@ -457,7 +491,6 @@
  235. <&ccu CLK_USB_OHCI3>;
  236. resets = <&ccu RST_BUS_OHCI3>;
  237. phys = <&usb2phy 3>;
  238. - phy-names = "usb";
  239. status = "disabled";
  240. };
  241. @@ -613,6 +646,13 @@
  242. #reset-cells = <1>;
  243. };
  244. + r_watchdog: watchdog@7020400 {
  245. + compatible = "allwinner,sun50i-h6-wdt",
  246. + "allwinner,sun6i-a31-wdt";
  247. + reg = <0x07020400 0x20>;
  248. + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
  249. + };
  250. +
  251. r_intc: interrupt-controller@7021000 {
  252. compatible = "allwinner,sun50i-h6-r-intc",
  253. "allwinner,sun6i-a31-r-intc";
  254. --
  255. 2.20.1