Config.in.arm 12 KB

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  1. # arm cpu features
  2. config BR2_ARM_CPU_HAS_NEON
  3. bool
  4. # for some cores, NEON support is optional
  5. config BR2_ARM_CPU_MAYBE_HAS_NEON
  6. bool
  7. # for some cores, VFPv2 is optional
  8. config BR2_ARM_CPU_MAYBE_HAS_VFPV2
  9. bool
  10. config BR2_ARM_CPU_HAS_VFPV2
  11. bool
  12. # for some cores, VFPv3 is optional
  13. config BR2_ARM_CPU_MAYBE_HAS_VFPV3
  14. bool
  15. select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  16. config BR2_ARM_CPU_HAS_VFPV3
  17. bool
  18. select BR2_ARM_CPU_HAS_VFPV2
  19. # for some cores, VFPv4 is optional
  20. config BR2_ARM_CPU_MAYBE_HAS_VFPV4
  21. bool
  22. select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  23. config BR2_ARM_CPU_HAS_VFPV4
  24. bool
  25. select BR2_ARM_CPU_HAS_VFPV3
  26. config BR2_ARM_CPU_HAS_THUMB
  27. bool
  28. config BR2_ARM_CPU_HAS_THUMB2
  29. bool
  30. choice
  31. prompt "Target Architecture Variant"
  32. depends on BR2_arm || BR2_armeb
  33. default BR2_arm926t
  34. help
  35. Specific CPU variant to use
  36. config BR2_arm7tdmi
  37. bool "arm7tdmi"
  38. select BR2_ARM_CPU_HAS_THUMB
  39. config BR2_arm720t
  40. bool "arm720t"
  41. select BR2_ARM_CPU_HAS_THUMB
  42. config BR2_arm920t
  43. bool "arm920t"
  44. select BR2_ARM_CPU_HAS_THUMB
  45. config BR2_arm922t
  46. bool "arm922t"
  47. select BR2_ARM_CPU_HAS_THUMB
  48. config BR2_arm926t
  49. bool "arm926t"
  50. select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  51. select BR2_ARM_CPU_HAS_THUMB
  52. config BR2_arm10t
  53. bool "arm10t"
  54. select BR2_ARM_CPU_HAS_THUMB
  55. config BR2_arm1136jf_s_r0
  56. bool "arm1136jf_s rev0"
  57. select BR2_ARM_CPU_HAS_VFPV2
  58. select BR2_ARM_CPU_HAS_THUMB
  59. config BR2_arm1136jf_s_r1
  60. bool "arm1136jf_s rev1"
  61. select BR2_ARM_CPU_HAS_VFPV2
  62. select BR2_ARM_CPU_HAS_THUMB
  63. config BR2_arm1176jz_s
  64. bool "arm1176jz-s"
  65. select BR2_ARM_CPU_HAS_THUMB
  66. config BR2_arm1176jzf_s
  67. bool "arm1176jzf-s"
  68. select BR2_ARM_CPU_HAS_VFPV2
  69. select BR2_ARM_CPU_HAS_THUMB
  70. config BR2_cortex_a5
  71. bool "cortex-A5"
  72. select BR2_ARM_CPU_MAYBE_HAS_NEON
  73. select BR2_ARM_CPU_MAYBE_HAS_VFPV4
  74. select BR2_ARM_CPU_HAS_THUMB2
  75. config BR2_cortex_a7
  76. bool "cortex-A7"
  77. select BR2_ARM_CPU_HAS_NEON
  78. select BR2_ARM_CPU_HAS_VFPV4
  79. select BR2_ARM_CPU_HAS_THUMB2
  80. config BR2_cortex_a8
  81. bool "cortex-A8"
  82. select BR2_ARM_CPU_HAS_NEON
  83. select BR2_ARM_CPU_HAS_VFPV3
  84. select BR2_ARM_CPU_HAS_THUMB2
  85. config BR2_cortex_a9
  86. bool "cortex-A9"
  87. select BR2_ARM_CPU_MAYBE_HAS_NEON
  88. select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  89. select BR2_ARM_CPU_HAS_THUMB2
  90. config BR2_cortex_a15
  91. bool "cortex-A15"
  92. select BR2_ARM_CPU_HAS_NEON
  93. select BR2_ARM_CPU_HAS_VFPV4
  94. select BR2_ARM_CPU_HAS_THUMB2
  95. config BR2_fa526
  96. bool "fa526/626"
  97. config BR2_pj4
  98. bool "pj4"
  99. select BR2_ARM_CPU_HAS_VFPV3
  100. config BR2_strongarm
  101. bool "strongarm sa110/sa1100"
  102. config BR2_xscale
  103. bool "xscale"
  104. select BR2_ARM_CPU_HAS_THUMB
  105. config BR2_iwmmxt
  106. bool "iwmmxt"
  107. endchoice
  108. config BR2_arm1136jf_s
  109. bool
  110. default BR2_arm1136jf_s_r0 || BR2_arm1136jf_s_r1
  111. choice
  112. prompt "Target ABI"
  113. depends on BR2_arm || BR2_armeb
  114. default BR2_ARM_EABI
  115. help
  116. Application Binary Interface to use. The Application Binary
  117. Interface describes the calling conventions (how arguments
  118. are passed to functions, how the return value is passed, how
  119. system calls are made, etc.).
  120. config BR2_ARM_EABI
  121. bool "EABI"
  122. help
  123. The EABI is currently the standard ARM ABI, which is used in
  124. most projects. It supports both the 'soft' floating point
  125. model (in which floating point instructions are emulated in
  126. software) and the 'softfp' floating point model (in which
  127. floating point instructions are executed using an hardware
  128. floating point unit, but floating point arguments to
  129. functions are passed in integer registers).
  130. The 'softfp' floating point model is link-compatible with
  131. the 'soft' floating point model, i.e you can link a library
  132. built 'soft' with some other code built 'softfp'.
  133. However, passing the floating point arguments in integer
  134. registers is a bit inefficient, so if your ARM processor has
  135. a floating point unit, and you don't have pre-compiled
  136. 'soft' or 'softfp' code, using the EABIhf ABI will provide
  137. better floating point performances.
  138. If your processor does not have a floating point unit, then
  139. you must use this ABI.
  140. config BR2_ARM_EABIHF
  141. bool "EABIhf"
  142. depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2 || BR2_ARM_CPU_HAS_VFPV2
  143. help
  144. The EABIhf is an extension of EABI which supports the 'hard'
  145. floating point model. This model uses the floating point
  146. unit to execute floating point instructions, and passes
  147. floating point arguments in floating point registers.
  148. It is more efficient than EABI for floating point related
  149. workload. However, it does not allow to link against code
  150. that has been pre-built for the 'soft' or 'softfp' floating
  151. point models.
  152. If your processor has a floating point unit, and you don't
  153. depend on existing pre-compiled code, this option is most
  154. likely the best choice.
  155. endchoice
  156. config BR2_ARM_ENABLE_NEON
  157. bool "Enable NEON SIMD extension support"
  158. depends on BR2_ARM_CPU_MAYBE_HAS_NEON
  159. select BR2_ARM_CPU_HAS_NEON
  160. help
  161. For some CPU cores, the NEON SIMD extension is optional.
  162. Select this option if you are certain your particular
  163. implementation has NEON support and you want to use it.
  164. choice
  165. prompt "Floating point strategy"
  166. depends on BR2_ARM_EABI || BR2_ARM_EABIHF
  167. default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
  168. default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
  169. default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
  170. default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
  171. config BR2_ARM_SOFT_FLOAT
  172. bool "Soft float"
  173. depends on BR2_ARM_EABI
  174. select BR2_SOFT_FLOAT
  175. help
  176. This option allows to use software emulated floating
  177. point. It should be used for ARM cores that do not include a
  178. Vector Floating Point unit, such as ARMv5 cores (ARM926 for
  179. example) or certain ARMv6 cores.
  180. config BR2_ARM_FPU_VFPV2
  181. bool "VFPv2"
  182. depends on BR2_ARM_CPU_HAS_VFPV2 || BR2_ARM_CPU_MAYBE_HAS_VFPV2
  183. help
  184. This option allows to use the VFPv2 floating point unit, as
  185. available in some ARMv5 processors (ARM926EJ-S) and some
  186. ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
  187. MPCore).
  188. Note that this option is also safe to use for newer cores
  189. such as Cortex-A, because the VFPv3 and VFPv4 units are
  190. backward compatible with VFPv2.
  191. config BR2_ARM_FPU_VFPV3
  192. bool "VFPv3"
  193. depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
  194. help
  195. This option allows to use the VFPv3 floating point unit, as
  196. available in some ARMv7 processors (Cortex-A{8, 9}). This
  197. option requires a VFPv3 unit that has 32 double-precision
  198. registers, which is not necessarily the case in all SOCs
  199. based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
  200. instead, which is guaranteed to work on all Cortex-A{8, 9}.
  201. Note that this option is also safe to use for newer cores
  202. that have a VFPv4 unit, because VFPv4 is backward compatible
  203. with VFPv3. They must of course also have 32
  204. double-precision registers.
  205. config BR2_ARM_FPU_VFPV3D16
  206. bool "VFPv3-D16"
  207. depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
  208. help
  209. This option allows to use the VFPv3 floating point unit, as
  210. available in some ARMv7 processors (Cortex-A{8, 9}). This
  211. option requires a VFPv3 unit that has 16 double-precision
  212. registers, which is generally the case in all SOCs based on
  213. Cortex-A{8, 9}, even though VFPv3 is technically optional on
  214. Cortex-A9. This is the safest option for those cores.
  215. Note that this option is also safe to use for newer cores
  216. such that have a VFPv4 unit, because the VFPv4 is backward
  217. compatible with VFPv3.
  218. config BR2_ARM_FPU_VFPV4
  219. bool "VFPv4"
  220. depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
  221. help
  222. This option allows to use the VFPv4 floating point unit, as
  223. available in some ARMv7 processors (Cortex-A{5, 7, 12,
  224. 15}). This option requires a VFPv4 unit that has 32
  225. double-precision registers, which is not necessarily the
  226. case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
  227. unsure, you should probably use VFPv4-D16 instead.
  228. Note that if you want binary code that works on all ARMv7
  229. cores, including the earlier Cortex-A{8, 9}, you should
  230. instead select VFPv3.
  231. config BR2_ARM_FPU_VFPV4D16
  232. bool "VFPv4-D16"
  233. depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
  234. help
  235. This option allows to use the VFPv4 floating point unit, as
  236. available in some ARMv7 processors (Cortex-A{5, 7, 12,
  237. 15}). This option requires a VFPv4 unit that has 16
  238. double-precision registers, which is always available on
  239. Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
  240. Cortex-A7.
  241. Note that if you want binary code that works on all ARMv7
  242. cores, including the earlier Cortex-A{8, 9}, you should
  243. instead select VFPv3-D16.
  244. config BR2_ARM_FPU_NEON
  245. bool "NEON"
  246. depends on BR2_ARM_CPU_HAS_NEON
  247. help
  248. This option allows to use the NEON SIMD unit, as available
  249. in some ARMv7 processors, as a floating-point unit. It
  250. should however be noted that using NEON for floating point
  251. operations doesn't provide a complete compatibility with the
  252. IEEE 754.
  253. config BR2_ARM_FPU_NEON_VFPV4
  254. bool "NEON/VFPv4"
  255. depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
  256. depends on BR2_ARM_CPU_HAS_NEON
  257. help
  258. This option allows to use both the VFPv4 and the NEON SIMD
  259. units for floating point operations. Note that some ARMv7
  260. cores do not necessarily have VFPv4 and/or NEON support, for
  261. example on Cortex-A5 and Cortex-A7, support for VFPv4 and
  262. NEON is optional.
  263. endchoice
  264. choice
  265. prompt "ARM instruction set"
  266. depends on BR2_ARM_CPU_HAS_THUMB || BR2_ARM_CPU_HAS_THUMB2
  267. config BR2_ARM_INSTRUCTIONS_ARM_CHOICE
  268. bool "ARM"
  269. help
  270. This option instructs the compiler to generate regular ARM
  271. instructions, that are all 32 bits wide.
  272. config BR2_ARM_INSTRUCTIONS_THUMB
  273. bool "Thumb"
  274. depends on BR2_ARM_CPU_HAS_THUMB
  275. help
  276. This option instructions the compiler to generate Thumb
  277. instructions, which allows to mix 16 bits instructions and
  278. 32 bits instructions. This generally provides a much smaller
  279. compiled binary size.
  280. config BR2_ARM_INSTRUCTIONS_THUMB2
  281. bool "Thumb2"
  282. depends on BR2_ARM_CPU_HAS_THUMB2
  283. help
  284. This option instructions the compiler to generate Thumb2
  285. instructions, which allows to mix 16 bits instructions and
  286. 32 bits instructions. This generally provides a much smaller
  287. compiled binary size.
  288. endchoice
  289. config BR2_ARM_INSTRUCTIONS_ARM
  290. def_bool y
  291. depends on !(BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2)
  292. config BR2_ARCH
  293. default "arm" if BR2_arm
  294. default "armeb" if BR2_armeb
  295. config BR2_ENDIAN
  296. default "LITTLE" if BR2_arm
  297. default "BIG" if BR2_armeb
  298. config BR2_GCC_TARGET_TUNE
  299. default "arm7tdmi" if BR2_arm7tdmi
  300. default "arm7tdmi" if BR2_arm720t
  301. default "arm7tdmi" if BR2_arm740t
  302. default "arm920" if BR2_arm920
  303. default "arm920t" if BR2_arm920t
  304. default "arm922t" if BR2_arm922t
  305. default "arm926ej-s" if BR2_arm926t
  306. default "arm1136j-s" if BR2_arm1136j_s
  307. default "arm1136jf-s" if BR2_arm1136jf_s
  308. default "arm1176jz-s" if BR2_arm1176jz_s
  309. default "arm1176jzf-s" if BR2_arm1176jzf_s
  310. default "cortex-a5" if BR2_cortex_a5
  311. default "cortex-a7" if BR2_cortex_a7
  312. default "cortex-a8" if BR2_cortex_a8
  313. default "cortex-a9" if BR2_cortex_a9
  314. default "cortex-a15" if BR2_cortex_a15
  315. default "fa526" if BR2_fa526
  316. default "marvell-pj4" if BR2_pj4
  317. default "strongarm" if BR2_strongarm
  318. default "xscale" if BR2_xscale
  319. default "iwmmxt" if BR2_iwmmxt
  320. config BR2_GCC_TARGET_ARCH
  321. default "armv4t" if BR2_arm7tdmi
  322. default "armv4t" if BR2_arm720t
  323. default "armv4t" if BR2_arm920t
  324. default "armv4t" if BR2_arm922t
  325. default "armv5te" if BR2_arm926t
  326. default "armv5t" if BR2_arm10t
  327. default "armv6j" if BR2_arm1136jf_s_r0
  328. default "armv6k" if BR2_arm1136jf_s_r1
  329. default "armv6zk" if BR2_arm1176jz_s
  330. default "armv6zk" if BR2_arm1176jzf_s
  331. default "armv7-a" if BR2_cortex_a5
  332. default "armv7-a" if BR2_cortex_a7
  333. default "armv7-a" if BR2_cortex_a8
  334. default "armv7-a" if BR2_cortex_a9
  335. default "armv7-a" if BR2_cortex_a15
  336. default "armv4" if BR2_fa526
  337. default "armv7-a" if BR2_pj4
  338. default "armv4" if BR2_strongarm
  339. default "armv5te" if BR2_xscale
  340. default "iwmmxt" if BR2_iwmmxt
  341. config BR2_GCC_TARGET_ABI
  342. default "aapcs-linux"
  343. config BR2_GCC_TARGET_FPU
  344. default "vfp" if BR2_ARM_FPU_VFPV2
  345. default "vfpv3" if BR2_ARM_FPU_VFPV3
  346. default "vfpv3-d16" if BR2_ARM_FPU_VFPV3D16
  347. default "vfpv4" if BR2_ARM_FPU_VFPV4
  348. default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16
  349. default "neon" if BR2_ARM_FPU_NEON
  350. default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4
  351. config BR2_GCC_TARGET_FLOAT_ABI
  352. default "soft" if BR2_ARM_SOFT_FLOAT
  353. default "softfp" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
  354. default "hard" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
  355. config BR2_GCC_TARGET_MODE
  356. default "arm" if BR2_ARM_INSTRUCTIONS_ARM
  357. default "thumb" if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2