Config.in 12 KB

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  1. menu "Target options"
  2. config BR2_ARCH_IS_64
  3. bool
  4. config BR2_KERNEL_64_USERLAND_32
  5. bool
  6. config BR2_SOFT_FLOAT
  7. bool
  8. config BR2_ARCH_HAS_MMU_MANDATORY
  9. bool
  10. config BR2_ARCH_HAS_MMU_OPTIONAL
  11. bool
  12. config BR2_ARCH_HAS_FDPIC_SUPPORT
  13. bool
  14. choice
  15. prompt "Target Architecture"
  16. default BR2_i386
  17. help
  18. Select the target architecture family to build for.
  19. config BR2_arcle
  20. bool "ARC (little endian)"
  21. select BR2_ARCH_HAS_MMU_MANDATORY
  22. help
  23. Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
  24. that can be used from deeply embedded to high performance host
  25. applications. Little endian.
  26. config BR2_arceb
  27. bool "ARC (big endian)"
  28. select BR2_ARCH_HAS_MMU_MANDATORY
  29. help
  30. Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
  31. that can be used from deeply embedded to high performance host
  32. applications. Big endian.
  33. config BR2_arm
  34. bool "ARM (little endian)"
  35. # MMU support is set by the subarchitecture file, arch/Config.in.arm
  36. help
  37. ARM is a 32-bit reduced instruction set computer (RISC) instruction
  38. set architecture (ISA) developed by ARM Holdings. Little endian.
  39. http://www.arm.com/
  40. http://en.wikipedia.org/wiki/ARM
  41. config BR2_armeb
  42. bool "ARM (big endian)"
  43. # MMU support is set by the subarchitecture file, arch/Config.in.arm
  44. help
  45. ARM is a 32-bit reduced instruction set computer (RISC) instruction
  46. set architecture (ISA) developed by ARM Holdings. Big endian.
  47. http://www.arm.com/
  48. http://en.wikipedia.org/wiki/ARM
  49. config BR2_aarch64
  50. bool "AArch64 (little endian)"
  51. select BR2_ARCH_IS_64
  52. select BR2_ARCH_HAS_MMU_MANDATORY
  53. help
  54. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  55. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  56. http://en.wikipedia.org/wiki/ARM
  57. config BR2_aarch64_be
  58. bool "AArch64 (big endian)"
  59. select BR2_ARCH_IS_64
  60. select BR2_ARCH_HAS_MMU_MANDATORY
  61. help
  62. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  63. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  64. http://en.wikipedia.org/wiki/ARM
  65. config BR2_bfin
  66. bool "Blackfin"
  67. select BR2_ARCH_HAS_FDPIC_SUPPORT
  68. select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  69. help
  70. The Blackfin is a family of 16 or 32-bit microprocessors developed,
  71. manufactured and marketed by Analog Devices.
  72. http://www.analog.com/
  73. http://en.wikipedia.org/wiki/Blackfin
  74. config BR2_csky
  75. bool "csky"
  76. select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  77. select BR2_ARCH_HAS_MMU_MANDATORY
  78. help
  79. csky is processor IP from china.
  80. http://www.c-sky.com/
  81. http://www.github.com/c-sky
  82. config BR2_i386
  83. bool "i386"
  84. select BR2_ARCH_HAS_MMU_MANDATORY
  85. help
  86. Intel i386 architecture compatible microprocessor
  87. http://en.wikipedia.org/wiki/I386
  88. config BR2_m68k
  89. bool "m68k"
  90. # MMU support is set by the subarchitecture file, arch/Config.in.m68k
  91. help
  92. Motorola 68000 family microprocessor
  93. http://en.wikipedia.org/wiki/M68k
  94. config BR2_microblazeel
  95. bool "Microblaze AXI (little endian)"
  96. select BR2_ARCH_HAS_MMU_MANDATORY
  97. help
  98. Soft processor core designed for Xilinx FPGAs from Xilinx. AXI bus
  99. based architecture (little endian)
  100. http://www.xilinx.com
  101. http://en.wikipedia.org/wiki/Microblaze
  102. config BR2_microblazebe
  103. bool "Microblaze non-AXI (big endian)"
  104. select BR2_ARCH_HAS_MMU_MANDATORY
  105. help
  106. Soft processor core designed for Xilinx FPGAs from Xilinx. PLB bus
  107. based architecture (non-AXI, big endian)
  108. http://www.xilinx.com
  109. http://en.wikipedia.org/wiki/Microblaze
  110. config BR2_mips
  111. bool "MIPS (big endian)"
  112. select BR2_ARCH_HAS_MMU_MANDATORY
  113. help
  114. MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
  115. http://www.mips.com/
  116. http://en.wikipedia.org/wiki/MIPS_Technologies
  117. config BR2_mipsel
  118. bool "MIPS (little endian)"
  119. select BR2_ARCH_HAS_MMU_MANDATORY
  120. help
  121. MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
  122. http://www.mips.com/
  123. http://en.wikipedia.org/wiki/MIPS_Technologies
  124. config BR2_mips64
  125. bool "MIPS64 (big endian)"
  126. select BR2_ARCH_IS_64
  127. select BR2_ARCH_HAS_MMU_MANDATORY
  128. help
  129. MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
  130. http://www.mips.com/
  131. http://en.wikipedia.org/wiki/MIPS_Technologies
  132. config BR2_mips64el
  133. bool "MIPS64 (little endian)"
  134. select BR2_ARCH_IS_64
  135. select BR2_ARCH_HAS_MMU_MANDATORY
  136. help
  137. MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
  138. http://www.mips.com/
  139. http://en.wikipedia.org/wiki/MIPS_Technologies
  140. config BR2_nios2
  141. bool "Nios II"
  142. select BR2_ARCH_HAS_MMU_MANDATORY
  143. help
  144. Nios II is a soft core processor from Altera Corporation.
  145. http://www.altera.com/
  146. http://en.wikipedia.org/wiki/Nios_II
  147. config BR2_or1k
  148. bool "OpenRISC"
  149. select BR2_ARCH_HAS_MMU_MANDATORY
  150. help
  151. OpenRISC is a free and open processor for embedded system.
  152. http://openrisc.io
  153. config BR2_powerpc
  154. bool "PowerPC"
  155. select BR2_ARCH_HAS_MMU_MANDATORY
  156. help
  157. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  158. Big endian.
  159. http://www.power.org/
  160. http://en.wikipedia.org/wiki/Powerpc
  161. config BR2_powerpc64
  162. bool "PowerPC64 (big endian)"
  163. select BR2_ARCH_IS_64
  164. select BR2_ARCH_HAS_MMU_MANDATORY
  165. help
  166. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  167. Big endian.
  168. http://www.power.org/
  169. http://en.wikipedia.org/wiki/Powerpc
  170. config BR2_powerpc64le
  171. bool "PowerPC64 (little endian)"
  172. select BR2_ARCH_IS_64
  173. select BR2_ARCH_HAS_MMU_MANDATORY
  174. help
  175. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  176. Little endian.
  177. http://www.power.org/
  178. http://en.wikipedia.org/wiki/Powerpc
  179. config BR2_sh
  180. bool "SuperH"
  181. select BR2_ARCH_HAS_MMU_OPTIONAL
  182. help
  183. SuperH (or SH) is a 32-bit reduced instruction set computer (RISC)
  184. instruction set architecture (ISA) developed by Hitachi.
  185. http://www.hitachi.com/
  186. http://en.wikipedia.org/wiki/SuperH
  187. config BR2_sparc
  188. bool "SPARC"
  189. select BR2_ARCH_HAS_MMU_MANDATORY
  190. help
  191. SPARC (from Scalable Processor Architecture) is a RISC instruction
  192. set architecture (ISA) developed by Sun Microsystems.
  193. http://www.oracle.com/sun
  194. http://en.wikipedia.org/wiki/Sparc
  195. config BR2_sparc64
  196. bool "SPARC64"
  197. select BR2_ARCH_IS_64
  198. select BR2_ARCH_HAS_MMU_MANDATORY
  199. help
  200. SPARC (from Scalable Processor Architecture) is a RISC instruction
  201. set architecture (ISA) developed by Sun Microsystems.
  202. http://www.oracle.com/sun
  203. http://en.wikipedia.org/wiki/Sparc
  204. config BR2_x86_64
  205. bool "x86_64"
  206. select BR2_ARCH_IS_64
  207. select BR2_ARCH_HAS_MMU_MANDATORY
  208. help
  209. x86-64 is an extension of the x86 instruction set (Intel i386
  210. architecture compatible microprocessor).
  211. http://en.wikipedia.org/wiki/X86_64
  212. config BR2_xtensa
  213. bool "Xtensa"
  214. # MMU support is set by the subarchitecture file, arch/Config.in.xtensa
  215. help
  216. Xtensa is a Tensilica processor IP architecture.
  217. http://en.wikipedia.org/wiki/Xtensa
  218. http://www.tensilica.com/
  219. endchoice
  220. # For some architectures or specific cores, our internal toolchain
  221. # backend is not suitable (like, missing support in upstream gcc, or
  222. # no ChipCo fork exists...)
  223. config BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  224. bool
  225. config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
  226. bool
  227. default y if !BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  228. # The following symbols are selected by the individual
  229. # Config.in.$ARCH files
  230. config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
  231. bool
  232. config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
  233. bool
  234. select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
  235. config BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  236. bool
  237. select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
  238. config BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  239. bool
  240. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  241. config BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  242. bool
  243. select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  244. # The following string values are defined by the individual
  245. # Config.in.$ARCH files
  246. config BR2_ARCH
  247. string
  248. config BR2_ENDIAN
  249. string
  250. config BR2_GCC_TARGET_ARCH
  251. string
  252. config BR2_GCC_TARGET_ABI
  253. string
  254. config BR2_GCC_TARGET_NAN
  255. string
  256. config BR2_GCC_TARGET_FP32_MODE
  257. string
  258. config BR2_GCC_TARGET_CPU
  259. string
  260. config BR2_GCC_TARGET_CPU_REVISION
  261. string
  262. # The value of this option will be passed as --with-fpu=<value> when
  263. # building gcc (internal backend) or -mfpu=<value> in the toolchain
  264. # wrapper (external toolchain)
  265. config BR2_GCC_TARGET_FPU
  266. string
  267. # The value of this option will be passed as --with-float=<value> when
  268. # building gcc (internal backend) or -mfloat-abi=<value> in the toolchain
  269. # wrapper (external toolchain)
  270. config BR2_GCC_TARGET_FLOAT_ABI
  271. string
  272. # The value of this option will be passed as --with-mode=<value> when
  273. # building gcc (internal backend) or -m<value> in the toolchain
  274. # wrapper (external toolchain)
  275. config BR2_GCC_TARGET_MODE
  276. string
  277. # Must be selected by binary formats that support shared libraries.
  278. config BR2_BINFMT_SUPPORTS_SHARED
  279. bool
  280. # Must match the name of the architecture from readelf point of view,
  281. # i.e the "Machine:" field of readelf output. See get_machine_name()
  282. # in binutils/readelf.c for the list of possible values.
  283. config BR2_READELF_ARCH_NAME
  284. string
  285. # Set up target binary format
  286. choice
  287. prompt "Target Binary Format"
  288. default BR2_BINFMT_ELF if BR2_USE_MMU
  289. default BR2_BINFMT_FDPIC if BR2_ARCH_HAS_FDPIC_SUPPORT
  290. default BR2_BINFMT_FLAT
  291. config BR2_BINFMT_ELF
  292. bool "ELF"
  293. depends on BR2_USE_MMU
  294. select BR2_BINFMT_SUPPORTS_SHARED
  295. help
  296. ELF (Executable and Linkable Format) is a format for libraries and
  297. executables used across different architectures and operating
  298. systems.
  299. config BR2_BINFMT_FDPIC
  300. bool "FDPIC"
  301. depends on BR2_ARCH_HAS_FDPIC_SUPPORT
  302. select BR2_BINFMT_SUPPORTS_SHARED
  303. help
  304. ELF FDPIC binaries are based on ELF, but allow the individual load
  305. segments of a binary to be located in memory independently of each
  306. other. This makes this format ideal for use in environments where no
  307. MMU is available.
  308. config BR2_BINFMT_FLAT
  309. bool "FLAT"
  310. depends on !BR2_USE_MMU
  311. help
  312. FLAT binary is a relatively simple and lightweight executable format
  313. based on the original a.out format. It is widely used in environment
  314. where no MMU is available.
  315. endchoice
  316. # Set up flat binary type
  317. choice
  318. prompt "FLAT Binary type"
  319. depends on BR2_BINFMT_FLAT
  320. default BR2_BINFMT_FLAT_ONE
  321. config BR2_BINFMT_FLAT_ONE
  322. bool "One memory region"
  323. help
  324. All segments are linked into one memory region.
  325. config BR2_BINFMT_FLAT_SEP_DATA
  326. bool "Separate data and code region"
  327. # this FLAT binary type technically exists on m68k, but fails
  328. # to build numerous packages: due to architecture limitation,
  329. # big functions cannot be built in this mode. They cause build
  330. # failures such as "Tried to convert PC relative branch to
  331. # absolute jump" or "error: value -yyyyy out of range".
  332. depends on BR2_bfin
  333. help
  334. Allow for the data and text segments to be separated and placed in
  335. different regions of memory.
  336. config BR2_BINFMT_FLAT_SHARED
  337. bool "Shared binary"
  338. depends on BR2_m68k || BR2_bfin
  339. # Even though this really generates shared binaries, there is no libdl
  340. # and dlopen() cannot be used. So packages that require shared
  341. # libraries cannot be built. Therefore, we don't select
  342. # BR2_BINFMT_SUPPORTS_SHARED and therefore force BR2_STATIC_LIBS.
  343. # Although this adds -static to the compilation, that's not a problem
  344. # because the -mid-shared-library option overrides it.
  345. help
  346. Allow to load and link indiviual FLAT binaries at run time.
  347. endchoice
  348. if BR2_arcle || BR2_arceb
  349. source "arch/Config.in.arc"
  350. endif
  351. if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
  352. source "arch/Config.in.arm"
  353. endif
  354. if BR2_bfin
  355. source "arch/Config.in.bfin"
  356. endif
  357. if BR2_csky
  358. source "arch/Config.in.csky"
  359. endif
  360. if BR2_m68k
  361. source "arch/Config.in.m68k"
  362. endif
  363. if BR2_microblazeel || BR2_microblazebe
  364. source "arch/Config.in.microblaze"
  365. endif
  366. if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
  367. source "arch/Config.in.mips"
  368. endif
  369. if BR2_nios2
  370. source "arch/Config.in.nios2"
  371. endif
  372. if BR2_or1k
  373. source "arch/Config.in.or1k"
  374. endif
  375. if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
  376. source "arch/Config.in.powerpc"
  377. endif
  378. if BR2_sh
  379. source "arch/Config.in.sh"
  380. endif
  381. if BR2_sparc || BR2_sparc64
  382. source "arch/Config.in.sparc"
  383. endif
  384. if BR2_i386 || BR2_x86_64
  385. source "arch/Config.in.x86"
  386. endif
  387. if BR2_xtensa
  388. source "arch/Config.in.xtensa"
  389. endif
  390. endmenu # Target options