Config.in.xtensa 1.2 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152
  1. choice
  2. prompt "Target Architecture Variant"
  3. depends on BR2_xtensa
  4. default BR2_xtensa_fsf
  5. config BR2_XTENSA_CUSTOM
  6. select BR2_ARCH_HAS_MMU_OPTIONAL
  7. bool "Custom Xtensa processor configuration"
  8. config BR2_xtensa_fsf
  9. select BR2_ARCH_HAS_MMU_MANDATORY
  10. bool "fsf - Default configuration"
  11. endchoice
  12. config BR2_XTENSA_OVERLAY_FILE
  13. string "Overlay file for custom configuration"
  14. depends on BR2_XTENSA_CUSTOM
  15. help
  16. Enter the path to the overlay tarball for a custom processor
  17. configuration.
  18. These overlay files are tar packages with updated configuration
  19. files for various toolchain packages and Xtensa processor
  20. configurations. They are provided by the processor vendor or
  21. directly from Tensilica.
  22. The path can be either absolute, or relative to the top directory
  23. of buildroot.
  24. choice
  25. prompt "Target Architecture Endianness"
  26. depends on BR2_XTENSA_CUSTOM
  27. default BR2_XTENSA_LITTLE_ENDIAN
  28. config BR2_XTENSA_LITTLE_ENDIAN
  29. bool "Little endian"
  30. config BR2_XTENSA_BIG_ENDIAN
  31. bool "Big endian"
  32. endchoice
  33. config BR2_ENDIAN
  34. default "LITTLE" if BR2_XTENSA_LITTLE_ENDIAN
  35. default "BIG" if BR2_xtensa_fsf || BR2_XTENSA_BIG_ENDIAN
  36. config BR2_ARCH
  37. default "xtensa" if BR2_xtensa
  38. config BR2_READELF_ARCH_NAME
  39. default "Tensilica Xtensa Processor"