Config.in.mips 4.1 KB

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  1. # mips default CPU ISAs
  2. config BR2_MIPS_CPU_MIPS32
  3. bool
  4. config BR2_MIPS_CPU_MIPS32R2
  5. bool
  6. config BR2_MIPS_CPU_MIPS32R5
  7. bool
  8. config BR2_MIPS_CPU_MIPS32R6
  9. bool
  10. config BR2_MIPS_CPU_MIPS64
  11. bool
  12. config BR2_MIPS_CPU_MIPS64R2
  13. bool
  14. config BR2_MIPS_CPU_MIPS64R5
  15. bool
  16. config BR2_MIPS_CPU_MIPS64R6
  17. bool
  18. choice
  19. prompt "Target Architecture Variant"
  20. depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
  21. default BR2_mips_32 if BR2_mips || BR2_mipsel
  22. default BR2_mips_64 if BR2_mips64 || BR2_mips64el
  23. help
  24. Specific CPU variant to use
  25. 64bit cabable: 64, 64r2, 64r5, 64r6
  26. non-64bit capable: 32, 32r2, 32r5, 32r6
  27. config BR2_mips_32
  28. bool "Generic MIPS32"
  29. depends on !BR2_ARCH_IS_64
  30. select BR2_MIPS_CPU_MIPS32
  31. config BR2_mips_32r2
  32. bool "Generic MIPS32R2"
  33. depends on !BR2_ARCH_IS_64
  34. select BR2_MIPS_CPU_MIPS32R2
  35. config BR2_mips_32r5
  36. bool "Generic MIPS32R5"
  37. depends on !BR2_ARCH_IS_64
  38. select BR2_MIPS_CPU_MIPS32R5
  39. config BR2_mips_32r6
  40. bool "Generic MIPS32R6"
  41. depends on !BR2_ARCH_IS_64
  42. select BR2_MIPS_CPU_MIPS32R6
  43. config BR2_mips_interaptiv
  44. bool "interAptiv"
  45. depends on !BR2_ARCH_IS_64
  46. select BR2_MIPS_CPU_MIPS32R2
  47. config BR2_mips_m5150
  48. bool "M5150"
  49. depends on !BR2_ARCH_IS_64
  50. select BR2_MIPS_CPU_MIPS32R5
  51. config BR2_mips_m6250
  52. bool "M6250"
  53. depends on !BR2_ARCH_IS_64
  54. select BR2_MIPS_CPU_MIPS32R6
  55. config BR2_mips_p5600
  56. bool "P5600"
  57. depends on !BR2_ARCH_IS_64
  58. select BR2_MIPS_CPU_MIPS32R5
  59. config BR2_mips_xburst
  60. bool "XBurst"
  61. depends on !BR2_ARCH_IS_64
  62. select BR2_MIPS_CPU_MIPS32R2
  63. help
  64. The Ingenic XBurst is a MIPS32R2 microprocessor. It has a
  65. bug in the FPU that can generate incorrect results in
  66. certain cases. The problem shows up when you have several
  67. fused madd instructions in sequence with dependant
  68. operands. This requires the -mno-fused-madd compiler option
  69. to be used in order to prevent emitting these instructions.
  70. See http://www.ingenic.com/en/?xburst.html
  71. config BR2_mips_64
  72. bool "Generic MIPS64"
  73. depends on BR2_ARCH_IS_64
  74. select BR2_MIPS_CPU_MIPS64
  75. config BR2_mips_64r2
  76. bool "Generic MIPS64R2"
  77. depends on BR2_ARCH_IS_64
  78. select BR2_MIPS_CPU_MIPS64R2
  79. config BR2_mips_64r5
  80. bool "Generic MIPS64R5"
  81. depends on BR2_ARCH_IS_64
  82. select BR2_MIPS_CPU_MIPS64R5
  83. config BR2_mips_64r6
  84. bool "Generic MIPS64R6"
  85. depends on BR2_ARCH_IS_64
  86. select BR2_MIPS_CPU_MIPS64R6
  87. config BR2_mips_i6400
  88. bool "I6400"
  89. depends on BR2_ARCH_IS_64
  90. select BR2_MIPS_CPU_MIPS64R6
  91. config BR2_mips_p6600
  92. bool "P6600"
  93. depends on BR2_ARCH_IS_64
  94. select BR2_MIPS_CPU_MIPS64R6
  95. endchoice
  96. choice
  97. prompt "Target ABI"
  98. depends on BR2_mips64 || BR2_mips64el
  99. default BR2_MIPS_NABI32
  100. help
  101. Application Binary Interface to use
  102. config BR2_MIPS_NABI32
  103. bool "n32"
  104. depends on BR2_ARCH_IS_64
  105. select BR2_KERNEL_64_USERLAND_32
  106. config BR2_MIPS_NABI64
  107. bool "n64"
  108. depends on BR2_ARCH_IS_64
  109. endchoice
  110. config BR2_MIPS_SOFT_FLOAT
  111. bool "Use soft-float"
  112. default y
  113. select BR2_SOFT_FLOAT
  114. help
  115. If your target CPU does not have a Floating Point Unit (FPU)
  116. or a kernel FPU emulator, but you still wish to support
  117. floating point functions, then everything will need to be
  118. compiled with soft floating point support (-msoft-float).
  119. config BR2_ARCH
  120. default "mips" if BR2_mips
  121. default "mipsel" if BR2_mipsel
  122. default "mips64" if BR2_mips64
  123. default "mips64el" if BR2_mips64el
  124. config BR2_ENDIAN
  125. default "LITTLE" if BR2_mipsel || BR2_mips64el
  126. default "BIG" if BR2_mips || BR2_mips64
  127. config BR2_GCC_TARGET_ARCH
  128. default "mips32" if BR2_mips_32
  129. default "mips32r2" if BR2_mips_32r2
  130. default "mips32r5" if BR2_mips_32r5
  131. default "mips32r6" if BR2_mips_32r6
  132. default "interaptiv" if BR2_mips_interaptiv
  133. default "m5101" if BR2_mips_m5150
  134. default "m6201" if BR2_mips_m6250
  135. default "p5600" if BR2_mips_p5600
  136. default "mips32r2" if BR2_mips_xburst
  137. default "mips64" if BR2_mips_64
  138. default "mips64r2" if BR2_mips_64r2
  139. default "mips64r5" if BR2_mips_64r5
  140. default "mips64r6" if BR2_mips_64r6
  141. default "i6400" if BR2_mips_i6400
  142. default "p6600" if BR2_mips_p6600
  143. config BR2_MIPS_OABI32
  144. bool
  145. default y if BR2_mips || BR2_mipsel
  146. config BR2_GCC_TARGET_ABI
  147. default "32" if BR2_MIPS_OABI32
  148. default "n32" if BR2_MIPS_NABI32
  149. default "64" if BR2_MIPS_NABI64