Config.in 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405
  1. menu "Target options"
  2. config BR2_ARCH_IS_64
  3. bool
  4. config BR2_KERNEL_64_USERLAND_32
  5. bool
  6. config BR2_SOFT_FLOAT
  7. bool
  8. config BR2_ARCH_HAS_MMU_MANDATORY
  9. bool
  10. config BR2_ARCH_HAS_MMU_OPTIONAL
  11. bool
  12. config BR2_ARCH_HAS_FDPIC_SUPPORT
  13. bool
  14. choice
  15. prompt "Target Architecture"
  16. default BR2_i386
  17. help
  18. Select the target architecture family to build for.
  19. config BR2_arcle
  20. bool "ARC (little endian)"
  21. select BR2_ARCH_HAS_MMU_MANDATORY
  22. help
  23. Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
  24. that can be used from deeply embedded to high performance host
  25. applications. Little endian.
  26. config BR2_arceb
  27. bool "ARC (big endian)"
  28. select BR2_ARCH_HAS_MMU_MANDATORY
  29. help
  30. Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
  31. that can be used from deeply embedded to high performance host
  32. applications. Big endian.
  33. config BR2_arm
  34. bool "ARM (little endian)"
  35. # MMU support is set by the subarchitecture file, arch/Config.in.arm
  36. help
  37. ARM is a 32-bit reduced instruction set computer (RISC) instruction
  38. set architecture (ISA) developed by ARM Holdings. Little endian.
  39. http://www.arm.com/
  40. http://en.wikipedia.org/wiki/ARM
  41. config BR2_armeb
  42. bool "ARM (big endian)"
  43. # MMU support is set by the subarchitecture file, arch/Config.in.arm
  44. help
  45. ARM is a 32-bit reduced instruction set computer (RISC) instruction
  46. set architecture (ISA) developed by ARM Holdings. Big endian.
  47. http://www.arm.com/
  48. http://en.wikipedia.org/wiki/ARM
  49. config BR2_aarch64
  50. bool "AArch64 (little endian)"
  51. select BR2_ARCH_IS_64
  52. select BR2_ARCH_HAS_MMU_MANDATORY
  53. help
  54. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  55. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  56. http://en.wikipedia.org/wiki/ARM
  57. config BR2_aarch64_be
  58. bool "AArch64 (big endian)"
  59. select BR2_ARCH_IS_64
  60. select BR2_ARCH_HAS_MMU_MANDATORY
  61. help
  62. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  63. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  64. http://en.wikipedia.org/wiki/ARM
  65. config BR2_bfin
  66. bool "Blackfin"
  67. select BR2_ARCH_HAS_FDPIC_SUPPORT
  68. help
  69. The Blackfin is a family of 16 or 32-bit microprocessors developed,
  70. manufactured and marketed by Analog Devices.
  71. http://www.analog.com/
  72. http://en.wikipedia.org/wiki/Blackfin
  73. config BR2_i386
  74. bool "i386"
  75. select BR2_ARCH_HAS_MMU_MANDATORY
  76. help
  77. Intel i386 architecture compatible microprocessor
  78. http://en.wikipedia.org/wiki/I386
  79. config BR2_m68k
  80. bool "m68k"
  81. # MMU support is set by the subarchitecture file, arch/Config.in.m68k
  82. help
  83. Motorola 68000 family microprocessor
  84. http://en.wikipedia.org/wiki/M68k
  85. config BR2_microblazeel
  86. bool "Microblaze AXI (little endian)"
  87. select BR2_ARCH_HAS_MMU_MANDATORY
  88. help
  89. Soft processor core designed for Xilinx FPGAs from Xilinx. AXI bus
  90. based architecture (little endian)
  91. http://www.xilinx.com
  92. http://en.wikipedia.org/wiki/Microblaze
  93. config BR2_microblazebe
  94. bool "Microblaze non-AXI (big endian)"
  95. select BR2_ARCH_HAS_MMU_MANDATORY
  96. help
  97. Soft processor core designed for Xilinx FPGAs from Xilinx. PLB bus
  98. based architecture (non-AXI, big endian)
  99. http://www.xilinx.com
  100. http://en.wikipedia.org/wiki/Microblaze
  101. config BR2_mips
  102. bool "MIPS (big endian)"
  103. select BR2_ARCH_HAS_MMU_MANDATORY
  104. help
  105. MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
  106. http://www.mips.com/
  107. http://en.wikipedia.org/wiki/MIPS_Technologies
  108. config BR2_mipsel
  109. bool "MIPS (little endian)"
  110. select BR2_ARCH_HAS_MMU_MANDATORY
  111. help
  112. MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
  113. http://www.mips.com/
  114. http://en.wikipedia.org/wiki/MIPS_Technologies
  115. config BR2_mips64
  116. bool "MIPS64 (big endian)"
  117. select BR2_ARCH_IS_64
  118. select BR2_ARCH_HAS_MMU_MANDATORY
  119. help
  120. MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
  121. http://www.mips.com/
  122. http://en.wikipedia.org/wiki/MIPS_Technologies
  123. config BR2_mips64el
  124. bool "MIPS64 (little endian)"
  125. select BR2_ARCH_IS_64
  126. select BR2_ARCH_HAS_MMU_MANDATORY
  127. help
  128. MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
  129. http://www.mips.com/
  130. http://en.wikipedia.org/wiki/MIPS_Technologies
  131. config BR2_nios2
  132. bool "Nios II"
  133. select BR2_ARCH_HAS_MMU_MANDATORY
  134. help
  135. Nios II is a soft core processor from Altera Corporation.
  136. http://www.altera.com/
  137. http://en.wikipedia.org/wiki/Nios_II
  138. config BR2_powerpc
  139. bool "PowerPC"
  140. select BR2_ARCH_HAS_MMU_MANDATORY
  141. help
  142. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  143. Big endian.
  144. http://www.power.org/
  145. http://en.wikipedia.org/wiki/Powerpc
  146. config BR2_powerpc64
  147. bool "PowerPC64 (big endian)"
  148. select BR2_ARCH_IS_64
  149. select BR2_ARCH_HAS_MMU_MANDATORY
  150. help
  151. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  152. Big endian.
  153. http://www.power.org/
  154. http://en.wikipedia.org/wiki/Powerpc
  155. config BR2_powerpc64le
  156. bool "PowerPC64 (little endian)"
  157. select BR2_ARCH_IS_64
  158. select BR2_ARCH_HAS_MMU_MANDATORY
  159. help
  160. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  161. Little endian.
  162. http://www.power.org/
  163. http://en.wikipedia.org/wiki/Powerpc
  164. config BR2_sh
  165. bool "SuperH"
  166. select BR2_ARCH_HAS_MMU_OPTIONAL
  167. help
  168. SuperH (or SH) is a 32-bit reduced instruction set computer (RISC)
  169. instruction set architecture (ISA) developed by Hitachi.
  170. http://www.hitachi.com/
  171. http://en.wikipedia.org/wiki/SuperH
  172. config BR2_sparc
  173. bool "SPARC"
  174. select BR2_ARCH_HAS_MMU_MANDATORY
  175. help
  176. SPARC (from Scalable Processor Architecture) is a RISC instruction
  177. set architecture (ISA) developed by Sun Microsystems.
  178. http://www.oracle.com/sun
  179. http://en.wikipedia.org/wiki/Sparc
  180. config BR2_sparc64
  181. bool "SPARC64"
  182. select BR2_ARCH_IS_64
  183. select BR2_ARCH_HAS_MMU_MANDATORY
  184. help
  185. SPARC (from Scalable Processor Architecture) is a RISC instruction
  186. set architecture (ISA) developed by Sun Microsystems.
  187. http://www.oracle.com/sun
  188. http://en.wikipedia.org/wiki/Sparc
  189. config BR2_x86_64
  190. bool "x86_64"
  191. select BR2_ARCH_IS_64
  192. select BR2_ARCH_HAS_MMU_MANDATORY
  193. help
  194. x86-64 is an extension of the x86 instruction set (Intel i386
  195. architecture compatible microprocessor).
  196. http://en.wikipedia.org/wiki/X86_64
  197. config BR2_xtensa
  198. bool "Xtensa"
  199. # MMU support is set by the subarchitecture file, arch/Config.in.xtensa
  200. help
  201. Xtensa is a Tensilica processor IP architecture.
  202. http://en.wikipedia.org/wiki/Xtensa
  203. http://www.tensilica.com/
  204. endchoice
  205. # The following string values are defined by the individual
  206. # Config.in.$ARCH files
  207. config BR2_ARCH
  208. string
  209. config BR2_ENDIAN
  210. string
  211. config BR2_GCC_TARGET_ARCH
  212. string
  213. config BR2_GCC_TARGET_ABI
  214. string
  215. config BR2_GCC_TARGET_CPU
  216. string
  217. config BR2_GCC_TARGET_CPU_REVISION
  218. string
  219. # The value of this option will be passed as --with-fpu=<value> when
  220. # building gcc (internal backend) or -mfpu=<value> in the toolchain
  221. # wrapper (external toolchain)
  222. config BR2_GCC_TARGET_FPU
  223. string
  224. # The value of this option will be passed as --with-float=<value> when
  225. # building gcc (internal backend) or -mfloat-abi=<value> in the toolchain
  226. # wrapper (external toolchain)
  227. config BR2_GCC_TARGET_FLOAT_ABI
  228. string
  229. # The value of this option will be passed as --with-mode=<value> when
  230. # building gcc (internal backend) or -m<value> in the toolchain
  231. # wrapper (external toolchain)
  232. config BR2_GCC_TARGET_MODE
  233. string
  234. # Must be selected by binary formats that support shared libraries.
  235. config BR2_BINFMT_SUPPORTS_SHARED
  236. bool
  237. # Set up target binary format
  238. choice
  239. prompt "Target Binary Format"
  240. default BR2_BINFMT_ELF if BR2_USE_MMU
  241. default BR2_BINFMT_FDPIC if BR2_ARCH_HAS_FDPIC_SUPPORT
  242. default BR2_BINFMT_FLAT
  243. config BR2_BINFMT_ELF
  244. bool "ELF"
  245. depends on BR2_USE_MMU
  246. select BR2_BINFMT_SUPPORTS_SHARED
  247. help
  248. ELF (Executable and Linkable Format) is a format for libraries and
  249. executables used across different architectures and operating
  250. systems.
  251. config BR2_BINFMT_FDPIC
  252. bool "FDPIC"
  253. depends on BR2_ARCH_HAS_FDPIC_SUPPORT
  254. select BR2_BINFMT_SUPPORTS_SHARED
  255. help
  256. ELF FDPIC binaries are based on ELF, but allow the individual load
  257. segments of a binary to be located in memory independently of each
  258. other. This makes this format ideal for use in environments where no
  259. MMU is available.
  260. config BR2_BINFMT_FLAT
  261. bool "FLAT"
  262. depends on !BR2_USE_MMU
  263. help
  264. FLAT binary is a relatively simple and lightweight executable format
  265. based on the original a.out format. It is widely used in environment
  266. where no MMU is available.
  267. endchoice
  268. # Set up flat binary type
  269. choice
  270. prompt "FLAT Binary type"
  271. depends on BR2_BINFMT_FLAT
  272. default BR2_BINFMT_FLAT_ONE
  273. config BR2_BINFMT_FLAT_ONE
  274. bool "One memory region"
  275. help
  276. All segments are linked into one memory region.
  277. config BR2_BINFMT_FLAT_SEP_DATA
  278. bool "Separate data and code region"
  279. # this FLAT binary type technically exists on m68k, but fails
  280. # to build numerous packages: due to architecture limitation,
  281. # big functions cannot be built in this mode. They cause build
  282. # failures such as "Tried to convert PC relative branch to
  283. # absolute jump" or "error: value -yyyyy out of range".
  284. depends on BR2_bfin
  285. help
  286. Allow for the data and text segments to be separated and placed in
  287. different regions of memory.
  288. config BR2_BINFMT_FLAT_SHARED
  289. bool "Shared binary"
  290. depends on BR2_m68k || BR2_bfin
  291. # Even though this really generates shared binaries, there is no libdl
  292. # and dlopen() cannot be used. So packages that require shared
  293. # libraries cannot be built. Therefore, we don't select
  294. # BR2_BINFMT_SUPPORTS_SHARED and therefore force BR2_STATIC_LIBS.
  295. # Although this adds -static to the compilation, that's not a problem
  296. # because the -mid-shared-library option overrides it.
  297. help
  298. Allow to load and link indiviual FLAT binaries at run time.
  299. endchoice
  300. if BR2_arcle || BR2_arceb
  301. source "arch/Config.in.arc"
  302. endif
  303. if BR2_arm || BR2_armeb
  304. source "arch/Config.in.arm"
  305. endif
  306. if BR2_aarch64 || BR2_aarch64_be
  307. source "arch/Config.in.aarch64"
  308. endif
  309. if BR2_bfin
  310. source "arch/Config.in.bfin"
  311. endif
  312. if BR2_m68k
  313. source "arch/Config.in.m68k"
  314. endif
  315. if BR2_microblazeel || BR2_microblazebe
  316. source "arch/Config.in.microblaze"
  317. endif
  318. if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
  319. source "arch/Config.in.mips"
  320. endif
  321. if BR2_nios2
  322. source "arch/Config.in.nios2"
  323. endif
  324. if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
  325. source "arch/Config.in.powerpc"
  326. endif
  327. if BR2_sh
  328. source "arch/Config.in.sh"
  329. endif
  330. if BR2_sparc || BR2_sparc64
  331. source "arch/Config.in.sparc"
  332. endif
  333. if BR2_i386 || BR2_x86_64
  334. source "arch/Config.in.x86"
  335. endif
  336. if BR2_xtensa
  337. source "arch/Config.in.xtensa"
  338. endif
  339. endmenu # Target options