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@@ -0,0 +1,72 @@
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+From a5fa3b17cb10ce020f8b7fe6a26c45d75f55b481 Mon Sep 17 00:00:00 2001
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+From: Alexey Brodkin <abrodkin@synopsys.com>
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+Date: Fri, 31 Mar 2017 11:14:35 +0300
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+Subject: [PATCH] axs103: Support slave core kick-start on axs103 v1.1
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+ firmware
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+
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+In axs103 v1.1 procedure to kick-start slave cores has changed quite a bit
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+compared to previous implementation.
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+
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+In particular:
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+ * We used to have a generic START bit for all cores selected by CORE_SEL
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+ mask. But now we don't touch CORE_SEL at all because we have a dedicated
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+ START bit for each core:
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+ bit 0: Core 0 (master)
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+ bit 1: Core 1 (slave)
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+ * Now there's no need to select "manual" mode of core start
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+
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+Additional challenge for us is how to tell which axs103 firmware we're
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+dealing with. For now we'll rely on ARC core version which was bumped
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+from 2.1c to 3.0.
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+
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+Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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+Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
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+---
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+ board/synopsys/axs10x/axs10x.c | 23 +++++++++++++++++++++--
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+ 1 file changed, 21 insertions(+), 2 deletions(-)
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+
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+diff --git a/board/synopsys/axs10x/axs10x.c b/board/synopsys/axs10x/axs10x.c
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+index 57c790220f71..e6b69da3da7f 100644
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+--- a/board/synopsys/axs10x/axs10x.c
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++++ b/board/synopsys/axs10x/axs10x.c
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+@@ -7,6 +7,7 @@
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+ #include <common.h>
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+ #include <dwmmc.h>
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+ #include <malloc.h>
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++#include <asm/arcregs.h>
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+ #include "axs10x.h"
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+
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+ DECLARE_GLOBAL_DATA_PTR;
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+@@ -66,9 +67,27 @@ void smp_kick_all_cpus(void)
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+ #define BITS_START_MODE 4
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+ #define BITS_CORE_SEL 9
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+
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++/*
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++ * In axs103 v1.1 START bits semantics has changed quite a bit.
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++ * We used to have a generic START bit for all cores selected by CORE_SEL mask.
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++ * But now we don't touch CORE_SEL at all because we have a dedicated START bit
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++ * for each core:
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++ * bit 0: Core 0 (master)
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++ * bit 1: Core 1 (slave)
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++ */
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++#define BITS_START_CORE1 1
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++
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++#define ARCVER_HS38_3_0 0x53
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++
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++ int core_family = read_aux_reg(ARC_AUX_IDENTITY) & 0xff;
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+ int cmd = readl((void __iomem *)AXC003_CREG_CPU_START);
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+- cmd |= (1 << BITS_CORE_SEL) | (1 << BITS_START);
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+- cmd &= ~(1 << BITS_START_MODE);
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++
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++ if (core_family < ARCVER_HS38_3_0) {
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++ cmd |= (1 << BITS_CORE_SEL) | (1 << BITS_START);
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++ cmd &= ~(1 << BITS_START_MODE);
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++ } else {
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++ cmd |= (1 << BITS_START_CORE1);
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++ }
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+ writel(cmd, (void __iomem *)AXC003_CREG_CPU_START);
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+ }
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+ #endif
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+--
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+2.7.4
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+
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