Browse Source

Linux_SDK_V0.9.5

thead_admin 1 year ago
commit
a82fcbc63c
100 changed files with 18140 additions and 0 deletions
  1. 13 0
      .gitignore
  2. 3 0
      .gitmodules
  3. 137 0
      Makefile
  4. 14 0
      README.md
  5. 1005 0
      driver/board/dts_FM_95P_VI_V2_SP1.txt
  6. 0 0
      driver/xrp-kernel/.deps/.dirstamp
  7. 192 0
      driver/xrp-kernel/.deps/libxrp_host_standalone_a-xrp_alloc.Po
  8. 0 0
      driver/xrp-kernel/.dirstamp
  9. 49 0
      driver/xrp-kernel/Kconfig
  10. 63 0
      driver/xrp-kernel/Makefile
  11. 25 0
      driver/xrp-kernel/README
  12. 59 0
      driver/xrp-kernel/cdns,xrp,cma.txt
  13. 43 0
      driver/xrp-kernel/cdns,xrp,v1.txt
  14. 52 0
      driver/xrp-kernel/cdns,xrp-hw-hikey960,cma.txt
  15. 41 0
      driver/xrp-kernel/cdns,xrp-hw-hikey960,v1.txt
  16. 65 0
      driver/xrp-kernel/cdns,xrp-hw-simple,cma.txt
  17. 54 0
      driver/xrp-kernel/cdns,xrp-hw-simple,v1.txt
  18. 55 0
      driver/xrp-kernel/cdns,xrp-hw-simple.txt
  19. 46 0
      driver/xrp-kernel/cdns,xrp.txt
  20. 12 0
      driver/xrp-kernel/insmod.sh
  21. 20 0
      driver/xrp-kernel/insmod_load_fw_man.sh
  22. 6 0
      driver/xrp-kernel/rmmod.sh
  23. 173 0
      driver/xrp-kernel/xrp_address_map.c
  24. 78 0
      driver/xrp-kernel/xrp_address_map.h
  25. 443 0
      driver/xrp-kernel/xrp_alloc.c
  26. 113 0
      driver/xrp-kernel/xrp_alloc.h
  27. 147 0
      driver/xrp-kernel/xrp_cma_alloc.c
  28. 44 0
      driver/xrp-kernel/xrp_cma_alloc.h
  29. 275 0
      driver/xrp-kernel/xrp_debug.c
  30. 34 0
      driver/xrp-kernel/xrp_debug.h
  31. 406 0
      driver/xrp-kernel/xrp_firmware.c
  32. 50 0
      driver/xrp-kernel/xrp_firmware.h
  33. 251 0
      driver/xrp-kernel/xrp_hw.h
  34. 157 0
      driver/xrp-kernel/xrp_hw_comm.c
  35. 480 0
      driver/xrp-kernel/xrp_hw_hikey960.c
  36. 53 0
      driver/xrp-kernel/xrp_hw_hikey960_dsp_interface.h
  37. 1158 0
      driver/xrp-kernel/xrp_hw_simple.c
  38. 66 0
      driver/xrp-kernel/xrp_hw_simple_dsp_interface.h
  39. 92 0
      driver/xrp-kernel/xrp_internal.h
  40. 107 0
      driver/xrp-kernel/xrp_kernel_defs.h
  41. 150 0
      driver/xrp-kernel/xrp_kernel_dsp_interface.h
  42. 43 0
      driver/xrp-kernel/xrp_kernel_report.h
  43. 35 0
      driver/xrp-kernel/xrp_private_alloc.h
  44. 40 0
      driver/xrp-kernel/xrp_ring_buffer.h
  45. 3287 0
      driver/xrp-kernel/xvp_main.c
  46. 68 0
      driver/xrp-user/Makefile
  47. 1363 0
      driver/xrp-user/dsp-ps/csi_dsp_core.c
  48. 127 0
      driver/xrp-user/dsp-ps/csi_dsp_core.h
  49. 159 0
      driver/xrp-user/dsp-ps/csi_dsp_helper.c
  50. 46 0
      driver/xrp-user/dsp-ps/dsp_common.c
  51. 353 0
      driver/xrp-user/dsp-ps/list.h
  52. 232 0
      driver/xrp-user/include/csi_dsp_api.h
  53. 144 0
      driver/xrp-user/include/csi_dsp_post_process_defs.h
  54. 229 0
      driver/xrp-user/include/csi_dsp_task_defs.h
  55. 91 0
      driver/xrp-user/include/dsp_common.h
  56. 144 0
      driver/xrp-user/include/dsp_ps_ns.h
  57. 612 0
      driver/xrp-user/include/xrp_api.h
  58. 0 0
      driver/xrp-user/xrp-common/.deps/.dirstamp
  59. 50 0
      driver/xrp-user/xrp-common/.deps/libxrp_host_single_a-xrp_ns.Po
  60. 50 0
      driver/xrp-user/xrp-common/.deps/xrp_ns.Po
  61. 37 0
      driver/xrp-user/xrp-common/.deps/xrp_rb_file.Po
  62. 0 0
      driver/xrp-user/xrp-common/.dirstamp
  63. 39 0
      driver/xrp-user/xrp-common/Makefile
  64. 31 0
      driver/xrp-user/xrp-common/Makefile.am
  65. 657 0
      driver/xrp-user/xrp-common/Makefile.in
  66. 38 0
      driver/xrp-user/xrp-common/xrp_debug.h
  67. 201 0
      driver/xrp-user/xrp-common/xrp_ns.c
  68. 52 0
      driver/xrp-user/xrp-common/xrp_ns.h
  69. 71 0
      driver/xrp-user/xrp-common/xrp_rb_file.c
  70. 33 0
      driver/xrp-user/xrp-common/xrp_rb_file.h
  71. 39 0
      driver/xrp-user/xrp-common/xrp_types.h
  72. 228 0
      driver/xrp-user/xrp-host/.deps/libxrp_host_hosted_a-xrp_host_common.Po
  73. 1 0
      driver/xrp-user/xrp-host/.deps/libxrp_host_hosted_a-xrp_sync_queue.Po
  74. 211 0
      driver/xrp-user/xrp-host/.deps/libxrp_host_hosted_a-xrp_threaded_queue.Po
  75. 204 0
      driver/xrp-user/xrp-host/.deps/libxrp_host_single_a-xrp_host_common.Po
  76. 1 0
      driver/xrp-user/xrp-host/.deps/libxrp_host_single_a-xrp_sync_queue.Po
  77. 196 0
      driver/xrp-user/xrp-host/.deps/libxrp_host_single_a-xrp_threaded_queue.Po
  78. 204 0
      driver/xrp-user/xrp-host/.deps/libxrp_host_standalone_a-xrp_host_common.Po
  79. 1 0
      driver/xrp-user/xrp-host/.deps/libxrp_host_standalone_a-xrp_sync_queue.Po
  80. 196 0
      driver/xrp-user/xrp-host/.deps/libxrp_host_standalone_a-xrp_threaded_queue.Po
  81. 52 0
      driver/xrp-user/xrp-host/Makefile
  82. 69 0
      driver/xrp-user/xrp-host/Makefile.am
  83. 0 0
      driver/xrp-user/xrp-host/hosted/.deps/.dirstamp
  84. 1 0
      driver/xrp-user/xrp-host/hosted/.deps/libxrp_host_hosted_a-xrp_elf.Po
  85. 298 0
      driver/xrp-user/xrp-host/hosted/.deps/libxrp_host_hosted_a-xrp_linux.Po
  86. 0 0
      driver/xrp-user/xrp-host/hosted/.dirstamp
  87. 76 0
      driver/xrp-user/xrp-host/hosted/xrp_host_impl.h
  88. 478 0
      driver/xrp-user/xrp-host/hosted/xrp_linux.c
  89. 24 0
      driver/xrp-user/xrp-host/thread-pthread/xrp_queue_impl.h
  90. 107 0
      driver/xrp-user/xrp-host/thread-pthread/xrp_thread_impl.h
  91. 31 0
      driver/xrp-user/xrp-host/xrp_atomic.h
  92. 482 0
      driver/xrp-user/xrp-host/xrp_host_common.c
  93. 138 0
      driver/xrp-user/xrp-host/xrp_host_common.h
  94. 139 0
      driver/xrp-user/xrp-host/xrp_report.c
  95. 61 0
      driver/xrp-user/xrp-host/xrp_report.h
  96. 84 0
      driver/xrp-user/xrp-host/xrp_sync_queue.c
  97. 52 0
      driver/xrp-user/xrp-host/xrp_sync_queue.h
  98. 242 0
      driver/xrp-user/xrp-host/xrp_threaded_queue.c
  99. 62 0
      driver/xrp-user/xrp-host/xrp_threaded_queue.h
  100. BIN
      firmware/dsp1_dummy_algo_flo.lib

+ 13 - 0
.gitignore

@@ -0,0 +1,13 @@
+*.o
+*.a
+*.o.d
+*.o.cmd
+*.a.cmd
+*.ko.cmd
+*.ko
+*.mod
+*.mod.c
+*.mod.cmd
+Module.symvers
+*.so
+*.Module.*

+ 3 - 0
.gitmodules

@@ -0,0 +1,3 @@
+[submodule "CSI_DSP_FW"]
+	path = CSI_DSP_FW
+	url = git@gitlab.alibaba-inc.com:thead-linux-private/csi_dsp_firmware.git

+ 137 - 0
Makefile

@@ -0,0 +1,137 @@
+##
+ # Copyright (C) 2021 Alibaba Group Holding Limited
+ #
+ # This program is free software; you can redistribute it and/or modify
+ # it under the terms of the GNU General Public License version 2 as
+ # published by the Free Software Foundation.
+##
+
+test = $(shell if [ -f "../.param" ]; then echo "exist"; else echo "noexist"; fi)
+ifeq ("$(test)", "exist")
+  include ../.param
+endif
+
+CONFIG_DRIVER_BUILD_PARAMS=KERNEL=$(LINUX_DIR) CROSS=$(CROSS_COMPILE) ARCH=$(ARCH) BOARD_NAME=$(BOARD_NAME)
+CONFIG_LIB_BUILD_PARAMS=CROSS=$(CROSS_COMPILE) ARCH=$(ARCH) BOARD_NAME=$(BOARD_NAME)
+CONFIG_TEST_BUILD_PARAMS=CROSS=$(CROSS_COMPILE) ARCH=$(ARCH) BOARD_NAME=$(BOARD_NAME)
+
+MODULE_NAME=xtensa_dsp
+BUILD_LOG_START="\033[47;30m>>> $(MODULE_NAME) $@ begin\033[0m"
+BUILD_LOG_END  ="\033[47;30m<<< $(MODULE_NAME) $@ end\033[0m"
+
+DIR_TARGET_BASE=bsp/xtensa_dsp
+DIR_TARGET_LIB =bsp/xtensa_dsp/lib
+DIR_TARGET_KO  =bsp/xtensa_dsp/ko
+DIR_TARGET_TEST=bsp/xtensa_dsp/test
+
+
+
+#
+# Do a parallel build with multiple jobs, based on the number of CPUs online
+# in this system: 'make -j8' on a 8-CPU system, etc.
+#
+# (To override it, run 'make JOBS=1' and similar.)
+#
+ifeq ($(JOBS),)
+  JOBS := $(shell grep -c ^processor /proc/cpuinfo 2>/dev/null)
+  ifeq ($(JOBS),)
+    JOBS := 1
+  endif
+endif
+
+all:    info lib driver test  install_local_output install_rootfs
+.PHONY: info driver lib test  install_local_output install_rootfs \
+        clean_driver clean_lib clean_test clean_tools clean_output clean
+
+info:
+	@echo $(BUILD_LOG_START)
+	@echo "  ====== Build Info from repo project ======"
+	@echo "    BUILDROOT_DIR="$(BUILDROOT_DIR)
+	@echo "    CROSS_COMPILE="$(CROSS_COMPILE)
+	@echo "    LINUX_DIR="$(LINUX_DIR)
+	@echo "    ARCH="$(ARCH)
+	@echo "    BOARD_NAME="$(BOARD_NAME)
+	@echo "    KERNEL_ID="$(KERNELVERSION)
+	@echo "    KERNEL_DIR="$(LINUX_DIR)
+	@echo "    INSTALL_DIR_ROOTFS="$(INSTALL_DIR_ROOTFS)
+	@echo "    INSTALL_DIR_SDK="$(INSTALL_DIR_SDK)
+	@echo "    CONFIG_DRIVER_BUILD_PARAMS="$(CONFIG_DRIVER_BUILD_PARAMS)
+	@echo "    CONFIG_LIB_BUILD_PARAMS="$(CONFIG_LIB_BUILD_PARAMS)
+	@echo "    CONFIG_TEST_BUILD_PARAMS="$(CONFIG_TEST_BUILD_PARAMS)
+	@echo $(BUILD_LOG_END)
+
+driver:
+	@echo $(BUILD_LOG_START)
+	make -C driver/xrp-kernel  $(CONFIG_DRIVER_BUILD_PARAMS) BUILD_TYPE=DEBUG
+	@echo $(BUILD_LOG_END)
+
+clean_driver:
+	@echo $(BUILD_LOG_START)
+	make -C driver/xrp-kernel  $(CONFIG_DRIVER_BUILD_PARAMS) clean
+	@echo $(BUILD_LOG_END)
+
+lib:
+	@echo $(BUILD_LOG_START)
+	# make -C driver/xrp-user/xrp-host $(CONFIG_LIB_BUILD_PARAMS)
+	# make -C driver/xrp-user/xrp-common $(CONFIG_LIB_BUILD_PARAMS)
+	make -C driver/xrp-user/  $(CONFIG_LIB_BUILD_PARAMS)
+	@echo $(BUILD_LOG_END)
+ 
+clean_lib:
+	@echo $(BUILD_LOG_START)
+	make -C driver/xrp-user/xrp-host  clean
+	make -C driver/xrp-user/xrp-common  clean
+	make -C driver/xrp-user/  clean
+	@echo $(BUILD_LOG_END)
+
+test: lib driver
+	@echo $(BUILD_LOG_START)
+	make -C test/vi_test $(CONFIG_TEST_BUILD_PARAMS)
+	make -C test/npu_test $(CONFIG_TEST_BUILD_PARAMS)
+	make -C test/ip_test $(CONFIG_TEST_BUILD_PARAMS)
+	make -C test/drv_test $(CONFIG_TEST_BUILD_PARAMS)
+	@echo $(BUILD_LOG_END)
+
+clean_test:
+	@echo $(BUILD_LOG_START)
+	make -C test/vi_test  clean
+	make -C test/npu_test clean
+	make -C test/ip_test clean
+	make -C test/drv_test clean	
+	@echo $(BUILD_LOG_END)
+
+
+install_local_output: driver lib test
+	@echo $(BUILD_LOG_START)
+	# driver files
+	mkdir -p ./output/rootfs/$(DIR_TARGET_KO)
+	cp -f ./driver/xrp-kernel/*.ko ./output/rootfs/$(DIR_TARGET_KO)
+
+	# lib files
+	mkdir -p ./output/rootfs/$(DIR_TARGET_LIB)
+	cp -f ./driver/xrp-user/*.so  ./output/rootfs/$(DIR_TARGET_LIB)
+	# test files
+	mkdir -p ./output/rootfs/$(DIR_TARGET_TEST)
+	cp -rf ./test/vi_test/output/* ./output/rootfs/$(DIR_TARGET_TEST)
+	cp -rf ./test/npu_test/output/* ./output/rootfs/$(DIR_TARGET_TEST)
+	cp -rf ./test/ip_test/output/* ./output/rootfs/$(DIR_TARGET_TEST)
+	cp -rf ./test/drv_test/output/* ./output/rootfs/$(DIR_TARGET_TEST)
+	@if [ `command -v tree` != "" ]; then \
+	    tree ./output/rootfs -I 'sdk' | grep -v "\.json"; \
+	    echo "INFO: The files above, has filter out the sdk folder and .json files"; \
+	fi
+	@echo $(BUILD_LOG_END)
+
+install_rootfs: install_local_output
+	@echo $(BUILD_LOG_START)
+#	cp -rf output/rootfs/* $(INSTALL_DIR_ROOTFS)
+	@echo $(BUILD_LOG_END)
+
+clean_output:
+	@echo $(BUILD_LOG_START)
+	rm -rf ./output
+	rm -rf $(INSTALL_DIR_ROOTFS)/$(DIR_TARGET_BASE)
+	@echo $(BUILD_LOG_END)
+
+clean: clean_output clean_driver clean_lib clean_test 
+

+ 14 - 0
README.md

@@ -0,0 +1,14 @@
+# How to get the code
+- git clone git@gitlab.alibaba-inc.com:thead-linux-private/xtensa_dsp.git
+
+# How to build
+## Build within repo project
+- XX
+## Build out of repo project
+- YY
+
+# Description of each directories
+- driver/: Linux kernel module Driver.
+- lib/: User mode libs and header files.
+- test/: Test cases and demo app.
+

+ 1005 - 0
driver/board/dts_FM_95P_VI_V2_SP1.txt

@@ -0,0 +1,1005 @@
+/dts-v1/;
+/ {
+	model = "T-HEAD Light FM c910 soc";
+	compatible = "thead,light_fm_c910_soc";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	memory@0 {
+		device_type = "memory";
+		/*
+		 * Total memory size: 8GB in HAPS system:
+		 * 0x0 00000000 - 0x1 80000000: 6GB reserved for Linux system
+		 * 0x1 80000000 - 0x0 80000000: 2GB reserved for Media system
+		 */
+		reg = <0x0 0x00000000 0x0 0x60000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		media-buffer@c0000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x0 0xc0000000 0x0 0x40000000>;
+			reusable;
+			status = "okay";
+		};
+
+		isp_reserved: isp@40000000 {
+			no-map;
+			reg = <0 0x40000000 0 0x10000000>;
+			status = "okay";
+		};
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		timebase-frequency = <3000000>;
+		cpu@0 {
+			device_type = "cpu";
+			reg = <0>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcvsu";
+			mmu-type = "riscv,sv39";
+			cpu0_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu@1 {
+			device_type = "cpu";
+			reg = <1>;
+			status = "disabled";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcvsu";
+			mmu-type = "riscv,sv39";
+			cpu1_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu@2 {
+			device_type = "cpu";
+			reg = <2>;
+			status = "disabled";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcvsu";
+			mmu-type = "riscv,sv39";
+			cpu2_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu@3 {
+			device_type = "cpu";
+			reg = <3>;
+			status = "disabled";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcvsu";
+			mmu-type = "riscv,sv39";
+			cpu3_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		intc: interrupt-controller@ffd8000000 {
+			#interrupt-cells = <1>;
+			compatible = "riscv,plic0";
+			interrupt-controller;
+			interrupts-extended = <
+				&cpu0_intc 0xffffffff &cpu0_intc 9
+				&cpu1_intc 0xffffffff &cpu1_intc 9
+				&cpu2_intc 0xffffffff &cpu2_intc 9
+				&cpu3_intc 0xffffffff &cpu3_intc 9
+			>;
+			reg = <0xff 0xd8000000 0x0 0x04000000>;
+			reg-names = "control";
+			riscv,max-priority = <7>;
+			riscv,ndev = <240>;
+		};
+
+		clocks {
+			compatible = "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			dummy_clock_apb: apb-clock@0 {
+				compatible = "fixed-clock";
+				reg = <0>;	/* Not address, just for index */
+				clock-frequency = <50000000>;
+				clock-output-names = "dummy_clock_apb";
+				#clock-cells = <0>;
+			};
+
+			dummy_clock_ref: ref-clock@1 {
+				compatible = "fixed-clock";
+				reg = <1>;	/* Not address, just for index */
+				clock-frequency = <50000000>;
+				clock-output-names = "dummy_clock_ref";
+				#clock-cells = <0>;
+			};
+
+			dummy_clock_suspend: suspend-clock@2 {
+				compatible = "fixed-clock";
+				reg = <2>;	/* Not address, just for index */
+				clock-frequency = <50000000>;
+				clock-output-names = "dummy_clock_suspend";
+				#clock-cells = <0>;
+			};
+
+			dummy_clock_rtc: rtc-clock@3 {
+				compatible = "fixed-clock";
+				reg = <3>;	/* Not address, just for index */
+				clock-frequency = <32768>;
+				clock-output-names = "dummy_clock_rtc";
+				#clock-cells = <0>;
+			};
+
+			dummy_clock_ahb: ahb-clock@4 {
+				compatible = "fixed-clock";
+				reg = <4>;	/* Not address, just for index */
+				clock-frequency = <50000000>;
+				clock-output-names = "dummy_clock_ahb";
+				#clock-cells = <0>;
+			};
+
+			dummy_clock_npu: npu-clock@5 {
+				compatible = "fixed-clock";
+				reg = <5>;	/* Not address, just for index */
+				clock-frequency = <24000000>;
+				clock-output-names = "dummy_clock_npu";
+				#clock-cells = <0>;
+			};
+		};
+
+		gpio0: gpio@ffec005000 {
+			compatible = "snps,dw-apb-gpio";
+			reg = <0xff 0xec005000 0x0 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			gpio0_porta: gpio0-controller@0 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <0>;
+
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				interrupt-parent = <&intc>;
+				interrupts = <56>;
+			};
+		};
+
+		gpio1: gpio@ffec006000 {
+			compatible = "snps,dw-apb-gpio";
+			reg = <0xff 0xec006000 0x0 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			gpio1_porta: gpio1-controller@0 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <0>;
+
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				interrupt-parent = <&intc>;
+				interrupts = <57>;
+			};
+		};
+
+		gpio2: gpio@ffe7f34000 {
+			compatible = "snps,dw-apb-gpio";
+			reg = <0xff 0xe7f34000 0x0 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			gpio2_porta: gpio2-controller@0 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <0>;
+
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				interrupt-parent = <&intc>;
+				interrupts = <58>;
+			};
+		};
+
+		gpio3: gpio@ffe7f38000 {
+			compatible = "snps,dw-apb-gpio";
+			reg = <0xff 0xe7f38000 0x0 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			gpio3_porta: gpio3-controller@0 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <0>;
+
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				interrupt-parent = <&intc>;
+				interrupts = <59>;
+			};
+		};
+
+		timer0: timer@ffefc32000 {
+			compatible = "snps,dw-apb-timer";
+			reg = <0xff 0xefc32000 0x0 0x14>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "timer";
+			clock-frequency = <50000000>;
+			interrupts = <16>;
+			interrupt-parent = <&intc>;
+			status = "okay";
+		};
+
+		timer1: timer@ffefc32014 {
+			compatible = "snps,dw-apb-timer";
+			reg = <0xff 0xefc32014 0x0 0x14>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "timer";
+			clock-frequency = <50000000>;
+			interrupts = <17>;
+			interrupt-parent = <&intc>;
+			status = "okay";
+		};
+
+		timer2: timer@ffefc32028 {
+			compatible = "snps,dw-apb-timer";
+			reg = <0xff 0xefc32028 0x0 0x14>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "timer";
+			clock-frequency = <50000000>;
+			interrupts = <18>;
+			interrupt-parent = <&intc>;
+			status = "disabled";
+		};
+
+		timer3: timer@ffefc3203c {
+			compatible = "snps,dw-apb-timer";
+			reg = <0xff 0xefc3203c 0x0 0x14>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "timer";
+			clock-frequency = <50000000>;
+			interrupts = <19>;
+			interrupt-parent = <&intc>;
+			status = "disabled";
+		};
+
+		timer4: timer@ffffc33000 {
+			compatible = "snps,dw-apb-timer";
+			reg = <0xff 0xffc33000 0x0 0x14>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "timer";
+			clock-frequency = <50000000>;
+			interrupts = <20>;
+			interrupt-parent = <&intc>;
+			status = "disabled";
+		};
+
+		timer5: timer@ffffc33014 {
+			compatible = "snps,dw-apb-timer";
+			reg = <0xff 0xffc33014 0x0 0x14>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "timer";
+			clock-frequency = <50000000>;
+			interrupts = <21>;
+			interrupt-parent = <&intc>;
+			status = "disabled";
+		};
+
+		timer6: timer@ffffc33028 {
+			compatible = "snps,dw-apb-timer";
+			reg = <0xff 0xffc33028 0x0 0x14>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "timer";
+			clock-frequency = <50000000>;
+			interrupts = <22>;
+			interrupt-parent = <&intc>;
+			status = "disabled";
+		};
+
+		timer7: timer@ffffc3303c {
+			compatible = "snps,dw-apb-timer";
+			reg = <0xff 0xffc3303c 0x0 0x14>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "timer";
+			clock-frequency = <50000000>;
+			interrupts = <23>;
+			interrupt-parent = <&intc>;
+			status = "disabled";
+		};
+
+//		keys: gpio-keys@100 {
+//			compatible = "gpio-keys";
+//			reg = <0x0 0x100 0x0 0x0>;
+//
+//			key0 {
+//				label = "key0";
+//				gpios = <&gpio1_porta 7 1>;	/* GPIO_ACTIVE_LOW: 1 */
+//				linux,code = <59>;		/* KEY_F1: 59 */
+//				status = "okay";
+//			};
+//		};
+//
+//		leds: gpio-leds@200 {
+//			compatible = "gpio-leds";
+//			reg = <0x0 0x200 0x0 0x0>;
+//
+//			led0 {
+//				label = "led0";
+//				gpios = <&gpio1_porta 8 0>;	/* GPIO_ACTIVE_HIGH: 0 */
+//				default-state = "off";
+//			};
+//		};
+
+		uart0: serial@ffe7014000 { /* Normal serial, for C910 log */
+			compatible = "snps,dw-apb-uart";
+			reg = <0xff 0xe7014000 0x0 0x4000>;
+			interrupt-parent = <&intc>;
+			interrupts = <36>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "baudclk";
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			hw-flow-control = "unsupport";
+			status = "okay";
+		};
+		uart1: serial@ffe7f00000 { /* Normal serial, for C902 log */
+			compatible = "snps,dw-apb-uart";
+			reg = <0xff 0xe7f00000 0x0 0x4000>;
+			interrupt-parent = <&intc>;
+			interrupts = <37>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "baudclk";
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			hw-flow-control = "unsupport";
+			status = "okay";
+		};
+		uart2: serial@ffec010000 { /* IRDA supported serial, not in 85P bit */
+			compatible = "snps,dw-apb-uart";
+			reg = <0xff 0xec010000 0x0 0x4000>;
+			interrupt-parent = <&intc>;
+			interrupts = <38>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "baudclk";
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			hw-flow-control = "unsupport";
+			status = "disabled";
+		};
+		uart3: serial@ffe7f04000 { /* IRDA supported serial, not in 85P bit */
+			compatible = "snps,dw-apb-uart";
+			reg = <0xff 0xe7f04000 0x0 0x4000>;
+			interrupt-parent = <&intc>;
+			interrupts = <39>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "baudclk";
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			hw-flow-control = "unsupport";
+			status = "disabled";
+		};
+		uart4: serial@fff7f08000 { /* High Speed with Flow Ctrol serial */
+			compatible = "snps,dw-apb-uart";
+			reg = <0xff 0xf7f08000 0x0 0x4000>;
+			interrupt-parent = <&intc>;
+			interrupts = <40>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "baudclk";
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			hw-flow-control = "support";
+			status = "okay";
+		};
+		uart5: serial@fff7f0c000 { /* Normal serial, for external SE, not in 85P bit */
+			compatible = "snps,dw-apb-uart";
+			reg = <0xff 0xf7f0c000 0x0 0x4000>;
+			interrupt-parent = <&intc>;
+			interrupts = <41>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "baudclk";
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			hw-flow-control = "unsupport";
+			status = "disabled";
+		};
+
+		i2c0: i2c@ffe7f20000 {
+			compatible = "snps,designware-i2c";
+			reg = <0xff 0xe7f20000 0x0 0x4000>;
+			interrupt-parent = <&intc>;
+			interrupts = <44>;
+			clocks = <&dummy_clock_apb>;
+			clock-frequency = <100000>;
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+			eeprom@50 {
+				compatible = "atmel,24c32";
+				reg = <0x50>;
+				pagesize = <32>;
+			};
+		};
+
+		i2c2: i2c@ffec00c000{
+			compatible = "snps,designware-i2c";
+			reg = <0xff 0xec00c000 0x0 0x4000>;
+			interrupt-parent = <&intc>;
+			interrupts = <46>;
+			clocks = <&dummy_clock_apb>;
+			clock-frequency = <100000>;
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+			//status = "disabled";
+		};
+
+		i2c3: i2c@123321{
+                compatible = "snps,designware-i2c";
+                reg = <0xff 0xec014000 0x0 0x4000>;
+			    //reg = <0xff 0xec00c000 0x0 0x4000>;
+                interrupt-parent = <&intc>;
+                //interrupts = <46>;
+                clocks = <&dummy_clock_apb>;
+                clock-frequency = <100000>;
+
+                #address-cells = <1>;
+                #size-cells = <0>;
+                ov2775_0: ov2775_mipi@20 {
+                        compatible = "ovti,ov2775";
+                        //reg = <0x20>;
+                        reg = <0x10>;
+                        pinctrl-names = "default";
+                        clocks = <&dummy_clock_apb>;
+                        clock-names = "csi_mclk";
+                        //assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
+                        //assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
+                        assigned-clock-rates = <24000000>;
+                        csi_id = <0>;
+                        //pwn-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
+                        //rst-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+                        mclk = <24000000>;
+                        mclk_source = <0>;
+                        status = "okay";
+
+				port {
+					ov2775_mipi_0_ep: endpoint {
+						data-lanes = <1 2 3 4>;
+						clock-lanes = <0>;
+						max-pixel-frequency = /bits/ 64 <266000000>;
+						//remote-endpoint = <&mipi_csi0_ep>;
+					};
+				};
+
+			};
+		};
+
+		spi0: spi@ffe700c000 {
+			compatible = "snps,dw-apb-ssi";
+			reg = <0xff 0xe700c000 0x0 0x1000>;
+			interrupt-parent = <&intc>;
+			interrupts = <54>;
+			clocks = <&dummy_clock_apb>;
+			num-cs = <2>;
+			cs-gpios = <&gpio2_porta 15 0>, // GPIO_ACTIVE_HIGH: 0
+				   <&gpio2_porta 23 0>; // GPIO_ACTIVE_LOW: 1
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spi_norflash@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				compatible = "winbond,w25q64", "jedec,spi-nor";
+				reg = <0>;
+				spi-max-frequency = <8000000>;
+				w25q,fast-read;
+			};
+			spidev@1 {
+				compatible = "spidev";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <1>;
+				spi-max-frequency = <12500000>;
+			};
+		};
+
+		qspi0: spi@ffea000000 {
+			compatible = "snps,dw-apb-ssi-quad";
+			reg = <0xff 0xea000000 0x0 0x1000>;
+			interrupt-parent = <&intc>;
+			interrupts = <52>;
+			clocks = <&dummy_clock_apb>;
+			num-cs = <2>;
+			cs-gpios = <&gpio2_porta 3 0>, // GPIO_ACTIVE_HIGH: 0
+			           <&gpio2_porta 26 0>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spi-flash@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				compatible = "spi-nand";
+				spi-max-frequency = <10000000>;
+				spi-tx-bus-width = <4>;
+				spi-rx-bus-width = <4>;
+				reg = <0>;
+
+				partition@0 {
+					label = "ubi1";
+					reg = <0x00000000 0x08000000>;
+				};
+			};
+			spidev@1 {
+				compatible = "spidev";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <1>;
+				spi-max-frequency = <6250000>;
+			};
+		};
+
+		watchdog0: watchdog@ffefc30000 {
+			compatible = "snps,dw-wdt";
+			reg = <0xff 0xefc30000 0x0 0x1000>;
+			interrupt-parent = <&intc>;
+			interrupts = <24>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "baudclk";
+			status = "okay";
+		};
+
+		watchdog1: watchdog@ffefc31000 {
+			compatible = "snps,dw-wdt";
+			reg = <0xff 0xefc31000 0x0 0x1000>;
+			interrupt-parent = <&intc>;
+			interrupts = <25>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "baudclk";
+			status = "okay";
+		};
+
+		rtc: rtc@fffff40000 {
+			compatible = "apm,xgene-rtc";
+			reg = <0xff 0xfff40000 0x0 0x1000>;
+			interrupt-parent = <&intc>;
+			interrupts = <74>;
+			clocks = <&dummy_clock_rtc>;
+			clock-names = "rtc";
+			status = "okay";
+		};
+
+		usb: dwc3@ffe7040000 {
+			compatible = "snps,dwc3";
+			reg = <0xff 0xe7040000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <68>;
+			clocks = <&dummy_clock_ref>, <&dummy_clock_apb>, <&dummy_clock_suspend>;
+			clock-names = "ref", "bus_early", "suspend";
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			maximum-speed = "super-speed";
+			dr_mode = "peripheral";
+			snps,usb3_lpm_capable;
+			snps,dis_u3_susphy_quirk;
+			status = "disabled";
+		};
+
+		pmu: pmu@0 {
+			compatible = "riscv,c910_pmu";
+			reg = <0 0 0 0>; /* Not address, just for index */
+		};
+
+		dmac0: dmac@ffefc00000 {
+			compatible = "snps,axi-dma-1.01a";
+			reg = <0xff 0xefc00000 0x0 0x1000>;
+			interrupt-parent = <&intc>;
+			interrupts = <27>;
+			clocks = <&dummy_clock_apb>, <&dummy_clock_apb>;
+			clock-names = "core-clk", "cfgr-clk";
+
+			dma-channels = <4>;
+			snps,block-size = <65536 65536 65536 65536>;
+			snps,priority = <0 1 2 3>;
+			snps,dma-masters = <1>;
+			snps,data-width = <4>;
+			snps,axi-max-burst-len = <16>;
+			status = "disabled";
+		};
+
+		dmac1: tee_dmac@ffff340000 {
+			compatible = "snps,axi-dma-1.01a";
+			reg = <0xff 0xff340000 0x0 0x1000>;
+			interrupt-parent = <&intc>;
+			interrupts = <150>;
+			clocks = <&dummy_clock_apb>, <&dummy_clock_apb>;
+			clock-names = "core-clk", "cfgr-clk";
+
+			dma-channels = <4>;
+			snps,block-size = <65536 65536 65536 65536>;
+			snps,priority = <0 1 2 3>;
+			snps,dma-masters = <1>;
+			snps,data-width = <4>;
+			snps,axi-max-burst-len = <16>;
+			status = "disabled";
+		};
+
+		gmac: ethernet@ffe7070000 {
+			compatible = "snps,dwmac";
+			reg = <0xff 0xe7070000 0x0 0x2000>;
+			interrupt-parent = <&intc>;
+			interrupts = <66>;
+			interrupt-names = "macirq";
+			clocks = <&dummy_clock_apb>;
+			clock-names = "stmmaceth";
+			snps,pbl = <32>;
+			snps,fixed-burst;
+
+			max-speed = <100>;
+			phy-mode = "mii";
+			phy-handle = <&phy_88E1111>;
+			mdio0 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "snps,dwmac-mdio";
+
+				phy_88E1111: ethernet-phy@0 {
+					reg = <0x0 0x0>;
+				};
+			};
+		};
+
+		emmc: sdhci@ffe7080000 {
+			compatible = "snps,dwcmshc-sdhci";
+			reg = <0xff 0xe7080000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <62>;
+			interrupt-names = "sdhciirq";
+			clocks = <&dummy_clock_ahb>;
+			clock-names = "core";
+			max-frequency = <50000000>;
+			non-removable;
+			no-sdio;
+			no-sd;
+			bus-width = <8>;
+			status = "disabled";
+		};
+
+		sdhci0: sd@ffe7090000 {
+			compatible = "snps,dwcmshc-sdhci";
+			reg = <0xff 0xe7090000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <64>;
+			interrupt-names = "sdhci0irq";
+			clocks = <&dummy_clock_ahb>;
+			clock-names = "core";
+			max-frequency = <50000000>;
+			no-1-8-v;
+			bus-width = <4>;
+			status = "disabled";
+		};
+
+		hwspinlock: hwspinlock@ffefc10000 {
+			compatible = "light,hwspinlock";
+			reg = <0xff 0xefc10000 0x0 0x10000>;
+		};
+
+		npu: vha@fffc800000 {
+			compatible = "img,ax3386-nna";
+			reg = <0xff 0xfc800000 0x0 0x100000>;
+			interrupt-parent = <&intc>;
+			interrupts = <113>;
+			interrupt-names = "npuirq";
+			clocks = <&dummy_clock_npu>;
+			clock-names = "dummy_clock_npu";
+			vha_clk_rate = <24000000>;
+			ldo_vha-supply = <&npu>;
+			dma-mask = <0xf 0xffffffff>;
+			status = "disabled";
+		};
+
+		vdec: vdec@ffecc00000 {
+			compatible = "platform-vc8000d";
+			reg = <0xff 0xecc00000 0x0 0x1000>;
+			interrupt-parent = <&intc>;
+			interrupts = <131>;
+			status = "disabled";
+		};
+
+		venc: venc@ffecc10000 {
+			compatible = "platform-vc8000e";
+			reg = <0xff 0xecc10000 0x0 0x1000>;
+			interrupt-parent = <&intc>;
+			interrupts = <133>;
+			status = "disabled";
+		};
+
+		// from https://github.com/iwave-git-imx8mm-8mn/kernel_iwg34m/blob/62c0186302d2c4754e06722b3c38f6c4557b91f4/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+		aliases {
+			csi0 = &v4l2_mipi_csi_0;
+		};
+
+		v4l2_mipi_csi_0: mipi_csi@ff000000 {
+			compatible = "thead,light-mipi-csi";
+			//reg = < 0xff 0xe4000000 0x0 0x10000>;
+			reg = < 0x00 0xff000000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <199>;
+			clock-frequency = <24000000>;
+			bus-width = <4>;
+			no-reset-control;
+			status = "okay";
+
+			port@0 {
+				endpoint {
+					remote-endpoint = <&ov2775_mipi_0_ep>;
+					data-lanes = <4>;
+					csis-hs-settle = <16>;
+				};
+			};
+		};
+
+		v4l2_isp_0: v4l2_isp@ffe4100000 {
+			compatible = "fsl,imx8mp-isp";
+			reg = <0xff 0xe4100000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <117>;
+			memory-region = <&isp_reserved>;
+			clock-names = "core", "axi", "ahb";
+			//clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>;
+			//clock-names = "isp_root";
+			//assigned-clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>;
+			//assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
+			//assigned-clock-rates = <500000000>;
+			//power-domains = <&ispdwp_pd>;
+			id = <0>;
+			status = "okay";
+		};
+
+		v4l2_dewarp: dwe@ffe4130000 {
+			compatible = "fsl,imx8mp-dwe";
+			reg = <0xff 0xe4130000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <98>;
+			//clocks = <&clk IMX8MP_CLK_MEDIA_AXI>,
+			//	 <&clk IMX8MP_CLK_MEDIA_AXI>,
+			//	 <&clk IMX8MP_CLK_MEDIA_APB>;
+			clock-names = "core", "axi", "ahb";
+			//assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
+			//		  <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
+			//assigned-clock-rates = <500000000>, <200000000>;
+			//power-domains = <&ispdwp_pd>;
+			id = <0>;
+			status = "okay";
+		};
+
+		isp0: isp@ffe4100000 {
+			compatible = "thead,light-isp";
+			reg = <0xff 0xe4100000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <117>,<118>;
+			status = "okay";
+		};
+
+		isp1: isp@ffe4110000 {
+			compatible = "thead,light-isp";
+			reg = <0xff 0xe4110000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <120>,<121>;
+			status = "okay";
+		};
+
+		isp_ry0: isp_ry@ffe4120000 {
+			compatible = "thead,light-isp_ry";
+			reg = <0xff 0xe4120000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <123>,<124>;
+			status = "okay";
+		};
+
+		dewarp: dewarp@ffe4130000 {
+			compatible = "thead,light-dewarp";
+			reg = <0xff 0xe4130000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <98>,<99>;
+			status = "okay";
+		};
+
+		dec400_isp0: dec400@ffe4060000 {
+			compatible = "thead,dec400";
+			reg = <0xff 0xe4060000 0x0 0x8000>;
+			status = "okay";
+		};
+
+		dec400_isp1: dec400@ffe4068000 {
+			compatible = "thead,dec400";
+			reg = <0xff 0xe4068000 0x0 0x8000>;
+			status = "okay";
+		};
+
+		//isp-ry
+		dec400_isp2: dec400@ffe4070000 {
+			compatible = "thead,dec400";
+			reg = <0xff 0xe4070000 0x0 0x8000>;
+			status = "okay";
+		};
+
+		bm_visys: bm_visys@ffe4040000 {
+			compatible = "thead,light-bm-visys";
+			reg = <0xff 0xe4040000 0x0 0x10000>;
+			status = "okay";
+		};
+
+        bm_csi0: csi@ffe4000000{
+			compatible = "thead,light-bm-csi";
+			reg = < 0xff 0xe4000000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <128>;
+			dphyglueiftester = <0x180>;
+			status = "okay";
+			//status = "disabled";
+		};
+
+        bm_csi1: csi@ffe4020000{
+			compatible = "thead,light-bm-csi";
+			reg = < 0xff 0xe4020000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <127>;
+			dphyglueiftester = <0x184>;
+			status = "okay";
+			//status = "disabled";
+		};
+
+		bm_isp0: bm_isp@ffe4100000 {
+			compatible = "thead,light-bm-isp";
+			reg = <0xff 0xe4100000 0x0 0x10000>;
+			status = "okay";
+		};
+
+		bm_isp1: bm_isp@ffe4110000 {
+			compatible = "thead,light-bm-isp";
+			reg = <0xff 0xe4110000 0x0 0x10000>;
+			//status = "okay";
+			status = "disabled";
+		};
+
+		//isp-ry
+		bm_isp2: bm_isp@ffe4120000 {
+			compatible = "thead,light-bm-isp";
+			reg = <0xff 0xe4120000 0x0 0x10000>;
+			//status = "okay";
+			status = "disabled";
+		};
+
+		vi_pre: vi_pre@ffe4030000 {
+			compatible = "thead,vi_pre";
+			reg = <0xff 0xe4030000 0x0 0x1000>;
+			status = "okay";
+		};
+
+		xtensa_dsp:  dsp@01{
+			compatible = "thead,dsp-hw-common";
+			reg = <0xff 0xef040000 0x0 0x001000 >;   /*DSP_SYSREG(0x0000-0xFFF) */
+		};
+
+		xtensa_dsp0:	dsp@0 {
+			compatible = "cdns,xrp-hw-simple";
+			reg = <0xff 0xe4040190 0x0 0x000010   /* host irq DSP->CPU INT Register  */
+				   0xff 0xe40401e0 0x0 0x000010   /* device irq CPU->DSP INT Register  */
+				   0xff 0xef048000 0x0 0x008000    /*DSP_APB(0x0000-0xFFF) */
+				   0x00 0x90000000 0x0 0x00001000   /* DSP communication area */
+				   0x0  0x90001000 0x0 0x00fff000>;  /* DSP shared memory */
+			dsp = <0>;
+			dspsys-rst-bit = <8>;           /*bit# in DSP_SYSREG*/
+			dspsys-bus-offset = <0x90>;   /*in DSP_SYSREG*/
+			device-irq = <0x4 1 24>; /*0xff 0xe40401e4 offset to clear DSP I]RQ, bit#, IRQ# */
+			device-irq-host-offset = <0x8>;  /*0xff 0xe40401e8 offset to trigger DSP IRQ*/
+			device-irq-mode = <1>; /*level trigger*/
+			host-irq = <0x4 1>; /*0xff 0xe4040194 offset to clear, bit# */
+			host-irq-mode = <1>;   /*level trigger */
+			host-irq-offset = <0x8>;  /* 0xff 0xe4040198 offset to trigger ,device side*/
+			interrupt-parent = <&intc>;
+			interrupts = <156>;
+			firmware-name = "xrp0.elf";
+			ranges = <0x00 0x70000000 0x00 0x70000000 0x00 0x40000000 
+					  0x00 0xfa000000 0xff 0xe0000000 0x00 0x00180000
+			          0x00 0xe0180000 0xff 0xe0180000 0x00 0x00040000 
+					  0x00 0xffc00000 0xff 0xe4000000 0x00 0x00200000 >;  /* VISYS_R */			         
+			dsp@0 {
+				ranges = <0x00 0x70000000 0x00 0x70000000 0x00 0x40000000 
+						0x00 0xfa000000 0xff 0xe0000000 0x00 0x00180000
+						0x00 0xe0180000 0xff 0xe0180000 0x00 0x00040000 
+						0x00 0xffc00000 0xff 0xe4000000 0x00 0x00200000 >;  /* VISYS_R */		
+				
+			};
+		};
+
+
+		xtensa_dsp1:	dsp@1 {
+			compatible = "cdns,xrp-hw-simple";
+			reg = <0xff 0xe40401a0 0x0 0x000010   /* host irq DSP->CPU INT Register  */
+				   0xff 0xe40401d0 0x0 0x000010   /* device irq CPU->DSP INT Register  */
+				   0xff 0xef050000 0x0 0x008000    /*DSP_APB(0x0000-0xFFF) */
+				   0x00 0xa0000000 0x0 0x00001000   /* DSP communication area */
+				   0x0  0xa0001000 0x0 0x00fff000>;  /* DSP shared memory */
+			dsp = <1>;
+			dspsys-rst-bit = <8>;           /*bit# in DSP_SYSREG*/
+			dspsys-bus-offset = <0x90>;   /*in DSP_SYSREG*/
+			device-irq = <0x4 1 24>; /*0xff 0xe40401e4 offset to clear DSP I]RQ, bit#, IRQ# */
+			device-irq-host-offset = <0x8>;  /*0xff 0xe40401e8 offset to trigger DSP IRQ*/
+			device-irq-mode = <1>; /*level trigger*/
+			host-irq = <0x4 1>; /*0xff 0xe4040194 offset to clear, bit# */
+			host-irq-mode = <1>;   /*level trigger */
+			host-irq-offset = <0x8>;  /* 0xff 0xe4040198 offset to trigger ,device side*/
+			interrupt-parent = <&intc>;
+			interrupts = <157>;
+			firmware-name = "xrp1.elf";
+            status = "disabled";
+			ranges = <0x00 0x70000000 0x00 0x70000000 0x00 0x40000000 
+					  0x00 0xfa000000 0xff 0xe0000000 0x00 0x00180000
+			          0x00 0xe0180000 0xff 0xe01C0000 0x00 0x00040000 
+					  0x00 0xffc00000 0xff 0xe4000000 0x00 0x00200000 >;  /* VISYS_R */			         
+			dsp@0 {
+				ranges = <0x00 0x70000000 0x00 0x70000000 0x00 0x40000000 
+						0x00 0xfa000000 0xff 0xe0000000 0x00 0x00180000
+						0x00 0xe0180000 0xff 0xe01C0000 0x00 0x00040000 
+						0x00 0xffc00000 0xff 0xe4000000 0x00 0x00200000 >;  /* VISYS_R */		
+				
+			};
+		};
+
+
+
+		pmp: pmp@ffdc020000 {
+			compatible = "pmp";
+			reg = <0xff 0xdc020000 0x0 0x1000>;
+		};
+
+		mrvbr: mrvbr@ffff019050{
+			compatible = "mrvbr";
+			reg = <0xff 0xff019050 0x0 0x1000>;
+		};
+
+		mrmr: mrmr@ffff015004 {
+			compatible = "mrmr";
+			reg = <0xff 0xff015004 0x0 0x1000>;
+		};
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M sram=0xffe0000000,0x180000";
+		linux,initrd-start = <0x0 0x2000000>;
+		linux,initrd-end = <0x0 0x0>;
+		//bootargs = "console=ttyS0,115200 crashkernel=256M-:128M sram=0xffe0000000,0x180000 rdinit=/sbin/init root=/dev/nfs rw nfsroot=172.16.150.200:/home/share.dir/nfs/lucz/nfs_root,v3,tcp,nolock ip=172.16.150.233::172.16.150.254:255.255.255.0 rootwait";
+		//bootargs = "console=ttyS0,115200 crashkernel=256M-:128M sram=0xffe0000000,0x180000 rdinit=/sbin/init root=/dev/nfs rw nfsroot=172.16.150.200:/home/share.dir/nfs/lucz/nfs_root,v3,tcp,nolock ip=172.18.80.233::172.18.80.254:255.255.255.0 rootwait";
+		stdout-path = "/soc/serial@fff7014000:115200";
+	};
+};
+

+ 0 - 0
driver/xrp-kernel/.deps/.dirstamp


+ 192 - 0
driver/xrp-kernel/.deps/libxrp_host_standalone_a-xrp_alloc.Po

@@ -0,0 +1,192 @@
+../xrp-kernel/libxrp_host_standalone_a-xrp_alloc.o:  \
+ ../xrp-kernel/xrp_alloc.c \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/errno.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/yvals.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/sys/reent.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdio.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdio.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/mbstatet.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/wchar.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwcstod.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwstr.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/fenv.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/ymath.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/ymath.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdbool.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdlib.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdlib.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/alloca.h \
+  ../xrp-common/xrp_debug.h ../xrp-kernel/xrp_private_alloc.h \
+  ../xrp-kernel/xrp_alloc.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h \
+  xrp_atomic.h thread-xos/xrp_thread_impl.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_types.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/config/core.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-versions.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-types.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-matmap.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/tie.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-certified.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-compat.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/corebits.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_core.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_interrupt.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_timer.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_externalregisters.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_coprocessors.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/intctrl.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros-compat.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_common.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/system.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_params.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_errors.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_regaccess.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_log.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_thread.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_cond.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_event.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_mutex.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_msgq.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_semaphore.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_blockmem.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_barrier.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_timer.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_stopwatch.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_syslog.h
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/errno.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/yvals.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/sys/reent.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdio.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdio.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/mbstatet.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/wchar.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwcstod.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwstr.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/fenv.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/ymath.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/ymath.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdbool.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdlib.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdlib.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/alloca.h:
+
+../xrp-common/xrp_debug.h:
+
+../xrp-kernel/xrp_private_alloc.h:
+
+../xrp-kernel/xrp_alloc.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h:
+
+xrp_atomic.h:
+
+thread-xos/xrp_thread_impl.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_types.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/config/core.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-versions.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-types.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-matmap.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/tie.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-certified.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-compat.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/corebits.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_core.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_interrupt.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_timer.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_externalregisters.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_coprocessors.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/intctrl.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros-compat.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_common.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/system.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_params.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_errors.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_regaccess.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_log.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_thread.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_cond.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_event.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_mutex.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_msgq.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_semaphore.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_blockmem.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_barrier.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_timer.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_stopwatch.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_syslog.h:

+ 0 - 0
driver/xrp-kernel/.dirstamp


+ 49 - 0
driver/xrp-kernel/Kconfig

@@ -0,0 +1,49 @@
+#
+# Xtensa Remote Processing kernel driver
+#
+
+config XRP
+	tristate "XRP driver"
+	help
+	  This is the core of Cadence Xtensa Remote Processing driver.
+	  It should be enabled to support applications communicating with
+	  Xtensa DSPs through the XRP API.
+
+	  If unsure, say N.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called xrp.
+
+config XRP_DEBUG
+	bool "Debug XRP"
+	depends on XRP
+	help
+	  This enables verbose debug output of the XRP driver.
+
+	  If unsure, say N.
+
+config XRP_HW_SIMPLE
+	tristate "XRP for simple hardware"
+	depends on XRP
+	help
+	  This is hardware-specific XRP kernel driver for the simple
+	  hardware. It should be enabled to support XRP on simple hardware
+	  platforms.
+
+	  If unsure, say N.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called xrp_hw_simple.
+
+config XRP_HW_HIKEY960
+	tristate "XRP for HiKey960"
+	depends on XRP
+	help
+	  This is hardware-specific XRP kernel driver for the HiKey960
+	  hardware. It should be enabled to support XRP on HiKey960
+	  platform.
+
+	  If unsure, say N.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called xrp_hw_hikey960.

+ 63 - 0
driver/xrp-kernel/Makefile

@@ -0,0 +1,63 @@
+#
+# Copyright (c) 2017 Cadence Design Systems Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+#
+# Alternatively you can use and distribute this file under the terms of
+# the GNU General Public License version 2 or later.
+#
+ifdef VISYS_SYM_PATH
+KBUILD_EXTRA_SYMBOLS += $(VISYS_SYM_PATH)/bm_visys/Module.symvers
+else
+KBUILD_EXTRA_SYMBOLS += $(shell pwd)/../../../baremetal-drivers/driver/visys/Module.symvers
+endif
+# export KBUILD_EXTRA_SYMBOLS
+EXTRA_CFLAGS += -DWITH_VISYS_KO
+
+
+xrp-y += xvp_main.o xrp_address_map.o xrp_alloc.o xrp_debug.o
+xrp-$(CONFIG_OF) += xrp_firmware.o
+xrp-$(CONFIG_CMA) += xrp_cma_alloc.o
+
+obj-$(CONFIG_XRP) += xrp.o
+obj-$(CONFIG_XRP_HW_SIMPLE) += xrp_hw_simple.o
+obj-m += xrp_hw_comm.o
+obj-$(CONFIG_XRP_HW_HIKEY960) += xrp_hw_hikey960.o
+
+ifeq ($(BUILD_TYPE),DEBUG)
+	EXTRA_CFLAGS += -DDEBUG
+endif
+KBUILD_CFLAGS += -O2
+ccflags-$(CONFIG_XRP_DEBUG) += -DDEBUG
+ccflags-$(CONFIG_XRP_HW_HIKEY960) += -I$(srctree)/drivers/hisi/hifi_mailbox
+
+# Remove this comment and all lines below it when integrating this Makefile
+# into the linux kernel make system.
+#
+# sed -i % '/Remove this comment and all lines below it/,$d'
+# make -C $(KERNEL) M=$(PWD) modules
+
+# KSRC ?= /lib/modules/$(shell uname -r)/build
+
+modules:
+	$(MAKE) -C $(KERNEL) M=`pwd` CONFIG_XRP=m CONFIG_XRP_HW_SIMPLE=m CONFIG_XRP_DEBUG=y modules
+
+%:
+	$(MAKE) -C $(KERNEL) M=`pwd` CONFIG_XRP=m $@

+ 25 - 0
driver/xrp-kernel/README

@@ -0,0 +1,25 @@
+Driver parameters:
+
+- firmware_command_timeout, int: a number of seconds that the host waits for
+  the DSP to respond to a synchronization request or a command. Can be changed
+  at runtime through the following sysfs entry:
+    /sys/module/xrp/parameters/firmware_command_timeout
+
+- firmware_reboot, 0/1: controls whether the driver reboots firmware on
+  command timeout. Enabled by default and can be changed at runtime through
+  the following sysfs entry: /sys/module/xrp/parameters/firmware_reboot
+
+- loopback, 0/1/2/3: controls level of interaction between the driver and
+  the firmware.
+  0: normal operation. The driver loads firmware, controls DSP and interacts
+     with the firmware through shared memory;
+  1: no-communication loopback. The driver loads the firmware and controls
+     DSP, but does not communicate with firmware. Initial synchronization
+     is not performed and command submission is completed immediately after
+     all normal preparation steps related to buffer mapping. Communication
+     area is not touched by the driver.
+  2: no-control loopback. The driver loads the firmware, but does not control
+     DSP nor does it communicate with the firmware. Neither communication
+     area nor DSP MMIO area are touched by the driver.
+  3: no-firmware loopback. The driver doesn't load firmware, doesn't control
+     DSP and doesn't communicate with DSP.

+ 59 - 0
driver/xrp-kernel/cdns,xrp,cma.txt

@@ -0,0 +1,59 @@
+Bindings for the Cadence Xtensa Remote Processing driver, CMA mode.
+In CMA mode DSP communication area and shared memory are allocated from the
+CMA-managed reserved memory region assigned to the XRP device.
+
+Required properties:
+- compatible: shall be "cdns,xrp,cma".
+- memory-region: phandle, refers to a child node inside reserved-memory node.
+
+Optional properties:
+- queue-priority: cells indicating priorities of DSP hardware queues. If
+  missing then single default queue is configured.
+- firmware-name: string identifying firmware name. If missing the driver
+  doesn't load the firmware.
+
+- #address-cells: number of cells DSP physical address takes in the ranges.
+- #size-cells: number of cells each size takes in the ranges.
+- ranges: standard ranges property. Provides mapping of DSP physical addresses
+  to host physical addresses. Arbitrary number of groups with the following
+  structure:
+  - cells with DSP physical address of the region;
+  - cells with the corresponding host physical address of the
+    region;
+  - cells with the size of the region.
+  Ranges must cover addresses of the reserved memory pointed to by the
+  memory-region property.
+
+XRP node may have an optional subnode when there's non-identity mapping set
+up in the ranges property. Both subnode and ranges property are required in
+order for the address translation to work.
+
+Example:
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		xrp_reserved: xrp@08000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x08000000 0x08000000>;
+			reusable;
+		};
+	};
+
+	xrp@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "cdns,xrp,cma";
+		memory-region = <&xrp_reserved>;
+		queue-priority = <0 1 2>;
+		firmware-name = "xrp0.elf";
+		ranges = <0x00000000 0x00000000 0x10000000
+			  0x3ffc0000 0xc0000000 0x00020000
+			  0x3ffe0000 0xc0020000 0x00020000
+			  0x50000000 0x50000000 0x01000000
+			  0x60000000 0x60000000 0x20000000
+			  0xf0000000 0xf0000000 0x0d000000>;
+		dsp@0 {
+		};
+	};

+ 43 - 0
driver/xrp-kernel/cdns,xrp,v1.txt

@@ -0,0 +1,43 @@
+Bindings for the Cadence Xtensa Remote Processing driver, v.1.
+
+Required properties:
+- compatible: shall be "cdns,xrp,v1".
+- reg: location of DSP shared memory area.
+
+Optional properties:
+- queue-priority: cells indicating priorities of DSP hardware queues. If
+  missing then single default queue is configured.
+- firmware-name: string identifying firmware name. If missing the driver
+  doesn't load the firmware.
+
+- #address-cells: number of cells DSP physical address takes in the ranges.
+- #size-cells: number of cells each size takes in the ranges.
+- ranges: standard ranges property. Provides mapping of DSP physical addresses
+  to host physical addresses. Arbitrary number of groups with the following
+  structure:
+  - cells with DSP physical address of the region;
+  - cells with the corresponding host physical address of the
+    region;
+  - cells with the size of the region.
+
+XRP node may have an optional subnode when there's non-identity mapping set
+up in the ranges property. Both subnode and ranges property are required in
+order for the address translation to work.
+
+Example:
+
+	xrp@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "cdns,xrp,v1";
+		reg = <0xf0000000 0x01000000>;
+		firmware-name = "xrp0.elf";
+		ranges = <0x00000000 0x00000000 0x10000000
+			  0x3ffc0000 0xc0000000 0x00020000
+			  0x3ffe0000 0xc0020000 0x00020000
+			  0x50000000 0x50000000 0x01000000
+			  0x60000000 0x60000000 0x20000000
+			  0xf0000000 0xf0000000 0x0d000000>;
+		dsp@0 {
+		};
+	};

+ 52 - 0
driver/xrp-kernel/cdns,xrp-hw-hikey960,cma.txt

@@ -0,0 +1,52 @@
+Bindings for the Cadence Xtensa Remote Processing HW-specific driver for
+HiKey960.
+
+This binding is an extension of the cdns,xrp,cma binding. All properties of
+that binding are in effect.
+
+Required properties:
+- compatible: shall be "cdns,xrp-hw-hikey960,cma".
+
+Optional properties:
+- reg: panic/log buffer location.
+- device-irq: 1 32-bit cell: DSP IRQ number (normal core IRQ number, not
+  external IRQ number) assigned to the egress mailbox.
+- host-irq: 1 32-bit cell, when present enables IRQ usage in DSP->host
+  direction.
+
+Example:
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		xrp_reserved: xrp@60000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x0 0x60000000 0x0 0x10000000>;
+			reusable;
+		};
+	};
+
+	xrp@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "cdns,xrp-hw-simple,cma";
+		memory-region = <&xrp_reserved>;
+		reg = <
+		       0x0 0x8b300000 0x0 0x00001000 /* Panic/log page */
+		      >;
+		device-irq = <3>;
+		host-irq = <0>;
+		firmware-name = "xrp0.elf";
+		ranges = <
+			  0x00000000  0x0 0x00000000  0x89200000
+			  0x89cc0000  0x0 0x89cc0000  0x06340000
+			  0x90000000  0x0 0x90000000  0x30000000
+			  0xc0000000  0x0 0x89200000  0x00600000
+			  0xe8000000  0x0 0x89800000  0x00030000
+			  0xe8058000  0x0 0x89830000  0x00031000
+			 >;
+		dsp@0 {
+		};
+	};

+ 41 - 0
driver/xrp-kernel/cdns,xrp-hw-hikey960,v1.txt

@@ -0,0 +1,41 @@
+Bindings for the Cadence Xtensa Remote Processing HW-specific driver for
+HiKey960.
+
+This binding is an extension of the cdns,xrp,v1 binding. All properties of
+that binding are in effect.
+
+Required properties:
+- compatible: shall be "cdns,xrp-hw-hikey960,v1".
+- reg: register locations of the DSP shared memory (first entry, same as in
+       cdns,xrp,v1) panic/log buffer location (second entry, optional).
+
+Optional properties:
+- device-irq: 1 32-bit cell: DSP IRQ number (normal core IRQ number, not
+  external IRQ number) assigned to the egress mailbox.
+- host-irq: 1 32-bit cell, when present enables IRQ usage in DSP->host
+  direction.
+
+Example:
+
+	xrp@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "cdns,xrp-hw-simple,v1";
+		reg = <
+		       0x0 0x8b301000 0x0 0x0037f000 /* Shared memory */
+		       0x0 0x8b300000 0x0 0x00001000 /* Panic/log page */
+		      >;
+		device-irq = <3>;
+		host-irq = <0>;
+		firmware-name = "xrp0.elf";
+		ranges = <
+			  0x00000000  0x0 0x00000000  0x89200000
+			  0x89cc0000  0x0 0x89cc0000  0x06340000
+			  0x90000000  0x0 0x90000000  0x30000000
+			  0xc0000000  0x0 0x89200000  0x00600000
+			  0xe8000000  0x0 0x89800000  0x00030000
+			  0xe8058000  0x0 0x89830000  0x00031000
+			 >;
+		dsp@0 {
+		};
+	};

+ 65 - 0
driver/xrp-kernel/cdns,xrp-hw-simple,cma.txt

@@ -0,0 +1,65 @@
+Bindings for the Cadence Xtensa Remote Processing Simple HW-specific driver.
+
+This binding is an extension of the cdns,xrp,cma binding. All properties of
+that binding are in effect.
+
+Required properties:
+- compatible: shall be "cdns,xrp-hw-simple,cma".
+- reg: register location of the DSP MMIO block.
+
+Optional properties:
+- device-irq: 3 32-bit cells:
+  - first: offset of the 32-bit device IRQ MMIO register from the DSP MMIO
+    block start as seen by the device;
+  - second: register bit index that controls IRQ;
+  - third: DSP IRQ number (normal core IRQ number, not external IRQ number)
+    controlled by this register/bit.
+- device-irq-host-offset: offset of the 32-bit device IRQ MMIO register from
+  the DSP MMIO block start as seen by the host. If omitted device-irq cell 0
+  is used;
+- device-irq-mode: 0 for none (polling), 1 for level, 2 for edge, 3 for
+  software-assisted (by LUA script in the XTSC) edge.
+
+- host-irq: 2 32-bit cells:
+  - first: offset of the 32-bit device IRQ MMIO register from the DSP MMIO
+    block start;
+  - second: register bit index that controls IRQ.
+- host-irq-mode: 0 for none (polling), 1 for level, 2 for edge.
+- interrupts: host IRQ number controlled by this register/bit.
+
+Example:
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		xrp_reserved: xrp@08000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x08000000 0x08000000>;
+			reusable;
+		};
+	};
+
+	xrp@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "cdns,xrp-hw-simple,cma";
+		memory-region = <&xrp_reserved>;
+		reg = <0xfd001000 0x00000200>; /* DSP MMIO */
+		device-irq = <0 1 5>; /* offset, bit#, IRQ# */
+		device-irq-host-offset = <0>;
+		device-irq-mode = <1>;
+		host-irq = <0xfffff000 0>; /* offset, bit# */
+		host-irq-mode = <2>;
+		interrupts = <15 0>;
+		firmware-name = "xrp0.elf";
+		ranges = <0x00000000 0x00000000 0x10000000
+			  0x3ffc0000 0xc0000000 0x00020000
+			  0x3ffe0000 0xc0020000 0x00020000
+			  0x50000000 0x50000000 0x01000000
+			  0x60000000 0x60000000 0x20000000
+			  0xf0000000 0xf0000000 0x0d000000>;
+		dsp@0 {
+		};
+	};

+ 54 - 0
driver/xrp-kernel/cdns,xrp-hw-simple,v1.txt

@@ -0,0 +1,54 @@
+Bindings for the Cadence Xtensa Remote Processing Simple HW-specific driver.
+
+This binding is an extension of the cdns,xrp,v1 binding. All properties of
+that binding are in effect.
+
+Required properties:
+- compatible: shall be "cdns,xrp-hw-simple,v1".
+- reg: register locations of the DSP shared memory (first entry, same as in
+       cdns,xrp,v1) and DSP MMIO block (second entry).
+
+Optional properties:
+- device-irq: 3 32-bit cells:
+  - first: offset of the 32-bit device IRQ MMIO register from the DSP MMIO
+    block start as seen by the device;
+  - second: register bit index that controls IRQ;
+  - third: DSP IRQ number (normal core IRQ number, not external IRQ number)
+    controlled by this register/bit.
+- device-irq-host-offset: offset of the 32-bit device IRQ MMIO register from
+  the DSP MMIO block start as seen by the host. If omitted device-irq cell 0
+  is used;
+- device-irq-mode: 0 for none (polling), 1 for level, 2 for edge, 3 for
+  software-assisted (by LUA script in the XTSC) edge.
+
+- host-irq: 2 32-bit cells:
+  - first: offset of the 32-bit device IRQ MMIO register from the DSP MMIO
+    block start;
+  - second: register bit index that controls IRQ.
+- host-irq-mode: 0 for none (polling), 1 for level, 2 for edge.
+- interrupts: host IRQ number controlled by this register/bit.
+
+Example:
+
+	xrp@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "cdns,xrp-hw-simple,v1";
+		reg = <0xf0000000 0x01000000   /* DSP shared memory */
+		       0xfd001000 0x00000200>; /* DSP MMIO */
+		device-irq = <0 1 5>; /* offset, bit#, IRQ# */
+		device-irq-host-offset = <0>;
+		device-irq-mode = <1>;
+		host-irq = <0xfffff000 0>; /* offset, bit# */
+		host-irq-mode = <2>;
+		interrupts = <15 0>;
+		firmware-name = "xrp0.elf";
+		ranges = <0x00000000 0x00000000 0x10000000
+			  0x3ffc0000 0xc0000000 0x00020000
+			  0x3ffe0000 0xc0020000 0x00020000
+			  0x50000000 0x50000000 0x01000000
+			  0x60000000 0x60000000 0x20000000
+			  0xf0000000 0xf0000000 0x0d000000>;
+		dsp@0 {
+		};
+	};

+ 55 - 0
driver/xrp-kernel/cdns,xrp-hw-simple.txt

@@ -0,0 +1,55 @@
+Bindings for the Cadence Xtensa Remote Processing Simple HW-specific driver.
+
+This binding is an extension of the cdns,xrp binding. All properties of
+that binding are in effect.
+
+Required properties:
+- compatible: shall be "cdns,xrp-hw-simple".
+- reg: register locations of the DSP MMIO block, DSP communication area and
+  DSP shared memory area.
+
+Optional properties:
+- device-irq: 3 32-bit cells:
+  - first: offset of the 32-bit device IRQ MMIO register from the DSP MMIO
+    block start as seen by the device;
+  - second: register bit index that controls IRQ;
+  - third: DSP IRQ number (normal core IRQ number, not external IRQ number)
+    controlled by this register/bit.
+- device-irq-host-offset: offset of the 32-bit device IRQ MMIO register from
+  the DSP MMIO block start as seen by the host. If omitted device-irq cell 0
+  is used;
+- device-irq-mode: 0 for none (polling), 1 for level, 2 for edge, 3 for
+  software-assisted (by LUA script in the XTSC) edge.
+
+- host-irq: 2 32-bit cells:
+  - first: offset of the 32-bit device IRQ MMIO register from the DSP MMIO
+    block start;
+  - second: register bit index that controls IRQ.
+- host-irq-mode: 0 for none (polling), 1 for level, 2 for edge.
+- interrupts: host IRQ number controlled by this register/bit.
+
+Example:
+
+	xrp@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "cdns,xrp-hw-simple";
+		reg = <0xfd001000 0x00000200    /* DSP MMIO */
+		       0xf0000000 0x00001000    /* DSP communication area */
+		       0xf0001000 0x00fff000>;  /* DSP shared memory */
+		device-irq = <0 1 5>; /* offset, bit#, IRQ# */
+		device-irq-host-offset = <0>;
+		device-irq-mode = <1>;
+		host-irq = <0xfffff000 0>; /* offset, bit# */
+		host-irq-mode = <2>;
+		interrupts = <15 0>;
+		firmware-name = "xrp0.elf";
+		ranges = <0x00000000 0x00000000 0x10000000
+			  0x3ffc0000 0xc0000000 0x00020000
+			  0x3ffe0000 0xc0020000 0x00020000
+			  0x50000000 0x50000000 0x01000000
+			  0x60000000 0x60000000 0x20000000
+			  0xf0000000 0xf0000000 0x0d000000>;
+		dsp@0 {
+		};
+	};

+ 46 - 0
driver/xrp-kernel/cdns,xrp.txt

@@ -0,0 +1,46 @@
+Bindings for the Cadence Xtensa Remote Processing driver.
+
+Required properties:
+- compatible: shall be "cdns,xrp".
+- reg: register locations of the DSP MMIO block, DSP communication area and
+  DSP shared memory area.
+
+Optional properties:
+- queue-priority: cells indicating priorities of DSP hardware queues. If
+  missing then single default queue is configured.
+- firmware-name: string identifying firmware name. If missing the driver
+  doesn't load the firmware.
+
+- #address-cells: number of cells DSP physical address takes in the ranges.
+- #size-cells: number of cells each size takes in the ranges.
+- ranges: standard ranges property. Provides mapping of DSP physical addresses
+  to host physical addresses. Arbitrary number of groups with the following
+  structure:
+  - cells with DSP physical address of the region;
+  - cells with the corresponding host physical address of the
+    region;
+  - cells with the size of the region.
+
+XRP node may have an optional subnode when there's non-identity mapping set
+up in the ranges property. Both subnode and ranges property are required in
+order for the address translation to work.
+
+Example:
+
+	xrp@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "cdns,xrp";
+		reg = <0xfd001000 0x00000200   /* DSP MMIO */
+		       0xf0000000 0x00001000   /* DSP communication area */
+		       0xf0001000 0x00fff000>; /* DSP shared memory */
+		firmware-name = "xrp0.elf";
+		ranges = <0x00000000 0x00000000 0x10000000
+			  0x3ffc0000 0xc0000000 0x00020000
+			  0x3ffe0000 0xc0020000 0x00020000
+			  0x50000000 0x50000000 0x01000000
+			  0x60000000 0x60000000 0x20000000
+			  0xf0000000 0xf0000000 0x0d000000>;
+		dsp@0 {
+		};
+	};

+ 12 - 0
driver/xrp-kernel/insmod.sh

@@ -0,0 +1,12 @@
+#!/bin/bash
+
+# mkdir /tmp/debugfs
+# mount -t debugfs none /tmp/debugfs
+# echo -n 'file xvp_main.c +p' > /tmp/debugfs/dynamic_debug/control
+# echo -n 'file xrp_hw_simple.c +p' > /tmp/debugfs/dynamic_debug/control
+# echo -n 'file xrp_firmware.c +p' > /tmp/debugfs/dynamic_debug/control
+# echo 8  > /proc/sys/kernel/printk
+modprobe xrp_hw_comm
+modprobe xrp
+# echo 1 > /sys/module/xrp/parameters/loopback
+modprobe xrp_hw_simple

+ 20 - 0
driver/xrp-kernel/insmod_load_fw_man.sh

@@ -0,0 +1,20 @@
+#!/bin/bash
+
+mkdir /tmp/debugfs
+mount -t debugfs none /tmp/debugfs
+echo -n 'file xvp_main.c +p' > /tmp/debugfs/dynamic_debug/control
+echo -n 'file xrp_hw_simple.c +p' > /tmp/debugfs/dynamic_debug/control
+echo -n 'file xrp_firmware.c +p' > /tmp/debugfs/dynamic_debug/control
+echo 8  > /proc/sys/kernel/printk
+modprobe xrp_hw_comm
+modprobe xrp
+# echo 1 > /sys/module/xrp/parameters/loopback
+#increase the timeout time 2 min
+echo 120 > /sys/module/xrp/parameters/firmware_command_timeout
+echo 1 > /sys/module/xrp/parameters/load_mode
+
+memtool mw 0xffe7f3c408 0x11000000
+memtool mw 0xffe7f3c40c 0x111
+memtool mw 0xffe7f3c410 0x11111
+
+modprobe xrp_hw_simple

+ 6 - 0
driver/xrp-kernel/rmmod.sh

@@ -0,0 +1,6 @@
+#!/bin/bash
+
+# echo 1 > /sys/module/xrp/parameters/loopback
+rmmod xrp_hw_simple.ko
+rmmod xrp.ko
+rmmod xrp_hw_comm.ko

+ 173 - 0
driver/xrp-kernel/xrp_address_map.c

@@ -0,0 +1,173 @@
+/*
+ * xrp_address_map: CPU->DSP physical address translator
+ *
+ * Copyright (c) 2017 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#include <linux/bsearch.h>
+#include <linux/device.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+#include <linux/sort.h>
+#include "xrp_address_map.h"
+
+#if IS_ENABLED(CONFIG_OF)
+static int xrp_compare_address_sort(const void *a, const void *b)
+{
+	const struct xrp_address_map_entry *pa = a;
+	const struct xrp_address_map_entry *pb = b;
+
+	if (pa->src_addr < pb->src_addr &&
+	    pb->src_addr - pa->src_addr >= pa->size)
+		return -1;
+	if (pa->src_addr > pb->src_addr &&
+	    pa->src_addr - pb->src_addr >= pb->size)
+		return 1;
+	return 0;
+}
+#endif
+
+int xrp_init_address_map(struct device *dev,
+			 struct xrp_address_map *map)
+{
+	int ret = 0;
+#if IS_ENABLED(CONFIG_OF)
+	struct device_node *pnode = dev->of_node;
+	struct device_node *node;
+	int rlen, off;
+	const __be32 *ranges = of_get_property(pnode, "ranges", &rlen);
+	int na, pna, ns;
+	int i;
+
+	if (!ranges) {
+		dev_dbg(dev, "%s: no 'ranges' property in the device tree, no translation at that level\n",
+			__func__);
+		goto empty;
+	}
+
+	node = of_get_next_child(pnode, NULL);
+	if (!node) {
+		dev_warn(dev, "%s: no child node found in the device tree, no translation at that level\n",
+			 __func__);
+		goto empty;
+	}
+
+	na = of_n_addr_cells(node);
+	ns = of_n_size_cells(node);
+	pna = of_n_addr_cells(pnode);
+
+	rlen /= 4;
+	map->n = rlen / (na + pna + ns);
+	map->entry = kmalloc_array(map->n, sizeof(*map->entry), GFP_KERNEL);
+	if (!map->entry) {
+		ret = -ENOMEM;
+		goto err;
+	}
+	dev_dbg(dev,
+		"%s: na = %d, pna = %d, ns = %d, rlen = %d cells, n = %d\n",
+		__func__, na, pna, ns, rlen, map->n);
+
+	for (off = 0, i = 0; off < rlen; off += na + pna + ns, ++i) {
+		map->entry[i].src_addr = of_translate_address(node,
+							      ranges + off);
+		map->entry[i].dst_addr = of_read_number(ranges + off, na);
+		map->entry[i].size = of_read_number(ranges + off + na + pna,
+						    ns);
+		dev_dbg(dev,
+			"  src_addr = 0x%llx, dst_addr = 0x%lx, size = 0x%lx\n",
+			(unsigned long long)map->entry[i].src_addr,
+			(unsigned long)map->entry[i].dst_addr,
+			(unsigned long)map->entry[i].size);
+	}
+	sort(map->entry, map->n, sizeof(*map->entry),
+	     xrp_compare_address_sort, NULL);
+err:
+	of_node_put(node);
+	return ret;
+
+empty:
+#endif
+	map->n = 1;
+	map->entry = kmalloc(sizeof(*map->entry), GFP_KERNEL);
+	map->entry->src_addr = 0;
+	map->entry->dst_addr = 0;
+	map->entry->size = ~0ul;
+	return ret;
+}
+
+void xrp_free_address_map(struct xrp_address_map *map)
+{
+	if(!map->entry)
+		kfree(map->entry);
+}
+
+static int xrp_compare_address_search(const void *a, const void *b)
+{
+	const phys_addr_t *pa = a;
+	return xrp_compare_address(*pa, b);
+}
+
+struct xrp_address_map_entry *
+xrp_get_address_mapping(const struct xrp_address_map *map, phys_addr_t addr)
+{
+	struct xrp_address_map_entry *entry =
+		bsearch(&addr, map->entry, map->n, sizeof(*map->entry),
+			xrp_compare_address_search);
+	return entry;
+}
+
+u32 xrp_translate_to_dsp(const struct xrp_address_map *map, phys_addr_t addr)
+{
+	struct xrp_address_map_entry *entry = xrp_get_address_mapping(map, addr);
+
+	if (!entry)
+		return XRP_NO_TRANSLATION;
+	return entry->dst_addr + addr - entry->src_addr;
+}
+
+phys_addr_t xrp_translate_dsp_to_host(const struct xrp_address_map *map,u32 addr)
+{
+	int loop;
+	struct xrp_address_map_entry *entry=NULL;
+	for(loop=0;loop<map->n;loop++)
+	{
+
+		if((map->entry[loop].dst_addr<=addr) &&
+			((map->entry[loop].dst_addr+map->entry[loop].size)>addr))
+			{
+				// pr_debug("%s\n",__func__);
+				entry= &map->entry[loop];
+				break;
+			}
+	}
+	if(entry == NULL)
+	{
+		return  (phys_addr_t)OF_BAD_ADDR;
+	}
+	pr_debug("%s,entry(%d),device:(0x%08x,0x%08x),target:0x%08x\n",
+		__func__,loop,entry->dst_addr,entry->dst_addr+entry->size,addr);
+	return entry->src_addr+addr-entry->dst_addr;
+}

+ 78 - 0
driver/xrp-kernel/xrp_address_map.h

@@ -0,0 +1,78 @@
+/*
+ * xrp_address_map: CPU->DSP physical address translator
+ *
+ * Copyright (c) 2017 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#ifndef XRP_ADDRESS_MAP_H
+#define XRP_ADDRESS_MAP_H
+
+#include <linux/types.h>
+
+#define XRP_NO_TRANSLATION ((u32)~0ul)
+
+struct xrp_address_map_entry {
+	phys_addr_t src_addr;
+	u32 dst_addr;
+	u32 size;
+};
+
+struct xrp_address_map {
+	unsigned n;
+	struct xrp_address_map_entry *entry;
+};
+
+int xrp_init_address_map(struct device *dev,
+			 struct xrp_address_map *map);
+
+void xrp_free_address_map(struct xrp_address_map *map);
+
+struct xrp_address_map_entry *
+xrp_get_address_mapping(const struct xrp_address_map *map, phys_addr_t addr);
+
+u32 xrp_translate_to_dsp(const struct xrp_address_map *map, phys_addr_t addr);
+
+phys_addr_t xrp_translate_dsp_to_host(const struct xrp_address_map *map,u32 addr);
+static inline int xrp_compare_address(phys_addr_t addr,
+				      const struct xrp_address_map_entry *entry)
+{
+	if (addr < entry->src_addr)
+		return -1;
+	if (addr - entry->src_addr < entry->size)
+		return 0;
+	return 1;
+}
+
+static inline int xrp_compare_dev_address(phys_addr_t addr,
+				      const struct xrp_address_map_entry *entry)
+{
+	if (addr < entry->dst_addr)
+		return -1;
+	if (addr - entry->dst_addr < entry->size)
+		return 0;
+	return 1;
+}
+
+#endif

+ 443 - 0
driver/xrp-kernel/xrp_alloc.c

@@ -0,0 +1,443 @@
+/*
+ * Copyright (c) 2016 - 2017 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#ifdef __KERNEL__
+
+#include <asm/atomic.h>
+#include <linux/kernel.h>
+#include <linux/mutex.h>
+#include <linux/printk.h>
+#include <linux/slab.h>
+#include <linux/pagemap.h>
+#else
+
+#include <errno.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include "xrp_debug.h"
+
+#define PAGE_SIZE 4096
+#define GFP_KERNEL 0
+#define ALIGN(v, a) (((v) + (a) - 1) & -(a))
+
+#define GET_PAGE_NUM(size, offset)     ((((size) + ((offset) & ~PAGE_MASK)) + PAGE_SIZE - 1) >> PAGE_SHIFT)
+static void *kmalloc(size_t sz, int flags)
+{
+	(void)flags;
+	return malloc(sz);
+}
+
+static void *kzalloc(size_t sz, int flags)
+{
+	(void)flags;
+	return calloc(1, sz);
+}
+
+static void kfree(void *p)
+{
+	free(p);
+}
+
+#endif
+
+#include "xrp_private_alloc.h"
+
+#ifndef __KERNEL__
+
+static void mutex_init(struct mutex *mutex)
+{
+	xrp_mutex_init(&mutex->o);
+}
+
+static void mutex_lock(struct mutex *mutex)
+{
+	xrp_mutex_lock(&mutex->o);
+}
+
+static void mutex_unlock(struct mutex *mutex)
+{
+	xrp_mutex_unlock(&mutex->o);
+}
+
+static void atomic_set(atomic_t *p, uint32_t v)
+{
+	*((volatile atomic_t *)p) = v;
+}
+
+#define container_of(ptr, type, member) ({				\
+	void *__mptr = (void *)(ptr);					\
+	((type *)(__mptr - offsetof(type, member))); })
+
+#endif
+
+struct xrp_private_pool {
+	struct xrp_allocation_pool pool;
+	struct mutex free_list_lock;
+	phys_addr_t start;
+	u32 size;
+	struct xrp_allocation *free_list;
+};
+
+static inline void xrp_pool_lock(struct xrp_private_pool *pool)
+{
+	mutex_lock(&pool->free_list_lock);
+}
+
+static inline void xrp_pool_unlock(struct xrp_private_pool *pool)
+{
+	mutex_unlock(&pool->free_list_lock);
+}
+
+static void xrp_private_free(struct xrp_allocation *xrp_allocation)
+{
+	struct xrp_private_pool *pool = container_of(xrp_allocation->pool,
+						     struct xrp_private_pool,
+						     pool);
+	struct xrp_allocation **pcur;
+
+	pr_debug("%s: %pap x %d\n", __func__,
+		 &xrp_allocation->start, xrp_allocation->size);
+
+	xrp_pool_lock(pool);
+
+	for (pcur = &pool->free_list; ; pcur = &(*pcur)->next) {
+		struct xrp_allocation *cur = *pcur;
+
+		if (cur && cur->start + cur->size == xrp_allocation->start) {
+			struct xrp_allocation *next = cur->next;
+
+			pr_debug("merging block tail: %pap x 0x%x ->\n",
+				 &cur->start, cur->size);
+			cur->size += xrp_allocation->size;
+			pr_debug("... -> %pap x 0x%x\n",
+				 &cur->start, cur->size);
+			kfree(xrp_allocation);
+
+			if (next && cur->start + cur->size == next->start) {
+				pr_debug("merging with next block: %pap x 0x%x ->\n",
+					 &cur->start, cur->size);
+				cur->size += next->size;
+				cur->next = next->next;
+				pr_debug("... -> %pap x 0x%x\n",
+					 &cur->start, cur->size);
+				kfree(next);
+			}
+			break;
+		}
+
+		if (!cur || xrp_allocation->start < cur->start) {
+			if (cur && xrp_allocation->start + xrp_allocation->size ==
+			    cur->start) {
+				pr_debug("merging block head: %pap x 0x%x ->\n",
+					 &cur->start, cur->size);
+				cur->size += xrp_allocation->size;
+				cur->start = xrp_allocation->start;
+				pr_debug("... -> %pap x 0x%x\n",
+					 &cur->start, cur->size);
+				kfree(xrp_allocation);
+			} else {
+				pr_debug("inserting new free block\n");
+				xrp_allocation->next = cur;
+				*pcur = xrp_allocation;
+			}
+			break;
+		}
+	}
+
+	xrp_pool_unlock(pool);
+}
+
+static long xrp_alloc_gfp(u32 size, u32 align,struct xrp_allocation **alloc);
+static long xrp_private_alloc(struct xrp_allocation_pool *pool,
+			      u32 size, u32 align,
+			      struct xrp_allocation **alloc)
+{
+	struct xrp_private_pool *ppool = container_of(pool,
+						      struct xrp_private_pool,
+						      pool);
+	struct xrp_allocation **pcur;
+	struct xrp_allocation *cur = NULL;
+	struct xrp_allocation *new;
+	phys_addr_t aligned_start = 0;
+	bool found = false;
+
+	if (!size || (align & (align - 1)))
+		return -EINVAL;
+	if (!align)
+		align = 1;
+
+	new = kzalloc(sizeof(struct xrp_allocation), GFP_KERNEL);
+	if (!new)
+		return -ENOMEM;
+
+	align = ALIGN(align, PAGE_SIZE);
+	size = ALIGN(size, PAGE_SIZE);
+
+	xrp_pool_lock(ppool);
+
+	/* on exit free list is fixed */
+	for (pcur = &ppool->free_list; *pcur; pcur = &(*pcur)->next) {
+		cur = *pcur;
+		aligned_start = ALIGN(cur->start, align);
+
+		if (aligned_start >= cur->start &&
+		    aligned_start - cur->start + size <= cur->size) {
+			if (aligned_start == cur->start) {
+				if (aligned_start + size == cur->start + cur->size) {
+					pr_debug("reusing complete block: %pap x %x\n",
+						 &cur->start, cur->size);
+					*pcur = cur->next;
+				} else {
+					pr_debug("cutting block head: %pap x %x ->\n",
+						 &cur->start, cur->size);
+					cur->size -= aligned_start + size - cur->start;
+					cur->start = aligned_start + size;
+					pr_debug("... -> %pap x %x\n",
+						 &cur->start, cur->size);
+					cur = NULL;
+				}
+			} else {
+				if (aligned_start + size == cur->start + cur->size) {
+					pr_debug("cutting block tail: %pap x %x ->\n",
+						 &cur->start, cur->size);
+					cur->size = aligned_start - cur->start;
+					pr_debug("... -> %pap x %x\n",
+						 &cur->start, cur->size);
+					cur = NULL;
+				} else {
+					pr_debug("splitting block into two: %pap x %x ->\n",
+						 &cur->start, cur->size);
+					new->start = aligned_start + size;
+					new->size = cur->start +
+						cur->size - new->start;
+
+					cur->size = aligned_start - cur->start;
+
+					new->next = cur->next;
+					cur->next = new;
+					pr_debug("... -> %pap x %x + %pap x %x\n",
+						 &cur->start, cur->size,
+						 &new->start, new->size);
+
+					cur = NULL;
+					new = NULL;
+				}
+			}
+			found = true;
+			break;
+		} else {
+			cur = NULL;
+		}
+	}
+
+	xrp_pool_unlock(ppool);
+
+	if (!found) {
+		kfree(cur);
+		kfree(new);
+        if(!xrp_alloc_gfp(size,align,alloc))
+        {
+            return 0;
+        }
+		return -ENOMEM;
+	}
+
+	if (!cur) {
+		cur = new;
+		new = NULL;
+	}
+	if (!cur) {
+		cur = kzalloc(sizeof(struct xrp_allocation), GFP_KERNEL);
+		if (!cur)
+			return -ENOMEM;
+	}
+	if (new)
+		kfree(new);
+
+	pr_debug("returning: %pap x %x\n", &aligned_start, size);
+	cur->start = aligned_start;
+	cur->size = size;
+	cur->pool = pool;
+	atomic_set(&cur->ref, 0);
+	xrp_allocation_get(cur);
+	*alloc = cur;
+
+	return 0;
+}
+
+static void xrp_private_free_pool(struct xrp_allocation_pool *pool)
+{
+	struct xrp_private_pool *ppool = container_of(pool,
+						      struct xrp_private_pool,
+						      pool);
+	kfree(ppool->free_list);
+	kfree(ppool);
+}
+
+static phys_addr_t xrp_private_offset(const struct xrp_allocation *allocation)
+{
+	struct xrp_private_pool *ppool = container_of(allocation->pool,
+						      struct xrp_private_pool,
+						      pool);
+	return allocation->start ;//- ppool->start;
+}
+
+static const struct xrp_allocation_ops xrp_private_pool_ops = {
+	.alloc = xrp_private_alloc,
+	.free = xrp_private_free,
+	.free_pool = xrp_private_free_pool,
+	.offset = xrp_private_offset,
+};
+
+long xrp_init_private_pool(struct xrp_allocation_pool **ppool,
+			   phys_addr_t start, u32 size)
+{
+	struct xrp_private_pool *pool = kmalloc(sizeof(*pool), GFP_KERNEL);
+	struct xrp_allocation *allocation = kmalloc(sizeof(*allocation),
+						    GFP_KERNEL);
+
+	if (!pool || !allocation) {
+		kfree(pool);
+		kfree(allocation);
+		return -ENOMEM;
+	}
+
+	*allocation = (struct xrp_allocation){
+		.pool = &pool->pool,
+		.start = start,
+		.size = size,
+	};
+	*pool = (struct xrp_private_pool){
+		.pool = {
+			.ops = &xrp_private_pool_ops,
+		},
+		.start = start,
+		.size = size,
+		.free_list = allocation,
+	};
+	mutex_init(&pool->free_list_lock);
+	*ppool = &pool->pool;
+	return 0;
+}
+
+static void xrp_free_gfp(struct xrp_allocation *alloc)
+{
+    size_t numPages;
+    int i;
+    struct page *page;
+    phys_addr_t phys;
+    if(!alloc)
+      return;
+    if(alloc->size & (PAGE_SIZE-1) ||
+        alloc->start &(PAGE_SIZE-1))
+    {
+        pr_debug("alloc is not aligment addr: %llx,size: %d",alloc->start,alloc->size);
+        return ;
+    }
+
+    phys = alloc->start;
+    numPages = alloc->size>>PAGE_SHIFT;
+    for (i = 0; i < numPages; i++)
+    {
+        page = pfn_to_page(__phys_to_pfn(phys));
+        ClearPageReserved(page);
+        phys +=PAGE_SIZE;
+
+    }
+    __free_pages(pfn_to_page(__phys_to_pfn(alloc->start)), get_order(alloc->size));
+    kfree(alloc->pool);
+    kfree(alloc);
+    pr_debug("free gfp alloc on phy addr: %llx,size: %d",alloc->start,alloc->size);
+    return;
+}
+static const struct xrp_allocation_ops xrp_gfp_pool_ops = {
+	.free = xrp_free_gfp,
+	.offset = xrp_private_offset,
+};
+
+
+static long xrp_alloc_gfp(u32 size, u32 align,
+			      struct xrp_allocation **alloc)
+{
+    struct xrp_allocation *new;
+    size_t numPages;
+    struct page *contiguousPages;
+    struct xrp_allocation_pool *pool;
+    int i;
+    unsigned int gfp = GFP_KERNEL | GFP_DMA | __GFP_NOWARN;
+	if (!size || (align & (align - 1)))
+		return -EINVAL;
+	if (!align)
+		align = 1;
+
+	new = kzalloc(sizeof(struct xrp_allocation), GFP_KERNEL);
+
+    if(!new)
+        return -ENOMEM;
+    new->pool = kzalloc(sizeof(struct xrp_allocation_pool),GFP_KERNEL);
+    if(!new->pool)
+        goto OnError; 
+    new->pool->ops = &xrp_gfp_pool_ops;
+    align = ALIGN(align, PAGE_SIZE);
+	size = ALIGN(size, PAGE_SIZE);
+    numPages = size >> PAGE_SHIFT;
+
+    int order = get_order(size);
+
+    if (order >= MAX_ORDER)
+    {
+        pr_debug("Too big buffer size requested. (order %d >= max %d)\n", 
+            order, MAX_ORDER);
+        goto TwoError;
+    }
+
+    contiguousPages = alloc_pages(gfp, order);
+
+    for (i = 0; i < numPages; i++)
+    {
+        struct page *page;
+
+        page = nth_page(contiguousPages, i);
+
+        SetPageReserved(page);
+    }
+
+    new->start = page_to_phys(nth_page(contiguousPages, 0));
+    new->size = size; 
+    atomic_set(&new->ref, 0);
+	xrp_allocation_get(new);
+
+    *alloc = new;
+    pr_debug("alloc by gfp with phy addr: %llx,size: %d",new->start,new->size);
+    return 0;
+TwoError:
+    kfree(new->pool);
+OnError:
+    kfree(new);
+    return -ENOMEM;
+}

+ 113 - 0
driver/xrp-kernel/xrp_alloc.h

@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2016 - 2017 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#ifndef XRP_ALLOC_H
+#define XRP_ALLOC_H
+
+#ifndef __KERNEL__
+
+#include <stdint.h>
+#include <xrp_atomic.h>
+#include <xrp_thread_impl.h>
+
+typedef uint32_t u32;
+typedef uint32_t phys_addr_t;
+typedef _Atomic uint32_t atomic_t;
+
+struct mutex {
+	xrp_mutex o;
+};
+
+static inline void atomic_inc(atomic_t *v)
+{
+	++*(volatile atomic_t *)v;
+}
+
+static inline int atomic_dec_and_test(atomic_t *v)
+{
+	return --*(volatile atomic_t *)v == 0;
+}
+
+#endif
+
+struct xrp_allocation_pool;
+struct xrp_allocation;
+
+struct xrp_allocation_ops {
+	long (*alloc)(struct xrp_allocation_pool *allocation_pool,
+		      u32 size, u32 align, struct xrp_allocation **alloc);
+	void (*free)(struct xrp_allocation *allocation);
+	void (*free_pool)(struct xrp_allocation_pool *allocation_pool);
+	phys_addr_t (*offset)(const struct xrp_allocation *allocation);
+};
+
+struct xrp_allocation_pool {
+	const struct xrp_allocation_ops *ops;
+};
+
+struct xrp_allocation {
+	struct xrp_allocation_pool *pool;
+	struct xrp_allocation *next;
+	phys_addr_t start;
+	u32 size;
+	atomic_t ref;
+};
+
+static inline void xrp_free_pool(struct xrp_allocation_pool *allocation_pool)
+{
+	allocation_pool->ops->free_pool(allocation_pool);
+}
+
+static inline void xrp_free(struct xrp_allocation *allocation)
+{
+	return allocation->pool->ops->free(allocation);
+}
+
+static inline long xrp_allocate(struct xrp_allocation_pool *allocation_pool,
+				u32 size, u32 align,
+				struct xrp_allocation **alloc)
+{
+	return allocation_pool->ops->alloc(allocation_pool,
+					   size, align, alloc);
+}
+
+static inline void xrp_allocation_get(struct xrp_allocation *xrp_allocation)
+{
+	atomic_inc(&xrp_allocation->ref);
+}
+
+static inline void xrp_allocation_put(struct xrp_allocation *xrp_allocation)
+{
+	if (atomic_dec_and_test(&xrp_allocation->ref))
+		xrp_allocation->pool->ops->free(xrp_allocation);
+}
+
+static inline phys_addr_t xrp_allocation_offset(const struct xrp_allocation *allocation)
+{
+	return allocation->pool->ops->offset(allocation);
+}
+
+#endif

+ 147 - 0
driver/xrp-kernel/xrp_cma_alloc.c

@@ -0,0 +1,147 @@
+/*
+ * Copyright (c) 2017 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 16, 0)
+#include <linux/dma-mapping.h>
+#else
+#include <linux/dma-direct.h>
+#endif
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include "xrp_cma_alloc.h"
+
+struct xrp_cma_allocation {
+	struct xrp_allocation allocation;
+	void *kvaddr;
+};
+
+struct xrp_cma_pool {
+	struct xrp_allocation_pool pool;
+	struct device *dev;
+};
+
+static long xrp_cma_alloc(struct xrp_allocation_pool *allocation_pool,
+			  u32 size, u32 align, struct xrp_allocation **alloc)
+{
+	struct xrp_cma_pool *pool = container_of(allocation_pool,
+						 struct xrp_cma_pool, pool);
+	struct xrp_cma_allocation *new_cma;
+	struct xrp_allocation *new;
+	dma_addr_t dma_addr;
+	void *kvaddr;
+
+	size = ALIGN(size, PAGE_SIZE);
+
+	new_cma = kzalloc(sizeof(struct xrp_cma_allocation), GFP_KERNEL);
+	if (!new_cma)
+		return -ENOMEM;
+
+	new = &new_cma->allocation;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0)
+	{
+		DEFINE_DMA_ATTRS(attrs);
+
+		dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
+		kvaddr = dma_alloc_attrs(pool->dev, size, &dma_addr,
+					 GFP_KERNEL, &attrs);
+	}
+#else
+	kvaddr = dma_alloc_attrs(pool->dev, size, &dma_addr, GFP_KERNEL,
+				 DMA_ATTR_NO_KERNEL_MAPPING);
+#endif
+	if (!kvaddr) {
+		kfree(new_cma);
+		return -ENOMEM;
+	}
+	new->pool = allocation_pool;
+	new->start = dma_to_phys(pool->dev, dma_addr);
+	new->size = size;
+	atomic_set(&new->ref, 0);
+	xrp_allocation_get(new);
+	new_cma->kvaddr = kvaddr;
+	*alloc = new;
+
+	return 0;
+}
+
+static void xrp_cma_free(struct xrp_allocation *xrp_allocation)
+{
+	struct xrp_cma_pool *pool = container_of(xrp_allocation->pool,
+						 struct xrp_cma_pool, pool);
+	struct xrp_cma_allocation *a = container_of(xrp_allocation,
+						    struct xrp_cma_allocation,
+						    allocation);
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0)
+	DEFINE_DMA_ATTRS(attrs);
+
+	dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
+	dma_free_attrs(pool->dev, xrp_allocation->size,
+		       a->kvaddr,
+		       phys_to_dma(pool->dev, xrp_allocation->start),
+		       &attrs);
+#else
+	dma_free_attrs(pool->dev, xrp_allocation->size,
+		       a->kvaddr,
+		       phys_to_dma(pool->dev, xrp_allocation->start),
+		       DMA_ATTR_NO_KERNEL_MAPPING);
+#endif
+	kfree(a);
+}
+
+static void xrp_cma_free_pool(struct xrp_allocation_pool *allocation_pool)
+{
+	struct xrp_cma_pool *pool = container_of(allocation_pool,
+						 struct xrp_cma_pool, pool);
+
+	kfree(pool);
+}
+
+static phys_addr_t xrp_cma_offset(const struct xrp_allocation *allocation)
+{
+	return allocation->start;
+}
+
+static const struct xrp_allocation_ops xrp_cma_pool_ops = {
+	.alloc = xrp_cma_alloc,
+	.free = xrp_cma_free,
+	.free_pool = xrp_cma_free_pool,
+	.offset = xrp_cma_offset,
+};
+
+long xrp_init_cma_pool(struct xrp_allocation_pool **ppool, struct device *dev)
+{
+	struct xrp_cma_pool *pool = kmalloc(sizeof(*pool), GFP_KERNEL);
+
+	if (!pool)
+		return -ENOMEM;
+
+	pool->pool.ops = &xrp_cma_pool_ops;
+	pool->dev = dev;
+	*ppool = &pool->pool;
+	return 0;
+}

+ 44 - 0
driver/xrp-kernel/xrp_cma_alloc.h

@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2017 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#ifndef XRP_CMA_ALLOC_H
+#define XRP_CMA_ALLOC_H
+
+#include "xrp_alloc.h"
+
+struct device;
+
+#ifdef CONFIG_CMA
+long xrp_init_cma_pool(struct xrp_allocation_pool **pool, struct device *dev);
+#else
+static inline long xrp_init_cma_pool(struct xrp_allocation_pool **pool,
+				     struct device *dev)
+{
+	return -ENXIO;
+}
+#endif
+
+#endif

+ 275 - 0
driver/xrp-kernel/xrp_debug.c

@@ -0,0 +1,275 @@
+/*
+ * xrp_debug: 
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#include <linux/delay.h>
+// #include <linux/dma-noncoherent.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <asm/cacheflush.h>
+#include "xrp_kernel_defs.h"
+#include "xrp_hw.h"
+#include "xrp_hw_simple_dsp_interface.h"
+
+#define GET_PAGE_NUM(size, offset)     ((((size) + ((offset) & ~PAGE_MASK)) + PAGE_SIZE - 1) >> PAGE_SHIFT)
+struct xrp_panic_log{
+
+    struct xrp_hw_panic __iomem *panic;
+    phys_addr_t panic_phys;
+    u32 last_read;
+    struct proc_dir_entry *log_proc_file;
+};
+static void memset_hw(void __iomem *dst, int c, size_t sz)
+{
+   	int i;
+	volatile u32 * d_ptr=dst;
+	for(i=0;i<sz/4;i++)
+	{
+		__raw_writel(c, d_ptr++);
+
+	}
+}
+static void dump_regs(const char *fn, void *hw_arg)
+{
+	struct xrp_panic_log *panic_log = hw_arg;
+
+	if (!panic_log->panic)
+		return;
+
+	pr_debug("%s: panic = 0x%08x, ccount = 0x%08x\n",
+		 fn,
+		 __raw_readl(&panic_log->panic->panic),
+		 __raw_readl(&panic_log->panic->ccount));
+	pr_debug("%s: read = 0x%08x, write = 0x%08x, size = 0x%08x\n",
+		 fn,
+		 __raw_readl(&panic_log->panic->rb.read),
+		 __raw_readl(&panic_log->panic->rb.write),
+		 __raw_readl(&panic_log->panic->rb.size));
+}
+
+static void dump_log_page(struct xrp_panic_log *hw)
+{
+	char *buf;
+	size_t i;
+
+	if (!hw->panic)
+		return;
+
+	dump_regs(__func__, hw);
+	buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
+	if (buf) {
+		memcpy_fromio(buf, hw->panic, hw->panic->rb.size);
+        buf+=sizeof(struct xrp_hw_panic);
+		for (i = 0; i < hw->panic->rb.size; i += 64)
+			pr_debug("  %*pEhp\n", 64, buf + i);
+		kfree(buf);
+	} else {
+		pr_debug("(couldn't allocate copy buffer)\n");
+	}
+}
+
+static int log_proc_show(struct seq_file *file, void *v)
+{
+	struct xrp_panic_log *hw = file->private;
+    char *buf;
+   	size_t i; 
+    int page_num = GET_PAGE_NUM(hw->panic->rb.size,0);
+    dump_regs(__func__, hw);
+    buf = kmalloc(PAGE_SIZE*page_num, GFP_KERNEL);
+    if (buf) {
+		memcpy_fromio(buf, hw->panic->rb.data, hw->panic->rb.size);
+        seq_printf(file,"****************** device log >>>>>>>>>>>>>>>>>\n");
+        for (i = 0; i < hw->panic->rb.size; i += 64)
+            seq_printf(file," %*pEp", 64,buf+i);
+			// pr_debug("  %*pEhp\n", 64, buf + i);
+        // seq_printf(file," %*pEp\n",buf);
+        kfree(buf);
+
+        uint32_t	write = __raw_readl(&hw->panic->rb.write);
+        __raw_writel(write, &hw->panic->rb.read);
+
+        return 0;
+    }
+    else
+    {
+        pr_debug("Fail to alloc buf\n");
+        return -1;
+    }
+    return 0;
+}
+
+static int log_proc_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, log_proc_show, NULL);
+}
+
+static const struct file_operations log_proc_fops = {
+        .open      = log_proc_open,
+        .read      = seq_read,
+        .llseek    = seq_lseek,
+        .release   = single_release,
+};
+
+
+static bool xrp_panic_init(struct xrp_hw_panic* panic,size_t size)
+{
+	if(size < sizeof(struct xrp_hw_panic))
+    {
+        return false;
+    }
+    memset_hw(panic,0x0,size);
+    panic->panic = 0;
+	panic->ccount = 0;
+	panic->rb.read = 0;
+	panic->rb.write = 0;
+	panic->rb.size = size - sizeof(struct xrp_hw_panic);
+    sprintf(panic->rb.data,"Inition dsp log\n");
+    return true;
+}
+
+void* xrp_create_panic_log_proc(void* dir,void * panic_addr,size_t size)
+{
+    struct xrp_panic_log *panic_log = kmalloc(sizeof(struct xrp_panic_log),GFP_KERNEL);
+
+    if(panic_log == NULL)
+        return NULL;
+
+    panic_log->last_read = 0;
+    panic_log->panic = panic_addr;
+    xrp_panic_init(panic_log->panic,size);
+
+    panic_log->log_proc_file=proc_create_single_data("dsp_log",0644,dir,&log_proc_show,panic_log);
+    if(panic_log->log_proc_file == NULL) {
+        pr_debug("Error: Could not initialize %s\n","dsp_log");
+        kfree(panic_log);
+        panic_log =NULL;
+    } else {
+
+        pr_debug("%s create Success!\n","dsp_log");
+    }   
+    return panic_log; 
+}
+
+void xrp_remove_panic_log_proc(void *arg)
+{
+    // char file_name[32];
+    struct xrp_panic_log *panic_log = arg;
+    // remove_proc_entry(panic_log->log_proc_file,NULL);
+
+    proc_remove(panic_log->log_proc_file);
+    kfree(arg);
+    pr_debug("dsp proc removed\n");
+}
+
+bool panic_check(void *arg)
+{
+	struct xrp_panic_log *panic_log = arg;
+	uint32_t panic;
+	uint32_t ccount;
+	uint32_t read;
+	uint32_t write;
+	uint32_t size;
+
+	if (!panic_log || !panic_log->panic)
+		return true;
+
+	panic = __raw_readl(&panic_log->panic->panic);
+	ccount = __raw_readl(&panic_log->panic->ccount);
+	read = __raw_readl(&panic_log->panic->rb.read);
+	write = __raw_readl(&panic_log->panic->rb.write);
+	size = __raw_readl(&panic_log->panic->rb.size);
+
+	if (read == 0 && read != panic_log->last_read) {
+		pr_debug( "****************** device restarted >>>>>>>>>>>>>>>>>\n");
+		dump_log_page(panic_log);
+		pr_debug ("<<<<<<<<<<<<<<<<<< device restarted *****************\n");
+	}
+	if (write < size && read < size && size < PAGE_SIZE) {
+		uint32_t tail;
+		uint32_t total;
+		char *buf = NULL;
+
+		panic_log->last_read = read;
+		if (read < write) {
+			tail = write - read;
+			total = tail;
+		} else if (read == write) {
+			tail = 0;
+			total = 0;
+		} else {
+			tail = size - read;
+			total = write + tail;
+		}
+
+		if (total)
+			buf = kmalloc(total, GFP_KERNEL);
+
+		if (buf) {
+			uint32_t off = 0;
+
+			pr_debug("panic = 0x%08x, ccount = 0x%08x read = %d, write = %d, size = %d, total = %d",
+				panic, ccount, read, write, size, total);
+
+			while (off != total) {
+				memcpy_fromio(buf + off,
+					      panic_log->panic->rb.data + read,
+					      tail);
+				read = 0;
+				off += tail;
+				tail = total - tail;
+			}
+			__raw_writel(write, &panic_log->panic->rb.read);
+			panic_log->last_read = write;
+			pr_debug("<<<\n%.*s\n>>>\n",
+				 total, buf);
+			kfree(buf);
+		} else if (total) {
+			pr_debug(
+				"%s: couldn't allocate memory (%d) to read the dump\n",
+				__func__, total);
+		}
+	} else {
+		if (read != panic_log->last_read) {
+			pr_debug(
+				 "nonsense in the log buffer: read = %d, write = %d, size = %d\n",
+				 read, write, size);
+			panic_log->last_read = read;
+		}
+	}
+	if (panic == 0xdeadbabe) {
+		pr_debug("%s: panic detected, log dump:\n", __func__);
+		dump_log_page(panic_log);
+	}
+
+	return panic == 0xdeadbabe;
+}
+

+ 34 - 0
driver/xrp-kernel/xrp_debug.h

@@ -0,0 +1,34 @@
+/*
+ * xrp_debug: 
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#ifndef XRP_DEBUG_H
+#define XRP_DEBUG_H
+void* xrp_create_panic_log_proc(void* dir,void * panic_addr,size_t size);
+
+void xrp_remove_panic_log_proc(void *arg);
+
+bool panic_check(void *arg);
+#endif

+ 406 - 0
driver/xrp-kernel/xrp_firmware.c

@@ -0,0 +1,406 @@
+/*
+ * xrp_firmware: firmware manipulation for the XRP
+ *
+ * Copyright (c) 2015 - 2017 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#include "xrp_firmware.h"
+#include "xrp_address_map.h"
+#include "xrp_hw.h"
+#include "xrp_internal.h"
+#include "xrp_kernel_dsp_interface.h"
+#include <linux/dma-mapping.h>
+#include <linux/elf.h>
+#include <linux/firmware.h>
+#include <linux/highmem.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+
+
+static phys_addr_t xrp_translate_to_cpu(struct xvp *xvp, Elf32_Phdr *phdr) {
+  phys_addr_t res;
+  __be32 addr = cpu_to_be32((u32)phdr->p_paddr);
+  struct device_node *node = of_get_next_child(xvp->dev->of_node, NULL);
+
+  if (!node)
+    node = xvp->dev->of_node;
+
+  res = of_translate_address(node, &addr);
+
+  if (node != xvp->dev->of_node)
+    of_node_put(node);
+  return res;
+}
+
+static int xrp_load_segment_to_sysmem(struct xvp *xvp, Elf32_Phdr *phdr) {
+  // phys_addr_t pa = xrp_translate_to_cpu(xvp, phdr);
+  phys_addr_t pa = xrp_translate_dsp_to_host(&xvp->address_map,phdr->p_paddr);
+  struct page *page = pfn_to_page(__phys_to_pfn(pa));
+  size_t page_offs = pa & ~PAGE_MASK;
+  size_t offs;
+
+  for (offs = 0; offs < phdr->p_memsz; ++page) {
+    void *p = kmap(page);
+    size_t sz;
+
+    if (!p)
+      return -ENOMEM;
+
+    page_offs &= ~PAGE_MASK;
+    sz = PAGE_SIZE - page_offs;
+
+    dev_dbg(xvp->dev, "loading segment to host addr 0x%d  by host visiul %p,size:%d\n",
+         page_offs,p,sz);
+    if (offs < phdr->p_filesz) {
+      size_t copy_sz = sz;
+
+      if (phdr->p_filesz - offs < copy_sz)
+        copy_sz = phdr->p_filesz - offs;
+
+      copy_sz = ALIGN(copy_sz, 4);
+      memcpy(p + page_offs, (void *)xvp->firmware->data + phdr->p_offset + offs,
+             copy_sz);
+      page_offs += copy_sz;
+      offs += copy_sz;
+      sz -= copy_sz;
+    }
+    dev_dbg(xvp->dev, "loading segment to host addr 0x%d  by host visiul %p,size:%d\n",
+         page_offs,p, sz);
+    if (offs < phdr->p_memsz && sz) {
+      if (phdr->p_memsz - offs < sz)
+        sz = phdr->p_memsz - offs;
+
+      sz = ALIGN(sz, 4);
+      memset(p + page_offs, 0, sz);
+      page_offs += sz;
+      offs += sz;
+    }
+    kunmap(page);
+  }
+  dma_sync_single_for_device(xvp->dev, pa, phdr->p_memsz, DMA_TO_DEVICE);
+  dev_dbg(xvp->dev, "xrp_load_segment_to_sysmem");
+  return 0;
+}
+static int xrp_load_segment_to_iomem(struct xvp *xvp, Elf32_Phdr *phdr) {
+ // phys_addr_t pa = xrp_translate_to_cpu(xvp, phdr);
+  phys_addr_t pa = xrp_translate_dsp_to_host(&xvp->address_map,phdr->p_paddr);
+  if(pa==OF_BAD_ADDR)
+  {
+        dev_err(xvp->dev, "couldn't translate DSP addr 0x%x\n", phdr->p_paddr);
+    return -EINVAL;
+  }
+  void __iomem *p = ioremap(pa, phdr->p_memsz);
+
+  if (!p) {
+    dev_err(xvp->dev, "couldn't ioremap %pap x 0x%08x\n", &pa,
+            (u32)phdr->p_memsz);
+    return -EINVAL;
+  }
+  dev_dbg(xvp->dev, "loading segment to host addr 0x%pap by host virtual 0x%llx,size:%d,total size:%d,fw dataptr:0x%llx,offset:0x%x\n",
+         &pa,p, phdr->p_filesz,(u32)phdr->p_memsz,xvp->firmware->data,phdr->p_offset);
+
+  if(phdr->p_filesz)
+  {
+        if (xvp->hw_ops->memcpy_tohw)
+            xvp->hw_ops->memcpy_tohw(p, (void *)xvp->firmware->data + phdr->p_offset,
+                                    ALIGN(phdr->p_filesz, 4));
+        else
+            memcpy_toio(p, (void *)xvp->firmware->data + phdr->p_offset,
+                        ALIGN(phdr->p_filesz, 4));
+
+        dev_dbg(xvp->dev, "copy size:%d\n",ALIGN(phdr->p_filesz, 4));
+  }
+  if(phdr->p_memsz - phdr->p_filesz)
+  {
+        if (xvp->hw_ops->memset_hw)
+            xvp->hw_ops->memset_hw(p + phdr->p_filesz, 0,
+                                phdr->p_memsz - phdr->p_filesz);
+        else
+            memset_io(p + ALIGN(phdr->p_filesz, 4), 0,
+                    ALIGN(phdr->p_memsz - ALIGN(phdr->p_filesz, 4), 4));
+        dev_dbg(xvp->dev, "set size:%d\n",ALIGN(phdr->p_memsz - ALIGN(phdr->p_filesz, 4),4));
+  }
+
+  iounmap(p);
+  dev_dbg(xvp->dev, "xrp_load_segment_to_iomem done\n");
+  return 0;
+}
+
+static inline bool xrp_section_bad(struct xvp *xvp, const Elf32_Shdr *shdr) {
+  return shdr->sh_offset > xvp->firmware->size ||
+         shdr->sh_size > xvp->firmware->size - shdr->sh_offset;
+}
+
+static int xrp_firmware_find_symbol(struct xvp *xvp, const char *name,
+                                    void **paddr, size_t *psize) {
+  const Elf32_Ehdr *ehdr = (Elf32_Ehdr *)xvp->firmware->data;
+  const void *shdr_data = xvp->firmware->data + ehdr->e_shoff;
+  const Elf32_Shdr *sh_symtab = NULL;
+  const Elf32_Shdr *sh_strtab = NULL;
+  const void *sym_data;
+  const void *str_data;
+  const Elf32_Sym *esym;
+  void *addr = NULL;
+  unsigned i;
+
+  if (ehdr->e_shoff == 0) {
+    dev_dbg(xvp->dev, "%s: no section header in the firmware image", __func__);
+    return -ENOENT;
+  }
+  if (ehdr->e_shoff > xvp->firmware->size ||
+      ehdr->e_shnum * ehdr->e_shentsize > xvp->firmware->size - ehdr->e_shoff) {
+    dev_err(xvp->dev, "%s: bad firmware SHDR information", __func__);
+    return -EINVAL;
+  }
+
+  /* find symbols and string sections */
+
+  for (i = 0; i < ehdr->e_shnum; ++i) {
+    const Elf32_Shdr *shdr = shdr_data + i * ehdr->e_shentsize;
+
+    switch (shdr->sh_type) {
+    case SHT_SYMTAB:
+      sh_symtab = shdr;
+      break;
+    case SHT_STRTAB:
+      sh_strtab = shdr;
+      break;
+    default:
+      break;
+    }
+  }
+
+  if (!sh_symtab || !sh_strtab) {
+    dev_dbg(xvp->dev, "%s: no symtab or strtab in the firmware image",
+            __func__);
+    return -ENOENT;
+  }
+
+  if (xrp_section_bad(xvp, sh_symtab)) {
+    dev_err(xvp->dev, "%s: bad firmware SYMTAB section information", __func__);
+    return -EINVAL;
+  }
+
+  if (xrp_section_bad(xvp, sh_strtab)) {
+    dev_err(xvp->dev, "%s: bad firmware STRTAB section information", __func__);
+    return -EINVAL;
+  }
+
+  /* iterate through all symbols, searching for the name */
+
+  sym_data = xvp->firmware->data + sh_symtab->sh_offset;
+  str_data = xvp->firmware->data + sh_strtab->sh_offset;
+
+  for (i = 0; i < sh_symtab->sh_size; i += sh_symtab->sh_entsize) {
+    esym = sym_data + i;
+
+    if (!(ELF_ST_TYPE(esym->st_info) == STT_OBJECT &&
+          esym->st_name < sh_strtab->sh_size &&
+          strncmp(str_data + esym->st_name, name,
+                  sh_strtab->sh_size - esym->st_name) == 0))
+      continue;
+
+    if (esym->st_shndx > 0 && esym->st_shndx < ehdr->e_shnum) {
+      const Elf32_Shdr *shdr = shdr_data + esym->st_shndx * ehdr->e_shentsize;
+      Elf32_Off in_section_off = esym->st_value - shdr->sh_addr;
+
+      if (xrp_section_bad(xvp, shdr)) {
+        dev_err(xvp->dev, "%s: bad firmware section #%d information", __func__,
+                esym->st_shndx);
+        return -EINVAL;
+      }
+
+      if (esym->st_value < shdr->sh_addr || in_section_off > shdr->sh_size ||
+          esym->st_size > shdr->sh_size - in_section_off) {
+        dev_err(xvp->dev, "%s: bad symbol information", __func__);
+        return -EINVAL;
+      }
+      addr = (void *)xvp->firmware->data + shdr->sh_offset + in_section_off;
+
+      dev_dbg(xvp->dev,
+              "%s: found symbol, st_shndx = %d, "
+              "sh_offset = 0x%08x, sh_addr = 0x%08x, "
+              "st_value = 0x%08x, address = %p",
+              __func__, esym->st_shndx, shdr->sh_offset, shdr->sh_addr,
+              esym->st_value, addr);
+    } else {
+      dev_dbg(xvp->dev, "%s: unsupported section index in found symbol: 0x%x",
+              __func__, esym->st_shndx);
+      return -EINVAL;
+    }
+    break;
+  }
+
+  if (!addr)
+    return -ENOENT;
+
+  *paddr = addr;
+  *psize = esym->st_size;
+
+  return 0;
+}
+
+static int xrp_firmware_fixup_symbol(struct xvp *xvp, const char *name,
+                                     phys_addr_t v) {
+  u32 v32 = XRP_DSP_COMM_BASE_MAGIC;
+  void *addr;
+  size_t sz;
+  int rc;
+  if(v == XRP_NO_TRANSLATION)
+  {
+      dev_err(xvp->dev, "%s: invalid dsp address %llx", __func__, name);
+      return -EINVAL;
+  }
+  rc = xrp_firmware_find_symbol(xvp, name, &addr, &sz);
+  if (rc < 0) {
+    dev_err(xvp->dev, "%s: symbol \"%s\" is not found", __func__, name);
+    return rc;
+  }
+
+  if (sz != sizeof(u32)) {
+    dev_err(xvp->dev, "%s: symbol \"%s\" has wrong size: %zu", __func__, name,
+            sz);
+    return -EINVAL;
+  }
+
+  /* update data associated with symbol */
+
+  if (memcmp(addr, &v32, sz) != 0) {
+    dev_dbg(xvp->dev, "%s: value pointed to by symbol is incorrect: %*ph",
+            __func__, (int)sz, addr);
+  }
+
+  v32 = v;
+  memcpy(addr, &v32, sz);
+
+  return 0;
+}
+
+static int xrp_load_firmware(struct xvp *xvp) {
+  Elf32_Ehdr *ehdr = (Elf32_Ehdr *)xvp->firmware->data;
+  int i;
+  if (memcmp(ehdr->e_ident, ELFMAG, SELFMAG)) {
+
+    dev_err(xvp->dev, "bad firmware ELF magic\n");
+    return -EINVAL;
+  }
+
+  if (ehdr->e_type != ET_EXEC) {
+    dev_err(xvp->dev, "bad firmware ELF type\n");
+    return -EINVAL;
+  }
+
+  if (ehdr->e_machine != 94 /*EM_XTENSA*/) {
+    dev_err(xvp->dev, "bad firmware ELF machine\n");
+    return -EINVAL;
+  }
+
+  if (ehdr->e_phoff >= xvp->firmware->size ||
+      ehdr->e_phoff + ehdr->e_phentsize * ehdr->e_phnum > xvp->firmware->size) {
+    dev_err(xvp->dev, "bad firmware ELF PHDR information\n");
+    return -EINVAL;
+  }
+
+  xrp_firmware_fixup_symbol(
+      xvp, "xrp_dsp_comm_base",
+      xrp_translate_to_dsp(&xvp->address_map, xvp->comm_phys));
+
+  for (i = 0; i < ehdr->e_phnum; ++i) {
+    Elf32_Phdr *phdr =
+        (void *)xvp->firmware->data + ehdr->e_phoff + i * ehdr->e_phentsize;
+    phys_addr_t pa;
+    int rc;
+
+    /* Only load non-empty loadable segments, R/W/X */
+    if (!(phdr->p_type == PT_LOAD && (phdr->p_flags & (PF_X | PF_R | PF_W)) &&
+          phdr->p_memsz > 0))
+      continue;
+
+    if (phdr->p_offset >= xvp->firmware->size ||
+        phdr->p_offset + phdr->p_filesz > xvp->firmware->size) {
+      dev_err(xvp->dev, "bad firmware ELF program header entry %d\n", i);
+      return -EINVAL;
+    }
+
+   // pa = xrp_translate_to_cpu(xvp, phdr);
+    pa=phdr->p_paddr;
+    if (pa == (phys_addr_t)OF_BAD_ADDR) {
+      dev_err(
+          xvp->dev,
+          "device address 0x%08x could not be mapped to host physical address",
+          (u32)phdr->p_paddr);
+      return -EINVAL;
+    }
+    dev_dbg(xvp->dev, "loading segment %d (device 0x%08x) to physical %pap\n",
+            i, (u32)phdr->p_paddr, &pa);
+
+    // if (pfn_valid(__phys_to_pfn(pa)))
+    //   rc = xrp_load_segment_to_sysmem(xvp, phdr);
+    // else
+      rc = xrp_load_segment_to_iomem(xvp, phdr);
+
+    if (rc < 0)
+      return rc;
+  }
+    dev_dbg(xvp->dev, "loading firmware sucessful\n");
+  return 0;
+}
+
+int xrp_request_firmware(struct xvp *xvp,Elf32_Addr *boot_addr) {
+  int ret = request_firmware(&xvp->firmware, xvp->firmware_name, xvp->dev);
+
+  if (ret < 0 || boot_addr == NULL)
+    return ret;
+
+  ret = xrp_load_firmware(xvp);
+  *boot_addr = xrp_get_firmware_entry_addr(xvp);
+  release_firmware(xvp->firmware);
+  
+  return ret;
+}
+
+Elf32_Addr xrp_get_firmware_entry_addr(struct xvp *xvp)
+{
+  Elf32_Ehdr *ehdr = (Elf32_Ehdr *)xvp->firmware->data;
+  int i;
+  if (memcmp(ehdr->e_ident, ELFMAG, SELFMAG)) {
+
+    dev_err(xvp->dev, "bad firmware ELF magic\n");
+    return 0;
+  }
+
+  if (ehdr->e_type != ET_EXEC) {
+    dev_err(xvp->dev, "bad firmware ELF type\n");
+    return 0;
+  }
+
+  if (ehdr->e_machine != 94 /*EM_XTENSA*/) {
+    dev_err(xvp->dev, "bad firmware ELF machine\n");
+    return 0;
+  }
+  return ehdr->e_entry;
+
+}

+ 50 - 0
driver/xrp-kernel/xrp_firmware.h

@@ -0,0 +1,50 @@
+/*
+ * xrp_firmware: firmware manipulation for the XRP
+ *
+ * Copyright (c) 2015 - 2017 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#ifndef XRP_FIRMWARE_H
+#define XRP_FIRMWARE_H
+#include <linux/elf.h>
+struct xvp;
+
+#if IS_ENABLED(CONFIG_OF)
+int xrp_request_firmware(struct xvp *xvp,Elf32_Addr *boot_addr);
+Elf32_Addr xrp_get_firmware_entry_addr(struct xvp *xvp);
+#else
+int xrp_request_firmware(struct xvp *xvp,Elf32_Addr *boot_addr)
+{
+	(void)xvp;
+	return -EINVAL;
+}
+Elf32_Addr xrp_get_firmware_entry_addr(struct xvp *xvp)
+{
+	(void)xvp;
+	return 0;
+}
+#endif
+
+#endif

+ 251 - 0
driver/xrp-kernel/xrp_hw.h

@@ -0,0 +1,251 @@
+/*
+ * Copyright (c) 2017 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+/*!
+ * \file xrp_hw.h
+ * \brief Interface between generic and HW-specific kernel drivers.
+ */
+
+#ifndef _XRP_HW
+#define _XRP_HW
+
+#include <linux/irqreturn.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+
+struct xvp;
+
+/*!
+ * Hardware-specific operation entry points.
+ * Hardware-specific driver passes a pointer to this structure to xrp_init
+ * at initialization time.
+ */
+struct xrp_hw_ops {
+	/*!
+	 * Enable power/clock, but keep the core stalled.
+	 * \param hw_arg: opaque parameter passed to xrp_init at initialization
+	 *                time
+	 */
+	int (*enable)(void *hw_arg);
+	/*!
+	 * Diable power/clock.
+	 *
+	 * \param hw_arg: opaque parameter passed to xrp_init at initialization
+	 *                time
+	 */
+	void (*disable)(void *hw_arg);
+	/*!
+	 * Reset the core.
+	 *
+	 * \param hw_arg: opaque parameter passed to xrp_init at initialization
+	 *                time
+	 */
+	void (*reset)(void *hw_arg);
+	/*!
+	 * Unstall the core.
+	 *
+	 * \param hw_arg: opaque parameter passed to xrp_init at initialization
+	 *                time
+	 */
+	void (*release)(void *hw_arg);
+	/*!
+	 * Stall the core.
+	 *
+	 * \param hw_arg: opaque parameter passed to xrp_init at initialization
+	 *                time
+	 */
+	void (*halt)(void *hw_arg);
+
+	/*! Get HW-specific data to pass to the DSP on synchronization
+	 *
+	 * \param hw_arg: opaque parameter passed to xrp_init at initialization
+	 *                time
+	 * \param sz: return size of sync data here
+	 * \return a buffer allocated with kmalloc that the caller will free
+	 */
+	void *(*get_hw_sync_data)(void *hw_arg, size_t *sz);
+
+	/*!
+	 * Send IRQ to the core.
+	 *
+	 * \param hw_arg: opaque parameter passed to xrp_init at initialization
+	 *                time
+	 */
+	void (*send_irq)(void *hw_arg);
+
+	/*!
+	 * Check whether region of physical memory may be handled by
+	 * dma_sync_* operations
+	 *
+	 * \param hw_arg: opaque parameter passed to xrp_init at initialization
+	 *                time
+	 */
+	bool (*cacheable)(void *hw_arg, unsigned long pfn, unsigned long n_pages);
+	/*!
+	 * Synchronize region of memory for DSP access.
+	 *
+	 * \param hw_arg: opaque parameter passed to xrp_init at initialization
+	 *                time
+	 * \param flags: XRP_FLAG_{READ,WRITE,READWRITE}
+	 */
+	void (*dma_sync_for_device)(void *hw_arg,
+				    void *vaddr, phys_addr_t paddr,
+				    unsigned long sz, unsigned flags);
+	/*!
+	 * Synchronize region of memory for host access.
+	 *
+	 * \param hw_arg: opaque parameter passed to xrp_init at initialization
+	 *                time
+	 * \param flags: XRP_FLAG_{READ,WRITE,READWRITE}
+	 */
+	void (*dma_sync_for_cpu)(void *hw_arg,
+				 void *vaddr, phys_addr_t paddr,
+				 unsigned long sz, unsigned flags);
+
+	/*!
+	 * memcpy data/code to device-specific memory.
+	 */
+	void (*memcpy_tohw)(volatile void __iomem *dst, const void *src, size_t sz);
+	/*!
+	 * memset device-specific memory.
+	 */
+	void (*memset_hw)(volatile void __iomem *dst, int c, size_t sz);
+
+	/*!
+	 * Check DSP status.
+	 *
+	 * \param hw_arg: opaque parameter passed to xrp_init at initialization
+	 *                time
+	 * \return whether the core has crashed and needs to be restarted
+	 */
+	bool (*panic_check)(void *hw_arg);
+
+	phys_addr_t (*get_base_mimo)(void *hw_arg);
+
+	void (*update_device_base)(void *hw_arg,phys_addr_t addr);
+
+	void (*set_reset_vector)(void *hw_arg,u32 addr);
+
+    void (*clear_hw)(void *hw_arg);
+
+};
+
+enum xrp_init_flags {
+	/*! Use interrupts in DSP->host communication */
+	XRP_INIT_USE_HOST_IRQ = 0x1,
+};
+
+/*!
+ * Initialize generic XRP kernel driver from cdns,xrp-compatible device
+ * tree node.
+ *
+ * \param pdev: pointer to platform device associated with the XRP device
+ *              instance
+ * \param flags: initialization flags
+ * \param hw: pointer to xrp_hw_ops structeure for this device
+ * \param hw_arg: opaque pointer passed back to hw-specific functions
+ * \return error code or pointer to struct xvp, use IS_ERR_VALUE and ERR_PTR
+ */
+long xrp_init(struct platform_device *pdev, enum xrp_init_flags flags,
+	      const struct xrp_hw_ops *hw, void *hw_arg,int mem_idx);
+
+/*!
+ * Initialize generic XRP kernel driver from cdns,xrp,v1-compatible device
+ * tree node.
+ *
+ * \param pdev: pointer to platform device associated with the XRP device
+ *              instance
+ * \param flags: initialization flags
+ * \param hw: pointer to xrp_hw_ops structeure for this device
+ * \param hw_arg: opaque pointer passed back to hw-specific functions
+ * \return error code or pointer to struct xvp, use IS_ERR_VALUE and ERR_PTR
+ */
+long xrp_init_v1(struct platform_device *pdev, enum xrp_init_flags flags,
+		 const struct xrp_hw_ops *hw, void *hw_arg,int mem_idx);
+
+/*!
+ * Initialize generic XRP kernel driver from cdns,xrp,cma-compatible device
+ * tree node.
+ *
+ * \param pdev: pointer to platform device associated with the XRP device
+ *              instance
+ * \param flags: initialization flags
+ * \param hw: pointer to xrp_hw_ops structeure for this device
+ * \param hw_arg: opaque pointer passed back to hw-specific functions
+ * \return error code or pointer to struct xvp, use IS_ERR_VALUE and ERR_PTR
+ */
+long xrp_init_cma(struct platform_device *pdev, enum xrp_init_flags flags,
+		  const struct xrp_hw_ops *hw, void *hw_arg,int mem_idx);
+
+/*!
+ * Deinitialize generic XRP kernel driver.
+ *
+ * \param pdev: pointer to platform device associated with the XRP device
+ *              instance
+ * \return 0 on success, negative error code otherwise
+ */
+int xrp_deinit(struct platform_device *pdev);
+
+/*!
+ * Deinitialize generic XRP kernel driver.
+ *
+ * \param pdev: pointer to platform device associated with the XRP device
+ *              instance
+ * \param hw_arg: optional pointer to opaque pointer where generic XRP driver
+ *                returns hw_arg that was associated with the pdev at xrp_init
+ *                time
+ * \return 0 on success, negative error code otherwise
+ */
+int xrp_deinit_hw(struct platform_device *pdev, void **hw_arg);
+
+/*!
+ * Notify generic XRP driver of possible IRQ from the DSP.
+ *
+ * \param irq: IRQ number
+ * \param xvp: pointer to struct xvp returned from xrp_init* call
+ * \return whether IRQ was recognized and handled
+ */
+irqreturn_t xrp_irq_handler(int irq, struct xvp *xvp);
+
+/*!
+ * Resume generic XRP operation of the device dev.
+ *
+ * \param dev: device which operation shall be resumed
+ * \return 0 on success, negative error code otherwise
+ */
+int xrp_runtime_resume(struct device *dev);
+
+/*!
+ * Suspend generic XRP operation of the device dev.
+ *
+ * \param dev: device which operation shall be suspended
+ * \return 0 on success, negative error code otherwise
+ */
+int xrp_runtime_suspend(struct device *dev);
+
+int xrp_set_reset_reg(int dsp_id);
+
+#endif

+ 157 - 0
driver/xrp-kernel/xrp_hw_comm.c

@@ -0,0 +1,157 @@
+/*
+ * XRP: Linux device driver for Xtensa Remote Processing
+ *
+ * Copyright (c) 2015 - 2017 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#include <linux/version.h>
+#include <linux/atomic.h>
+#include <linux/acpi.h>
+#include <linux/completion.h>
+#include <linux/delay.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 16, 0)
+#include <linux/dma-mapping.h>
+#else
+#include <linux/dma-direct.h>
+#endif
+#include <linux/firmware.h>
+#include <linux/fs.h>
+#include <linux/hashtable.h>
+#include <linux/highmem.h>
+#include <linux/idr.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_reserved_mem.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/property.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/sort.h>
+#include <asm/mman.h>
+#include <linux/mman.h>
+#include <asm/uaccess.h>
+#include "xrp_cma_alloc.h"
+#include "xrp_firmware.h"
+#include "xrp_hw.h"
+#include "xrp_internal.h"
+#include "xrp_kernel_defs.h"
+#include "xrp_kernel_dsp_interface.h"
+#include "xrp_private_alloc.h"
+
+#define DRIVER_NAME "xrp_hw_com"
+
+struct xrp_hw_common_drvdata {
+
+	phys_addr_t sys_reg_phys;
+	void __iomem *sys_regs;
+	size_t  sys_reg_size;
+	struct mutex lock;
+
+};
+static struct xrp_hw_common_drvdata  *hw_drvdata = NULL;
+#define XRP_REG_RESET		(0x28)
+#define DSP0_RESET_BIT_MASK      (0x1<<8)
+
+#define DSP1_RESET_BIT_MASK      (0x1<<12)
+int xrp_set_reset_reg(int dsp_id)
+{
+	uint32_t bit_mask = dsp_id==0?DSP0_RESET_BIT_MASK
+								:DSP1_RESET_BIT_MASK;
+
+	pr_debug("%s,reset\n", __func__);
+	if(!hw_drvdata)
+	{
+		pr_debug("%s hw_drvdata is NULL \n",__func__);
+		return -1;
+	}
+	mutex_lock(&hw_drvdata->lock);
+
+	uint32_t old_value = __raw_readl(hw_drvdata->sys_regs+XRP_REG_RESET);
+	pr_debug("%s,reset reg:%x\n",__func__,old_value);
+	__raw_writel(old_value^bit_mask,hw_drvdata->sys_regs+XRP_REG_RESET);
+	udelay(10000);
+	__raw_writel(old_value,hw_drvdata->sys_regs+XRP_REG_RESET);
+	mutex_unlock(&hw_drvdata->lock);
+
+	return 0;
+}
+EXPORT_SYMBOL(xrp_set_reset_reg);
+static const struct of_device_id xrp_hw_common_of_match[] = {
+	{
+		.compatible = "thead,dsp-hw-common",
+	}, {},
+};
+// MODULE_DEVICE_TABLE(of, xrp_hw_common_of_match);
+static int xrp_hw_common_probe(struct platform_device *pdev)
+{
+	long ret = -EINVAL;
+
+	struct resource *mem;
+
+	hw_drvdata =
+		devm_kzalloc(&pdev->dev, sizeof(*hw_drvdata), GFP_KERNEL);
+	if (!hw_drvdata)
+		return -ENOMEM;	
+
+	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!mem) {
+		return -ENODEV;
+	}
+	hw_drvdata->sys_reg_phys = mem->start;
+	hw_drvdata->sys_reg_size =mem->end-mem->start;
+	hw_drvdata->sys_regs = devm_ioremap_resource(&pdev->dev, mem);
+	pr_debug("%s,sys_reg_phys:%lx,sys_regs:%lx,size:%x\n", __func__,
+				hw_drvdata->sys_reg_phys,hw_drvdata->sys_regs,hw_drvdata->sys_reg_size);
+	mutex_init(&hw_drvdata->lock);
+
+	return 0;
+}
+
+static int xrp_hw_common_remove(struct platform_device *pdev)
+{
+	return 0;
+}
+
+
+static struct platform_driver xrp_hw_common_driver = {
+	.probe   = xrp_hw_common_probe,
+	.remove  = xrp_hw_common_remove,
+	.driver  = {
+		.name = DRIVER_NAME,
+		.of_match_table = of_match_ptr( xrp_hw_common_of_match),
+	},
+};
+
+module_platform_driver(xrp_hw_common_driver);
+
+MODULE_AUTHOR("T-HEAD");
+MODULE_DESCRIPTION("XRP: Linux device driver for Xtensa Remote Processing");
+MODULE_LICENSE("Dual MIT/GPL");

+ 480 - 0
driver/xrp-kernel/xrp_hw_hikey960.c

@@ -0,0 +1,480 @@
+/*
+ * xrp_hw_hikey: Simple xtensa/arm low-level XRP driver
+ *
+ * Copyright (c) 2018 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include "xrp_hw.h"
+#include "xrp_hw_hikey960_dsp_interface.h"
+#include "xrp_ring_buffer.h"
+
+#include <linux/hisi/hisi_rproc.h>
+#include <ipcm/bsp_drv_ipc.h>
+#include <mailbox/drv_mailbox_msg.h>
+
+#define DRIVER_NAME "xrp-hw-hikey960"
+
+enum xrp_irq_mode {
+	XRP_IRQ_NONE,
+	XRP_IRQ_LEVEL,
+	XRP_IRQ_EDGE,
+	XRP_IRQ_MAX,
+};
+
+struct xrp_hw_hikey {
+	struct xvp *xrp;
+	struct device *dev;
+
+	struct xrp_hw_hikey960_panic __iomem *panic;
+	uint32_t last_read;
+
+	/* how IRQ is used to notify the device of incoming data */
+	enum xrp_irq_mode device_irq_mode;
+	/* device IRQ# */
+	u32 device_irq;
+	/* how IRQ is used to notify the host of incoming data */
+	enum xrp_irq_mode host_irq_mode;
+	/* dummy host IRQ */
+	u32 host_irq;
+};
+
+static void *get_hw_sync_data(void *hw_arg, size_t *sz)
+{
+	struct xrp_hw_hikey *hw = hw_arg;
+	struct xrp_hw_hikey960_sync_data *hw_sync_data =
+		kmalloc(sizeof(*hw_sync_data), GFP_KERNEL);
+
+	if (!hw_sync_data)
+		return NULL;
+
+	*hw_sync_data = (struct xrp_hw_hikey960_sync_data){
+		.host_irq_mode = hw->host_irq_mode,
+		.device_irq_mode = hw->device_irq_mode,
+		.device_irq = hw->device_irq,
+	};
+	*sz = sizeof(*hw_sync_data);
+	return hw_sync_data;
+}
+
+static int send_cmd_async(struct xrp_hw_hikey *hw, uint32_t mbx, uint32_t cmd)
+{
+	int ret = RPROC_ASYNC_SEND(mbx, &cmd, 1);
+	if (ret != 0) {
+		dev_err(hw->dev, "%s: RPROC_ASYNC_SEND ret = %d\n",
+			__func__, ret);
+	}
+	return ret;
+}
+
+static int send_cmd_sync(struct xrp_hw_hikey *hw, uint32_t mbx, uint32_t cmd)
+{
+	int ret = hisi_rproc_xfer_sync_auto(mbx, &cmd, 1, NULL, 0);
+	if (ret != 0) {
+		dev_err(hw->dev, "%s: RPROC_SYNC_SEND ret = %d\n",
+			__func__, ret);
+	}
+	return ret;
+}
+
+static int enable(void *hw_arg)
+{
+	return 0;
+}
+
+static void disable(void *hw_arg)
+{
+}
+
+static void reset(void *hw_arg)
+{
+}
+
+static void dump_regs(const char *fn, void *hw_arg)
+{
+	struct xrp_hw_hikey *hw = hw_arg;
+
+	if (!hw->panic)
+		return;
+
+	dev_info(hw->dev, "%s: panic = 0x%08x, ccount = 0x%08x\n",
+		 fn,
+		 __raw_readl(&hw->panic->panic),
+		 __raw_readl(&hw->panic->ccount));
+	dev_info(hw->dev, "%s: read = 0x%08x, write = 0x%08x, size = 0x%08x\n",
+		 fn,
+		 __raw_readl(&hw->panic->rb.read),
+		 __raw_readl(&hw->panic->rb.write),
+		 __raw_readl(&hw->panic->rb.size));
+}
+
+static void dump_log_page(struct xrp_hw_hikey *hw)
+{
+	char *buf;
+	size_t i;
+
+	if (!hw->panic)
+		return;
+
+	dump_regs(__func__, hw);
+	buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
+	if (buf) {
+		memcpy_fromio(buf, hw->panic, PAGE_SIZE);
+		for (i = 0; i < PAGE_SIZE; i += 64)
+			dev_info(hw->dev, "  %*pEhp\n", 64, buf + i);
+		kfree(buf);
+	} else {
+		dev_err(hw->dev, "  (couldn't allocate copy buffer)\n");
+	}
+}
+
+static void halt(void *hw_arg)
+{
+	struct xrp_hw_hikey *hw = hw_arg;
+	int i;
+
+	dev_dbg(hw->dev, "%s\n", __func__);
+	dump_regs(__func__, hw);
+	dump_log_page(hw);
+
+	send_cmd_sync(hw_arg, HISI_RPROC_LPM3_MBX17,
+		       (16 << 16) | (3 << 8) | (1 << 0));
+	for (i = 0; i < 10; ++i) {
+		schedule();
+		mdelay(1);
+		dump_regs(__func__, hw);
+	}
+	dev_dbg(hw->dev, "%s done\n", __func__);
+}
+
+static void release(void *hw_arg)
+{
+	struct xrp_hw_hikey *hw = hw_arg;
+	int i;
+
+	dev_dbg(hw->dev, "%s\n", __func__);
+	dump_regs(__func__, hw);
+
+	send_cmd_async(hw_arg, HISI_RPROC_HIFI_MBX18, 0xb007);
+	for (i = 0; i < 10; ++i) {
+		schedule();
+		mdelay(1);
+		dump_regs(__func__, hw);
+	}
+	dev_dbg(hw->dev, "%s done\n", __func__);
+}
+
+static void send_irq(void *hw_arg)
+{
+	struct xrp_hw_hikey *hw = hw_arg;
+
+	switch (hw->device_irq_mode) {
+	case XRP_IRQ_EDGE:
+	case XRP_IRQ_LEVEL:
+		send_cmd_async(hw_arg, HISI_RPROC_HIFI_MBX18, 0);
+		break;
+	default:
+		break;
+	}
+}
+
+static void irq_handler(void *dev_id)
+{
+	struct xrp_hw_hikey *hw = dev_id;
+
+	dev_dbg(hw->dev, "%s\n", __func__);
+	xrp_irq_handler(0, hw->xrp);
+	DRV_k3IpcIntHandler_Autoack();
+}
+
+static void *irq_handler_context;
+static void irq1_handler(unsigned int dummy)
+{
+	irq_handler(irq_handler_context);
+}
+
+static bool panic_check(void *hw_arg)
+{
+	struct xrp_hw_hikey *hw = hw_arg;
+	uint32_t panic;
+	uint32_t ccount;
+	uint32_t read;
+	uint32_t write;
+	uint32_t size;
+
+	if (!hw->panic)
+		return false;
+
+	panic = __raw_readl(&hw->panic->panic);
+	ccount = __raw_readl(&hw->panic->ccount);
+	read = __raw_readl(&hw->panic->rb.read);
+	write = __raw_readl(&hw->panic->rb.write);
+	size = __raw_readl(&hw->panic->rb.size);
+
+	if (read == 0 && read != hw->last_read) {
+		dev_warn(hw->dev, "****************** device restarted >>>>>>>>>>>>>>>>>\n");
+		dump_log_page(hw);
+		dev_warn(hw->dev, "<<<<<<<<<<<<<<<<<< device restarted *****************\n");
+	}
+	if (write < size && read < size && size < PAGE_SIZE) {
+		uint32_t tail;
+		uint32_t total;
+		char *buf = NULL;
+
+		hw->last_read = read;
+		if (read < write) {
+			tail = write - read;
+			total = tail;
+		} else if (read == write) {
+			tail = 0;
+			total = 0;
+		} else {
+			tail = size - read;
+			total = write + tail;
+		}
+
+		if (total)
+			buf = kmalloc(total, GFP_KERNEL);
+
+		if (buf) {
+			uint32_t off = 0;
+
+			dev_dbg(hw->dev, "panic = 0x%08x, ccount = 0x%08x read = %d, write = %d, size = %d, total = %d",
+				panic, ccount, read, write, size, total);
+
+			while (off != total) {
+				memcpy_fromio(buf + off,
+					      hw->panic->rb.data + read,
+					      tail);
+				read = 0;
+				off += tail;
+				tail = total - tail;
+			}
+			__raw_writel(write, &hw->panic->rb.read);
+			hw->last_read = write;
+			dev_info(hw->dev, "<<<\n%.*s\n>>>\n",
+				 total, buf);
+			kfree(buf);
+		} else if (total) {
+			dev_err(hw->dev,
+				"%s: couldn't allocate memory (%d) to read the dump\n",
+				__func__, total);
+		}
+	} else {
+		if (read != hw->last_read) {
+			dev_warn(hw->dev,
+				 "nonsense in the log buffer: read = %d, write = %d, size = %d\n",
+				 read, write, size);
+			hw->last_read = read;
+		}
+	}
+	if (panic == 0xdeadbabe) {
+		dev_info(hw->dev, "%s: panic detected, log dump:\n", __func__);
+		dump_log_page(hw);
+	}
+
+	return panic == 0xdeadbabe;
+}
+
+static const struct xrp_hw_ops hw_ops = {
+	.enable = enable,
+	.disable = disable,
+	.halt = halt,
+	.release = release,
+	.reset = reset,
+
+	.get_hw_sync_data = get_hw_sync_data,
+
+	.send_irq = send_irq,
+
+	.panic_check = panic_check,
+};
+
+static long init_hw(struct platform_device *pdev, struct xrp_hw_hikey *hw,
+		    int mem_idx, enum xrp_init_flags *init_flags)
+{
+	struct resource *mem;
+	long ret;
+
+	mem = platform_get_resource(pdev, IORESOURCE_MEM, mem_idx);
+	if (mem) {
+		hw->panic = devm_ioremap_resource(&pdev->dev, mem);
+		if (IS_ERR(hw->panic)) {
+			dev_dbg(&pdev->dev,
+				"%s: couldn't ioremap abort/log region: %ld\n",
+				__func__, PTR_ERR(hw->panic));
+			hw->panic = NULL;
+		} else {
+			dev_dbg(&pdev->dev,
+				"%s: log ring buffer = %pap, mapped at %p\n",
+				__func__, &mem->start, hw->panic);
+		}
+	}
+
+	ret = of_property_read_u32(pdev->dev.of_node,
+				   "device-irq",
+				   &hw->device_irq);
+	if (ret == 0) {
+		hw->device_irq_mode = XRP_IRQ_LEVEL;
+		dev_dbg(&pdev->dev,
+			"%s: device IRQ = %d\n",
+			__func__, hw->device_irq);
+	} else {
+		dev_info(&pdev->dev,
+			 "using polling mode on the device side\n");
+	}
+
+	ret = of_property_read_u32(pdev->dev.of_node,
+				   "host-irq",
+				   &hw->host_irq);
+	if (ret == 0) {
+		hw->host_irq_mode = XRP_IRQ_LEVEL;
+		dev_dbg(&pdev->dev, "%s: using host IRQ\n", __func__);
+		irq_handler_context = hw;
+		DRV_IPCIntInit();
+		IPC_IntConnect(IPC_ACPU_INT_SRC_HIFI_MSG,
+			       irq1_handler, 0);
+		IPC_IntEnable(IPC_ACPU_INT_SRC_HIFI_MSG);
+		*init_flags |= XRP_INIT_USE_HOST_IRQ;
+	} else {
+		dev_info(&pdev->dev, "using polling mode on the host side\n");
+	}
+	return 0;
+}
+
+typedef long init_function(struct platform_device *pdev,
+			   struct xrp_hw_hikey *hw);
+
+static init_function init_v1;
+static long init_v1(struct platform_device *pdev, struct xrp_hw_hikey *hw)
+{
+	long ret;
+	enum xrp_init_flags init_flags = 0;
+
+	ret = init_hw(pdev, hw, 1, &init_flags);
+	if (ret < 0)
+		return ret;
+
+	return xrp_init_v1(pdev, init_flags, &hw_ops, hw);
+}
+
+static init_function init_cma;
+static long init_cma(struct platform_device *pdev, struct xrp_hw_hikey *hw)
+{
+	long ret;
+	enum xrp_init_flags init_flags = 0;
+
+	ret = init_hw(pdev, hw, 0, &init_flags);
+	if (ret < 0)
+		return ret;
+
+	return xrp_init_cma(pdev, init_flags, &hw_ops, hw);
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id xrp_hw_hikey_match[] = {
+	{
+		.compatible = "cdns,xrp-hw-hikey960,v1",
+		.data = init_v1,
+	}, {
+		.compatible = "cdns,xrp-hw-hikey960,cma",
+		.data = init_cma,
+	}, {},
+};
+MODULE_DEVICE_TABLE(of, xrp_hw_hikey_match);
+#endif
+
+static int xrp_hw_hikey_probe(struct platform_device *pdev)
+{
+	struct xrp_hw_hikey *hw =
+		devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
+	const struct of_device_id *match;
+	init_function *init;
+	long ret;
+
+	if (!hw)
+		return -ENOMEM;
+
+	match = of_match_device(of_match_ptr(xrp_hw_hikey_match),
+				&pdev->dev);
+	if (!match)
+		return -ENODEV;
+
+	hw->dev = &pdev->dev;
+	init = match->data;
+	ret = init(pdev, hw);
+	if (IS_ERR_VALUE(ret)) {
+		xrp_deinit(pdev);
+		return ret;
+	} else {
+		hw->xrp = ERR_PTR(ret);
+		return 0;
+	}
+
+}
+
+static int xrp_hw_hikey_remove(struct platform_device *pdev)
+{
+	/*
+	 * There's no way to disconnect from IPC or disable IPC IRQ.
+	 * Do it here when it's available.
+	 */
+	return xrp_deinit(pdev);
+}
+
+static int xrp_hw_hikey_idle(struct device *dev)
+{
+	/* Power management is flaky, don't do it now. */
+	return 1;
+}
+
+static const struct dev_pm_ops xrp_hw_hikey_pm_ops = {
+	SET_RUNTIME_PM_OPS(xrp_runtime_suspend,
+			   xrp_runtime_resume,
+			   xrp_hw_hikey_idle)
+};
+
+static struct platform_driver xrp_hw_hikey_driver = {
+	.probe   = xrp_hw_hikey_probe,
+	.remove  = xrp_hw_hikey_remove,
+	.driver  = {
+		.name = DRIVER_NAME,
+		.of_match_table = of_match_ptr(xrp_hw_hikey_match),
+		.pm = &xrp_hw_hikey_pm_ops,
+	},
+};
+
+module_platform_driver(xrp_hw_hikey_driver);
+
+MODULE_AUTHOR("Max Filippov");
+MODULE_DESCRIPTION("XRP HiKey960: low level device driver for Xtensa Remote Processing");
+MODULE_LICENSE("Dual MIT/GPL");

+ 53 - 0
driver/xrp-kernel/xrp_hw_hikey960_dsp_interface.h

@@ -0,0 +1,53 @@
+/*
+ * XRP interface between hardware-specific linux and DSP parts of HiKey960
+ *
+ * Copyright (c) 2018 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#ifndef _XRP_KERNEL_HIKEY960_DSP_INTERFACE
+#define _XRP_KERNEL_HIKEY960_DSP_INTERFACE
+
+#include "xrp_ring_buffer.h"
+
+enum {
+	XRP_DSP_SYNC_IRQ_MODE_NONE = 0x0,
+	XRP_DSP_SYNC_IRQ_MODE_LEVEL = 0x1,
+	XRP_DSP_SYNC_IRQ_MODE_EDGE = 0x2,
+};
+
+struct xrp_hw_hikey960_sync_data {
+	__u32 host_irq_mode;
+	__u32 device_irq_mode;
+	__u32 device_irq;
+};
+
+struct xrp_hw_hikey960_panic {
+	__u32 panic;
+	__u32 ccount;
+	__u32 reserved[2];
+	struct xrp_ring_buffer rb;
+};
+
+#endif

+ 1158 - 0
driver/xrp-kernel/xrp_hw_simple.c

@@ -0,0 +1,1158 @@
+/*
+ * xrp_hw_simple: Simple xtensa/arm low-level XRP driver
+ *
+ * Copyright (c) 2017 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#include <linux/delay.h>
+// #include <linux/dma-noncoherent.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <asm/cacheflush.h>
+#include "xrp_kernel_defs.h"
+#include "xrp_hw.h"
+#include "xrp_hw_simple_dsp_interface.h"
+
+#define DRIVER_NAME "xrp-hw-simple"
+
+#define XRP_REG_RESET		(0x28)
+#define RESET_BIT_MASK      (0x1<<8)
+
+#define CDNS_DSP_RRG_OFFSET  (0x4000)
+#define XRP_REG_RUNSTALL	(CDNS_DSP_RRG_OFFSET+0x20)
+#define START_VECTOR_SEL    (CDNS_DSP_RRG_OFFSET+0x1C)
+#define ALT_RESET_VEC      (CDNS_DSP_RRG_OFFSET+0x18)
+// #define DSP_INT_MASK    (0x1<<1)
+// #define INT_DSP_MASK (0x1<<1)
+#define VI_SYS_OFFSET_MASK   (0x00000FFF)
+
+#ifdef WITH_VISYS_KO
+extern int k_bm_visys_write_reg(uint32_t offset, uint32_t value);
+extern int k_bm_visys_read_reg(uint32_t offset, uint32_t *value);
+#endif
+enum xrp_irq_mode {
+	XRP_IRQ_NONE,
+	XRP_IRQ_LEVEL,
+	XRP_IRQ_EDGE,
+	XRP_IRQ_EDGE_SW,
+	XRP_IRQ_MAX,
+};
+
+struct xrp_hw_simple {
+	struct xvp *xrp;
+    phys_addr_t dev_regs_phys;
+	void __iomem *dev_regs;
+	/*  IRQ register base phy address on device side */
+	phys_addr_t irq_regs_dev_phys;
+	/*  Device IRQ register phy base addr on host side */
+	phys_addr_t device_irq_regs_phys;
+	/*  Device IRQ register virtual base  addr on host side */
+	void __iomem *device_irq_regs;
+	/*  host IRQ register phy base addr on host side */
+	phys_addr_t host_irq_regs_phys;
+	/*  host IRQ register virtual base addr on host side */
+	void __iomem *host_irq_regs;
+	/* how IRQ is used to notify the device of incoming data */
+	enum xrp_irq_mode device_irq_mode;
+	/*
+	 * offset of device IRQ register in MMIO region (device side)
+	 * bit number
+	 * device IRQ#
+	 */
+	u32 device_irq[3];
+	/* offset of devuce IRQ register in MMIO region (host side) */
+	u32 device_irq_host_offset;
+	/* how IRQ is used to notify the host of incoming data */
+	enum xrp_irq_mode host_irq_mode;
+	/*
+	 * offset of IRQ register (host side)
+	 * bit number
+	 */
+	u32 host_irq[2];
+	/*
+	   offset of IRQ register  (device side to trigger)
+	*/
+	u32 host_irq_offset;
+	u32 device_id;
+
+    struct xrp_hw_panic __iomem *panic;
+    phys_addr_t panic_phys;
+    u32 last_read;
+    
+    struct proc_dir_entry *log_proc_file;
+    struct clk *cclk;
+    // struct clk *aclk;
+    struct clk *pclk;
+};
+
+// static inline void irq_reg_write32(struct xrp_hw_simple *hw, unsigned addr, u32 v)
+// {
+// 	if (hw->irq_regs)
+// 	   // pr_debug("%s,irq Addr %llx\n",__func__,(unsigned long long)(hw->regs + addr));
+// 		__raw_writel(v, hw->irq_regs + addr);
+// }
+
+static inline void host_irq_reg_write32(struct xrp_hw_simple *hw, unsigned int addr, u32 v)
+{
+    if( IOMEM_ERR_PTR(-EBUSY) ==hw->host_irq_regs )
+    {
+        #ifdef WITH_VISYS_KO
+        uint32_t offset = ((uint32_t)(hw->host_irq_regs_phys&VI_SYS_OFFSET_MASK)+addr);
+        // pr_debug("%s,vi sys write (%x,%d)\n",__func__,offset,v);
+        k_bm_visys_write_reg(offset, v);
+        #else
+            pr_debug("%s,vi sys Error,need enable VISYS KO\n",__func__);
+        #endif
+        return;
+    }
+	if (hw->host_irq_regs)
+	    pr_debug("%s,irq Addr %llx\n",__func__,(unsigned long long)(hw->host_irq_regs + addr));
+		__raw_writel(v, hw->host_irq_regs + addr);
+}
+
+static inline void device_irq_reg_write32(struct xrp_hw_simple *hw, unsigned int addr, u32 v)
+{
+	if( IOMEM_ERR_PTR(-EBUSY) ==hw->device_irq_regs )
+    {
+        #ifdef WITH_VISYS_KO
+        uint32_t offset =  ((uint32_t)(hw->device_irq_regs_phys&VI_SYS_OFFSET_MASK)+addr);
+        pr_debug("%s,vi sys write (%lx,%x,0x%x,%d)\n",__func__,hw->device_irq_regs_phys,addr,offset,v);
+        k_bm_visys_write_reg(offset, v);
+        #else
+            pr_debug("%s,vi sys Error,need enable VISYS KO\n",__func__);
+        #endif
+        return;
+    }
+    if (hw->device_irq_regs)
+	    pr_debug("%s,irq Addr %llx\n",__func__,(unsigned long long)(hw->device_irq_regs + addr));
+		__raw_writel(v, hw->device_irq_regs + addr);
+}
+
+// static inline u32 irq_reg_read32(struct xrp_hw_simple *hw, unsigned addr)
+// {
+// 	if (hw->irq_regs)
+// 		return __raw_readl(hw->irq_regs + addr);
+// 	else
+// 		return 0;
+// }
+
+static inline u32 host_irq_reg_read32(struct xrp_hw_simple *hw, unsigned addr)
+{
+    if( IOMEM_ERR_PTR(-EBUSY) ==hw->host_irq_regs )
+    {
+
+        uint32_t offset = ((uint32_t)(hw->host_irq_regs_phys&VI_SYS_OFFSET_MASK)+(uint32_t)addr);
+        uint32_t v=0;
+        #ifdef WITH_VISYS_KO
+        k_bm_visys_read_reg(offset,&v);
+        // pr_debug("%s,vi sys read (%x,%d)\n",__func__,offset,v);
+        #else
+            pr_err("%s,vi sys Error,need enable VISYS KO\n",__func__);
+        #endif
+        return v;
+
+    }
+       
+    if (hw->host_irq_regs)
+		return __raw_readl(hw->host_irq_regs + addr);
+	else
+		return 0;
+}
+
+static inline u32 device_irq_reg_read32(struct xrp_hw_simple *hw, unsigned addr)
+{
+    if( IOMEM_ERR_PTR(-EBUSY) ==hw->device_irq_regs )
+    {
+
+        uint32_t offset =  ((uint32_t)(hw->device_irq_regs_phys&VI_SYS_OFFSET_MASK)+(uint32_t)addr);
+        uint32_t v = 0;
+        #ifdef WITH_VISYS_KO
+        k_bm_visys_read_reg(offset,&v);
+        // pr_debug("%s,vi sys write (%x,%d)\n",__func__,offset,v);
+        #else
+            pr_error("%s,vi sys Error,need enable VISYS KO\n",__func__);
+        #endif
+        return v;
+
+    }
+
+    if (hw->device_irq_regs)
+		return __raw_readl(hw->device_irq_regs + addr);
+	else
+		return 0;
+}
+
+static inline void dev_reg_write32(struct xrp_hw_simple *hw, unsigned addr, u32 v)
+{
+	if (hw->dev_regs)
+
+		//pr_debug("%s,write to dev Addr %p,value:%x\n",__func__,(hw->dev_regs + addr),v);
+		__raw_writel(v, hw->dev_regs + addr);
+}
+
+static inline u32 dev_reg_read32(struct xrp_hw_simple *hw, unsigned addr)
+{
+	if (hw->dev_regs)
+		return __raw_readl(hw->dev_regs + addr);
+	else
+		return 0;
+}
+
+static void dump_regs(const char *fn, void *hw_arg)
+{
+	struct xrp_hw_simple *hw = hw_arg;
+
+	if (!hw->panic)
+		return;
+
+	pr_debug("%s: panic = 0x%08x, ccount = 0x%08x\n",
+		 fn,
+		 __raw_readl(&hw->panic->panic),
+		 __raw_readl(&hw->panic->ccount));
+	pr_debug("%s: read = 0x%08x, write = 0x%08x, size = 0x%08x\n",
+		 fn,
+		 __raw_readl(&hw->panic->rb.read),
+		 __raw_readl(&hw->panic->rb.write),
+		 __raw_readl(&hw->panic->rb.size));
+}
+
+static void dump_log_page(struct xrp_hw_simple *hw)
+{
+	char *buf;
+	size_t i;
+
+	if (!hw->panic)
+		return;
+
+	dump_regs(__func__, hw);
+	buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
+	if (buf) {
+		memcpy_fromio(buf, hw->panic, hw->panic->rb.size);
+        buf+=sizeof(struct xrp_hw_panic);
+		for (i = 0; i < hw->panic->rb.size; i += 64)
+			pr_debug("  %*pEhp\n", 64, buf + i);
+		kfree(buf);
+	} else {
+		pr_debug("(couldn't allocate copy buffer)\n");
+	}
+}
+
+static int log_proc_show(struct seq_file *file, void *v)
+{
+	struct xrp_hw_simple *hw = file->private;
+    char *buf;
+   	size_t i; 
+    dump_regs(__func__, hw);
+    buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
+    if (buf) {
+		memcpy_fromio(buf, hw->panic->rb.data, hw->panic->rb.size);
+        seq_printf(file,"****************** device log >>>>>>>>>>>>>>>>>\n");
+        for (i = 0; i < hw->panic->rb.size; i += 64)
+            seq_printf(file," %*pEp", 64,buf+i);
+			// pr_debug("  %*pEhp\n", 64, buf + i);
+        // seq_printf(file," %*pEp\n",buf);
+        kfree(buf);
+
+        uint32_t	write = __raw_readl(&hw->panic->rb.write);
+        __raw_writel(write, &hw->panic->rb.read);
+
+        return 0;
+    }
+    else
+    {
+        pr_debug("Fail to alloc buf\n");
+        return -1;
+    }
+    return 0;
+}
+
+static int log_proc_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, log_proc_show, NULL);
+}
+
+static const struct file_operations log_proc_fops = {
+        .open      = log_proc_open,
+        .read      = seq_read,
+        .llseek    = seq_lseek,
+        .release   = single_release,
+};
+
+int xrp_hw_create_log_proc(struct xrp_hw_simple *hw)
+{
+    int rv = 0;
+    char file_name[32];
+    sprintf(file_name,"dsp%d_proc",hw->device_id);
+    // hw->log_proc_file = create_proc_entry(file_name,0644,NULL);
+    hw->log_proc_file = proc_mkdir(file_name, NULL);
+    if (NULL == hw->log_proc_file )
+    {
+        pr_debug("Error: Could not create dir\n");
+        return -ENODEV;
+    }
+
+    // hw->log_proc_file = proc_create_data(file_name,0644,S_IFREG | S_IRUGO,&log_proc_fops,hw);
+    hw->log_proc_file=proc_create_single_data("dsp_log",0644,hw->log_proc_file,&log_proc_show,hw);
+
+    if(hw->log_proc_file == NULL) {
+        rv = -ENOMEM;
+        pr_debug("Error: Could not initialize %s\n","dsp_log");
+    } else {
+
+        pr_debug("%s create Success!\n","dsp_log");
+    }   
+    return rv; 
+}
+
+void xrp_hw_remove_log_proc(void *hw_arg)
+{
+    char file_name[32];
+    struct xrp_hw_simple *hw = hw_arg;
+    sprintf(file_name,"dsp%d_proc",hw->device_id);
+    remove_proc_entry(file_name,NULL);
+    // proc_remove(hw->log_proc_file);
+    pr_debug("%s,proc removed\n",file_name);
+}
+
+// int xrp_hw_log_read(char *buffer,char** buffer_location,off_t offset,
+//                 int buffer_length,int *eof,void *data)
+// {
+//     int len = 0;
+//     struct xrp_hw_simple *hw = data;
+
+//     if(offset > 0) {
+//         printk(KERN_INFO "offset %d: /proc/test1: profile_read,\
+//             wrote %d Bytes\n",(int)(offset),len);
+//         *eof = 1;
+//         return len;
+//     }
+//     //填充buffer并获取其长度
+//     len = sprintf(buffer,
+//              "For the %d %s time,go away!\n",count,
+//               (count % 100 > 10 && count % 100 < 14)?"th":
+//               (count % 10 == 1)?"st":
+//               (count % 10 == 2)?"nd":
+//               (count % 10 == 3)?"rd":"th");
+//     count++;
+//     printk(KERN_INFO "leasving /proc/test1: profile_read,wrote %d Bytes\n",len);
+//     return len;
+// }
+
+static void *get_hw_sync_data(void *hw_arg, size_t *sz)
+{
+	static const u32 irq_mode[] = {
+		[XRP_IRQ_NONE] = XRP_DSP_SYNC_IRQ_MODE_NONE,
+		[XRP_IRQ_LEVEL] = XRP_DSP_SYNC_IRQ_MODE_LEVEL,
+		[XRP_IRQ_EDGE] = XRP_DSP_SYNC_IRQ_MODE_EDGE,
+		[XRP_IRQ_EDGE_SW] = XRP_DSP_SYNC_IRQ_MODE_EDGE,
+	};
+	struct xrp_hw_simple *hw = hw_arg;
+	struct xrp_hw_simple_sync_data *hw_sync_data =
+		kmalloc(sizeof(*hw_sync_data), GFP_KERNEL);
+
+	if (!hw_sync_data)
+		return NULL;
+	u32 device_host_offset=0;
+	u32 host_device_offset=0;
+	if(hw->device_irq_regs_phys > hw->host_irq_regs_phys)
+	{
+		device_host_offset = hw->device_irq_regs_phys-hw->host_irq_regs_phys;
+	}
+	else
+	{
+		host_device_offset = hw->host_irq_regs_phys-hw->device_irq_regs_phys;
+	}
+	*hw_sync_data = (struct xrp_hw_simple_sync_data){
+		.device_mmio_base = hw->irq_regs_dev_phys,
+		.host_irq_mode = hw->host_irq_mode,
+		.host_irq_offset = hw->host_irq_offset+host_device_offset,
+		.host_irq_bit = hw->host_irq[1],
+		.device_irq_mode = irq_mode[hw->device_irq_mode],
+		.device_irq_offset = hw->device_irq[0]+device_host_offset,
+		.device_irq_bit = hw->device_irq[1],
+		.device_irq = hw->device_irq[2],
+        // .panic_base = hw->panic_phys,
+	};
+	*sz = sizeof(*hw_sync_data);
+	return hw_sync_data;
+}
+ 
+static void reset(void *hw_arg)
+{
+	// dev_reg_write32(hw_arg, XRP_REG_RESET, (dev_reg_read32(hw_arg, XRP_REG_RESET))^RESET_BIT_MASK);
+	// udelay(10000);
+	// dev_reg_write32(hw_arg, XRP_REG_RESET, (dev_reg_read32(hw_arg, XRP_REG_RESET))^RESET_BIT_MASK);
+	struct xrp_hw_simple *hw = hw_arg;
+	xrp_set_reset_reg(hw->device_id);
+}
+
+static void halt(void *hw_arg)
+{
+	dev_reg_write32(hw_arg, XRP_REG_RUNSTALL, 1);
+
+	pr_debug("%s: halt value:%x\n",__func__,dev_reg_read32(hw_arg, XRP_REG_RUNSTALL));
+	// dump_log_page(hw_arg);
+}
+
+static void set_reset_vector(void *hw_arg,u32 addr)
+{
+	struct xrp_hw_simple *hw = hw_arg;
+	// if(hw->device_id ==0)
+	// {
+	// 	addr = 0x80000000;
+	// }
+	// else{
+	// 	addr = 0x70000000;
+	// }
+	addr = addr&0xffffff00;
+	dev_reg_write32(hw_arg, ALT_RESET_VEC, addr);
+	pr_debug("%s: reset_vector:%x\n",__func__,dev_reg_read32(hw_arg, ALT_RESET_VEC));
+}
+static void release(void *hw_arg)
+{
+	dev_reg_write32(hw_arg, XRP_REG_RUNSTALL, 0);
+}
+
+static void send_irq(void *hw_arg)
+{
+	struct xrp_hw_simple *hw = hw_arg;
+	pr_debug("%s: Enter\n",__func__);
+	switch (hw->device_irq_mode) {
+	case XRP_IRQ_EDGE_SW:
+		device_irq_reg_write32(hw, hw->device_irq_host_offset,
+			    BIT(hw->device_irq[1]));
+		while ((device_irq_reg_read32(hw, hw->device_irq_host_offset) &
+			BIT(hw->device_irq[1])))
+			mb();
+		break;
+	case XRP_IRQ_EDGE:
+		device_irq_reg_write32(hw, hw->device_irq_host_offset, 0);
+		/* fallthrough */
+	case XRP_IRQ_LEVEL:
+		wmb();
+		device_irq_reg_write32(hw, hw->device_irq_host_offset,
+			    BIT(hw->device_irq[1]));
+
+		break;
+	default:
+		break;
+	}
+}
+static int enable(void *hw_arg)
+{
+	struct xrp_hw_simple *hw = hw_arg;
+    int ret;
+    ret = clk_prepare_enable(hw->cclk);
+	if (ret < 0) {
+		pr_err("could not prepare or enable core clock\n");
+		return ret;
+	}
+
+	// ret = clk_prepare_enable(hw->aclk);
+	// if (ret < 0) {
+	// 	pr_err("could not prepare or enable axi clock\n");
+	// 	clk_disable_unprepare(hw->cclk);
+	// 	return ret;
+	// }
+
+	ret = clk_prepare_enable(hw->pclk);
+	if (ret < 0) {
+		pr_err("could not prepare or enable apb clock\n");
+		clk_disable_unprepare(hw->cclk);
+		// clk_disable_unprepare(hw->aclk);
+		return ret;
+	}
+    pr_debug("%s: enable dsp\n",__func__);
+    return ret;
+}
+
+static void disable(void *hw_arg)
+{
+	struct xrp_hw_simple *hw = hw_arg;
+ 	clk_disable_unprepare(hw->pclk);
+	// clk_disable_unprepare(hw->aclk);
+	clk_disable_unprepare(hw->cclk);
+    pr_debug("%s: disable dsp\n",__func__);
+    return;
+}
+static inline void ack_irq(void *hw_arg)
+{
+	struct xrp_hw_simple *hw = hw_arg;
+
+	if (hw->host_irq_mode == XRP_IRQ_LEVEL)
+		host_irq_reg_write32(hw, hw->host_irq[0], BIT(hw->host_irq[1]));
+		//__raw_writel(DSP_INT_MASK,0xFFE4040190);  //DSP0
+}
+static inline bool is_expect_irq(struct xrp_hw_simple *hw)
+{
+		return host_irq_reg_read32(hw,hw->host_irq_offset)&BIT(hw->host_irq[1]);
+}
+static irqreturn_t irq_handler(int irq, void *dev_id)
+{
+	irqreturn_t ret=IRQ_NONE;
+	struct xrp_hw_simple *hw = dev_id;
+
+	if(is_expect_irq(hw))
+	{
+		ret = xrp_irq_handler(irq, hw->xrp);
+
+		if (ret == IRQ_HANDLED)
+			ack_irq(hw);
+
+	}
+	else{
+		pr_err("%s: unexpect irq,%x\n",__func__,host_irq_reg_read32(hw,hw->host_irq_offset));
+	}
+	
+
+	return ret;
+}
+
+phys_addr_t get_irq_base_mimo(void *hw_arg)
+{
+	struct xrp_hw_simple *hw = hw_arg;
+	pr_debug("%s: dev_regs\n",__func__);
+	return hw->device_irq_regs_phys < hw->host_irq_regs_phys?hw->device_irq_regs_phys:hw->host_irq_regs_phys;
+}
+
+void  update_device_base(void *hw_arg,phys_addr_t addr)
+{
+	struct xrp_hw_simple *hw = hw_arg;
+	 hw->irq_regs_dev_phys = addr;
+	 pr_debug("%s:dev_regs,%p\n",__func__,hw->irq_regs_dev_phys);
+}
+void memcpy_tohw(volatile void __iomem *dst, const void *src, size_t sz)
+{
+	
+	int i;
+	u32 *s_ptr = src;
+	volatile u32 * d_ptr=dst;
+    pr_debug("%s,dst:0x%llx,src:0x%llx,size:%d",__FUNCTION__,dst,src,sz);
+    udelay(10000);
+	for(i=0;i<sz/4;i++)
+	{
+		__raw_writel(s_ptr[i], d_ptr++);
+
+	}
+}
+
+void memcpy_toio_local(volatile void __iomem *to, const void *from, size_t count)
+{
+	while (count && !IS_ALIGNED((unsigned long)to, 8)) {
+		__raw_writeb(*(u8 *)from, to);
+		from++;
+		to++;
+		count--;
+	}
+
+	while (count >= 8) {
+		__raw_writeq(*(u64 *)from, to);
+		from += 8;
+		to += 8;
+		count -= 8;
+	}
+
+	while (count) {
+		__raw_writeb(*(u8 *)from, to);
+		from++;
+		to++;
+		count--;
+	}
+}
+
+void memset_hw_local(volatile void __iomem *dst, int c, size_t count)
+{
+	u64 qc = (u8)c;
+
+	qc |= qc << 8;
+	qc |= qc << 16;
+	qc |= qc << 32;
+	while (count && !IS_ALIGNED((unsigned long)dst, 8)) {
+		__raw_writeb(c, dst);
+		dst++;
+		count--;
+	}
+
+	while (count >= 8) {
+		__raw_writeq(qc, dst);
+		dst += 8;
+		count -= 8;
+	}
+
+	while (count) {
+		__raw_writeb(c, dst);
+		dst++;
+		count--;
+	}
+}
+void memset_hw(void __iomem *dst, int c, size_t sz)
+{
+   	int i;
+	volatile u32 * d_ptr=dst;
+	for(i=0;i<sz/4;i++)
+	{
+		__raw_writel(c, d_ptr++);
+
+	}
+}
+
+#if defined(__XTENSA__)
+static bool cacheable(void *hw_arg, unsigned long pfn, unsigned long n_pages)
+{
+	return true;
+}
+
+static void dma_sync_for_device(void *hw_arg,
+				void *vaddr, phys_addr_t paddr,
+				unsigned long sz, unsigned flags)
+{
+	switch (flags) {
+	case XRP_FLAG_READ:
+		__flush_dcache_range((unsigned long)vaddr, sz);
+		break;
+
+	case XRP_FLAG_READ_WRITE:
+		__flush_dcache_range((unsigned long)vaddr, sz);
+		__invalidate_dcache_range((unsigned long)vaddr, sz);
+		break;
+
+	case XRP_FLAG_WRITE:
+		__invalidate_dcache_range((unsigned long)vaddr, sz);
+		break;
+	}
+}
+
+static void dma_sync_for_cpu(void *hw_arg,
+			     void *vaddr, phys_addr_t paddr,
+			     unsigned long sz, unsigned flags)
+{
+	switch (flags) {
+	case XRP_FLAG_READ_WRITE:
+	case XRP_FLAG_WRITE:
+		__invalidate_dcache_range((unsigned long)vaddr, sz);
+		break;
+	}
+}
+
+#elif defined(__arm__)
+static bool cacheable(void *hw_arg, unsigned long pfn, unsigned long n_pages)
+{
+	return true;
+}
+
+static void dma_sync_for_device(void *hw_arg,
+				void *vaddr, phys_addr_t paddr,
+				unsigned long sz, unsigned flags)
+{
+	switch (flags) {
+	case XRP_FLAG_READ:
+		__cpuc_flush_dcache_area(vaddr, sz);
+		outer_clean_range(paddr, paddr + sz);
+		break;
+
+	case XRP_FLAG_WRITE:
+		__cpuc_flush_dcache_area(vaddr, sz);
+		outer_inv_range(paddr, paddr + sz);
+		break;
+
+	case XRP_FLAG_READ_WRITE:
+		__cpuc_flush_dcache_area(vaddr, sz);
+		outer_flush_range(paddr, paddr + sz);
+		break;
+	}
+}
+
+static void dma_sync_for_cpu(void *hw_arg,
+			     void *vaddr, phys_addr_t paddr,
+			     unsigned long sz, unsigned flags)
+{
+	switch (flags) {
+	case XRP_FLAG_WRITE:
+	case XRP_FLAG_READ_WRITE:
+		__cpuc_flush_dcache_area(vaddr, sz);
+		outer_inv_range(paddr, paddr + sz);
+		break;
+	}
+}
+#else
+static bool cacheable(void *hw_arg, unsigned long pfn, unsigned long n_pages)
+{
+	return true;
+}
+
+// static void dma_sync_for_device(void *hw_arg,
+// 				void *vaddr, phys_addr_t paddr,
+// 				unsigned long sz, unsigned flags)
+// {
+// 	struct xrp_hw_simple *hw = hw_arg;
+// 	switch (flags) {
+// 	case XRP_FLAG_READ:
+// 	case XRP_FLAG_WRITE:
+// 	case XRP_FLAG_READ_WRITE:
+// 		arch_sync_dma_for_cpu(hw->xrp->dev, paddr, sz,DMA_TO_DEVICE);
+// 		break;
+// 	}
+// }
+
+// static void dma_sync_for_cpu(void *hw_arg,
+// 			     void *vaddr, phys_addr_t paddr,
+// 			     unsigned long sz, unsigned flags)
+// {
+// 	struct xrp_hw_simple *hw = hw_arg;
+// 	switch (flags) {
+// 	case XRP_FLAG_WRITE:
+// 	case XRP_FLAG_READ_WRITE:
+// 		arch_sync_dma_for_cpu(hw->xrp->dev, paddr, sz,DMA_FROM_DEVICE);
+// 		break;
+// }
+// }
+#endif
+
+static bool panic_check(void *hw_arg)
+{
+	struct xrp_hw_simple *hw = hw_arg;
+	uint32_t panic;
+	uint32_t ccount;
+	uint32_t read;
+	uint32_t write;
+	uint32_t size;
+
+	if (!hw->panic)
+		return false;
+
+	panic = __raw_readl(&hw->panic->panic);
+	ccount = __raw_readl(&hw->panic->ccount);
+	read = __raw_readl(&hw->panic->rb.read);
+	write = __raw_readl(&hw->panic->rb.write);
+	size = __raw_readl(&hw->panic->rb.size);
+
+	if (read == 0 && read != hw->last_read) {
+		pr_debug( "****************** device restarted >>>>>>>>>>>>>>>>>\n");
+		dump_log_page(hw);
+		pr_debug ("<<<<<<<<<<<<<<<<<< device restarted *****************\n");
+	}
+	if (write < size && read < size && size < PAGE_SIZE) {
+		uint32_t tail;
+		uint32_t total;
+		char *buf = NULL;
+
+		hw->last_read = read;
+		if (read < write) {
+			tail = write - read;
+			total = tail;
+		} else if (read == write) {
+			tail = 0;
+			total = 0;
+		} else {
+			tail = size - read;
+			total = write + tail;
+		}
+
+		if (total)
+			buf = kmalloc(total, GFP_KERNEL);
+
+		if (buf) {
+			uint32_t off = 0;
+
+			pr_debug("panic = 0x%08x, ccount = 0x%08x read = %d, write = %d, size = %d, total = %d",
+				panic, ccount, read, write, size, total);
+
+			while (off != total) {
+				memcpy_fromio(buf + off,
+					      hw->panic->rb.data + read,
+					      tail);
+				read = 0;
+				off += tail;
+				tail = total - tail;
+			}
+			__raw_writel(write, &hw->panic->rb.read);
+			hw->last_read = write;
+			pr_debug("<<<\n%.*s\n>>>\n",
+				 total, buf);
+			kfree(buf);
+		} else if (total) {
+			pr_debug(
+				"%s: couldn't allocate memory (%d) to read the dump\n",
+				__func__, total);
+		}
+	} else {
+		if (read != hw->last_read) {
+			pr_debug(
+				 "nonsense in the log buffer: read = %d, write = %d, size = %d\n",
+				 read, write, size);
+			hw->last_read = read;
+		}
+	}
+	if (panic == 0xdeadbabe) {
+		pr_debug("%s: panic detected, log dump:\n", __func__);
+		dump_log_page(hw);
+	}
+
+	return panic == 0xdeadbabe;
+}
+
+
+static bool xrp_panic_init(struct xrp_hw_panic* panic,size_t size)
+{
+	if(size < sizeof(struct xrp_hw_panic))
+    {
+        return false;
+    }
+    memset_hw(panic,0x0,size);
+    panic->panic = 0;
+	panic->ccount = 0;
+	panic->rb.read = 0;
+	panic->rb.write = 0;
+	panic->rb.size = size - sizeof(struct xrp_hw_panic);
+    sprintf(panic->rb.data,"Inition dsp log\n");
+    return true;
+}
+static const struct xrp_hw_ops hw_ops = {
+	.halt = halt,
+	.release = release,
+	.reset = reset,
+    .enable = enable,
+    .disable = disable,
+	.get_hw_sync_data = get_hw_sync_data,
+
+	.send_irq = send_irq,
+    .get_base_mimo = get_irq_base_mimo,
+	.update_device_base = update_device_base,
+	.set_reset_vector = set_reset_vector,
+	.memcpy_tohw= memcpy_toio_local,
+	.memset_hw = memset_hw_local,
+    .clear_hw = xrp_hw_remove_log_proc,
+#if defined(__XTENSA__) || defined(__arm__)
+	.cacheable = cacheable,
+	.dma_sync_for_device = dma_sync_for_device,
+	.dma_sync_for_cpu = dma_sync_for_cpu,
+#endif
+};
+
+static long init_hw_irq(struct platform_device *pdev, struct xrp_hw_simple *hw,
+		    int mem_idx, enum xrp_init_flags *init_flags)
+{
+	struct resource *mem;
+	int irq;
+	long ret;
+
+	mem = platform_get_resource(pdev, IORESOURCE_MEM, mem_idx++);
+	if (!mem) {
+		ret = -ENODEV;
+		goto err;
+	}
+	hw->host_irq_regs_phys = mem->start;
+	// hw->irq_regs_dev_phys =hw->irq_regs_phys;
+	hw->host_irq_regs = devm_ioremap_resource(&pdev->dev, mem);
+	pr_debug("%s:host irq regs = %pap/%p\n",
+		 __func__, &mem->start, hw->host_irq_regs);
+
+
+	ret = of_property_read_u32_array(pdev->dev.of_node, "host-irq",
+					 hw->host_irq,
+					 ARRAY_SIZE(hw->host_irq));
+	if (ret == 0) {
+		u32 host_irq_mode;
+
+		ret = of_property_read_u32(pdev->dev.of_node,
+					   "host-irq-mode",
+					   &host_irq_mode);
+		if (host_irq_mode < XRP_IRQ_MAX)
+			hw->host_irq_mode =host_irq_mode;
+		else
+			ret = -ENOENT;
+		u32 host_irq_offset;
+		ret = of_property_read_u32(pdev->dev.of_node,
+				"host-irq-offset",
+				&host_irq_offset);
+
+		if(ret == 0)
+		{
+			hw->host_irq_offset=host_irq_offset;
+		}
+
+		dev_dbg(&pdev->dev,
+			"%s: Host IRQ MMIO: device offset = 0x%08x,host offset = 0x%08x, bit = %d,IRQ mode = %d",
+			__func__, hw->host_irq_offset,
+			hw->host_irq[0], hw->host_irq[1],
+			hw->host_irq_mode);
+		
+	}
+	
+	mem = platform_get_resource(pdev, IORESOURCE_MEM, mem_idx);
+	if (!mem) {
+		ret = -ENODEV;
+		goto err;
+	}
+	hw->device_irq_regs_phys = mem->start;
+	// hw->irq_regs_dev_phys =hw->irq_regs_phys;
+	hw->device_irq_regs = devm_ioremap_resource(&pdev->dev, mem);
+	pr_debug("%s:Device irq regs = %pap/%lx\n",
+		 __func__, &mem->start, hw->device_irq_regs_phys);
+
+	ret = of_property_read_u32_array(pdev->dev.of_node,
+					 "device-irq",
+					 hw->device_irq,
+					 ARRAY_SIZE(hw->device_irq));
+	if (ret == 0) {
+		u32 device_irq_host_offset;
+
+		ret = of_property_read_u32(pdev->dev.of_node,
+					   "device-irq-host-offset",
+					   &device_irq_host_offset);
+		if (ret == 0) {
+			hw->device_irq_host_offset = device_irq_host_offset;
+		} else {
+			hw->device_irq_host_offset = hw->device_irq[0];
+			ret = 0;
+		}
+	}
+	if (ret == 0) {
+		u32 device_irq_mode;
+
+		ret = of_property_read_u32(pdev->dev.of_node,
+					   "device-irq-mode",
+					   &device_irq_mode);
+		if (device_irq_mode < XRP_IRQ_MAX)
+			hw->device_irq_mode = device_irq_mode;
+		else
+			ret = -ENOENT;
+	}
+	if (ret == 0) {
+		dev_dbg(&pdev->dev,
+			"%s: device IRQ MMIO host offset = 0x%08x, offset = 0x%08x, bit = %d, device IRQ = %d, IRQ mode = %d",
+			__func__, hw->device_irq_host_offset,
+			hw->device_irq[0], hw->device_irq[1],
+			hw->device_irq[2], hw->device_irq_mode);
+	} else {
+		dev_info(&pdev->dev,
+			 "using polling mode on the device side\n");
+	}
+
+
+	if (ret == 0 && hw->host_irq_mode != XRP_IRQ_NONE)
+		irq = platform_get_irq(pdev, 0);
+	else
+		irq = -1;
+
+	if (irq >= 0) {
+		dev_dbg(&pdev->dev, "%s: host IRQ = %d, ",
+			__func__, irq);
+		ret = devm_request_irq(&pdev->dev, irq, irq_handler,
+				       IRQF_SHARED, pdev->name, hw);
+		if (ret < 0) {
+			dev_err(&pdev->dev, "request_irq %d failed\n", irq);
+			goto err;
+		}
+		*init_flags |= XRP_INIT_USE_HOST_IRQ;
+	} else {
+		dev_info(&pdev->dev, "using polling mode on the host side\n");
+	}
+
+	ret = 0;
+err:
+	return ret;
+}
+
+static long init_hw_device(struct platform_device *pdev, struct xrp_hw_simple *hw,int mem_idx)
+{
+	struct resource *mem;
+
+	long ret;
+
+	mem = platform_get_resource(pdev, IORESOURCE_MEM, mem_idx++);
+	if (!mem) {
+		ret = -ENODEV;
+		goto err;
+	}
+	hw->dev_regs_phys = mem->start;
+	hw->dev_regs = devm_ioremap_resource(&pdev->dev, mem);
+	pr_debug("%s: regs = %pap/%p\n",
+		 __func__, &mem->start, hw->dev_regs);
+
+
+
+    hw->cclk = devm_clk_get(&pdev->dev, "cclk");
+    if (hw->cclk==NULL) {
+        dev_err(&pdev->dev, "failed to get core clock\n");
+        ret = -ENOENT;
+        goto err;
+    }
+    dev_dbg(&pdev->dev, "get core clock\n");
+    // hw->aclk = devm_clk_get(&pdev->dev, "aclk");
+    // if (hw->aclk==NULL) {
+    //     dev_err(&pdev->dev, "failed to get axi clock\n");
+    //     ret = -ENOENT;
+    //     goto err;
+    // }
+
+    hw->pclk  = devm_clk_get(&pdev->dev, "pclk");
+    if ( hw->pclk ==NULL) {
+        dev_err(&pdev->dev, "failed to get apb clock\n");
+        ret = -ENOENT;
+        goto err;
+    }
+    dev_dbg(&pdev->dev, "get apb clock\n");
+	u32 device_id;
+
+	ret = of_property_read_u32(pdev->dev.of_node,"dsp",&device_id);
+	if(ret ==0 )
+	{
+		hw->device_id = device_id;
+		pr_debug("%s: device_id = %d\n",
+		 			__func__,hw->device_id);
+	}
+	else{
+		pr_debug("%s: no device_id \n",__func__);
+        ret = -ENODEV;
+	}
+    // xrp_hw_create_log_proc(hw);
+
+err:
+	return ret;
+}
+static long init(struct platform_device *pdev, struct xrp_hw_simple *hw)
+{
+	long ret;
+	enum xrp_init_flags init_flags = 0;
+
+	ret = init_hw_irq(pdev, hw, 0, &init_flags);
+	if (ret < 0)
+		return ret;
+	ret =init_hw_device(pdev, hw, 2);
+	if (ret < 0)
+		return ret;
+	return xrp_init(pdev, init_flags, &hw_ops, hw,4);
+}
+
+static long init_v1(struct platform_device *pdev, struct xrp_hw_simple *hw)
+{
+	long ret;
+	enum xrp_init_flags init_flags = 0;
+
+	ret = init_hw_irq(pdev, hw, 0, &init_flags);
+	if (ret < 0)
+		return ret;
+	ret =init_hw_device(pdev, hw, 1);
+	if (ret < 0)
+		return ret;
+	return xrp_init_v1(pdev, init_flags, &hw_ops, hw,2);
+}
+
+static long init_cma(struct platform_device *pdev, struct xrp_hw_simple *hw)
+{
+	long ret;
+	enum xrp_init_flags init_flags = 0;
+
+	ret = init_hw_irq(pdev, hw, 0, &init_flags);
+	if (ret < 0)
+		return ret;
+	ret =init_hw_device(pdev, hw, 1);
+	if (ret < 0)
+		return ret;
+	return xrp_init_cma(pdev, init_flags, &hw_ops, hw,2);
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id xrp_hw_simple_match[] = {
+	{
+		.compatible = "cdns,xrp-hw-simple",
+		.data = init,
+	}, {
+		.compatible = "cdns,xrp-hw-simple,v1",
+		.data = init_v1,
+	}, {
+		.compatible = "cdns,xrp-hw-simple,cma",
+		.data = init_cma,
+	}, {},
+};
+// MODULE_DEVICE_TABLE(of, xrp_hw_simple_match);
+#endif
+
+static int xrp_hw_simple_probe(struct platform_device *pdev)
+{
+	struct xrp_hw_simple *hw =
+		devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
+	const struct of_device_id *match;
+	long (*init)(struct platform_device *pdev, struct xrp_hw_simple *hw);
+	long ret;
+
+	if (!hw)
+		return -ENOMEM;
+
+	match = of_match_device(of_match_ptr(xrp_hw_simple_match),
+				&pdev->dev);
+	if (!match)
+		return -ENODEV;
+
+	init = match->data;
+	ret = init(pdev, hw);
+	if (IS_ERR_VALUE(ret)) {
+		//xrp_deinit(pdev);
+		pr_debug("init fail\n");
+		return ret;
+	} else {
+		hw->xrp = ERR_PTR(ret);
+		return 0;
+	}
+
+}
+
+
+static int xrp_hw_simple_remove(struct platform_device *pdev)
+{
+	// xrp_hw_remove_log_proc();
+    return xrp_deinit(pdev);
+}
+
+static const struct dev_pm_ops xrp_hw_simple_pm_ops = {
+	SET_RUNTIME_PM_OPS(xrp_runtime_suspend,
+			   xrp_runtime_resume, NULL)
+};
+
+static struct platform_driver xrp_hw_simple_driver = {
+	.probe   = xrp_hw_simple_probe,
+	.remove  = xrp_hw_simple_remove,
+	.driver  = {
+		.name = DRIVER_NAME,
+		.of_match_table = of_match_ptr(xrp_hw_simple_match),
+		.pm = &xrp_hw_simple_pm_ops,
+	},
+};
+
+module_platform_driver(xrp_hw_simple_driver);
+
+MODULE_AUTHOR("Max Filippov");
+MODULE_DESCRIPTION("XRP: low level device driver for Xtensa Remote Processing");
+MODULE_LICENSE("Dual MIT/GPL");

+ 66 - 0
driver/xrp-kernel/xrp_hw_simple_dsp_interface.h

@@ -0,0 +1,66 @@
+/*
+ * @Author: your name
+ * @Date: 2022-03-25 12:36:07
+ * @LastEditTime: 2022-03-25 12:36:08
+ * @LastEditors: your name
+ * @Description: 打开koroFileHeader查看配置 进行设置: https://github.com/OBKoro1/koro1FileHeader/wiki/%E9%85%8D%E7%BD%AE
+ * @FilePath: /workspace/thead-build/light-fm/tmp-glibc/work/riscv64-oe-linux/xtensa-dsp/1.0-r0/git/driver/xrp-kernel/xrp_hw_simple_dsp_interface.h
+ */
+/*
+ * XRP interface between hardware-specific linux and DSP parts of example
+ * hardware
+ *
+ * Copyright (c) 2017 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#ifndef _XRP_KERNEL_SIMPLE_HW_DSP_INTERFACE
+#define _XRP_KERNEL_SIMPLE_HW_DSP_INTERFACE
+
+#include "xrp_ring_buffer.h"
+enum {
+	XRP_DSP_SYNC_IRQ_MODE_NONE = 0x0,
+	XRP_DSP_SYNC_IRQ_MODE_LEVEL = 0x1,
+	XRP_DSP_SYNC_IRQ_MODE_EDGE = 0x2,
+};
+
+struct xrp_hw_simple_sync_data {
+	__u32 device_mmio_base;
+	__u32 host_irq_mode;
+	__u32 host_irq_offset;
+	__u32 host_irq_bit;
+	__u32 device_irq_mode;
+	__u32 device_irq_offset;
+	__u32 device_irq_bit;
+	__u32 device_irq;
+};
+
+
+struct xrp_hw_panic {
+	__u32 panic;
+	__u32 ccount;
+	__u32 reserved[2];
+	struct xrp_ring_buffer rb;
+};
+#endif

+ 92 - 0
driver/xrp-kernel/xrp_internal.h

@@ -0,0 +1,92 @@
+/*
+ * Internal XRP structures definition.
+ *
+ * Copyright (c) 2015 - 2017 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#ifndef XRP_INTERNAL_H
+#define XRP_INTERNAL_H
+
+#include <linux/completion.h>
+#include <linux/proc_fs.h>
+#include <linux/miscdevice.h>
+#include <linux/mutex.h>
+#include <linux/types.h>
+#include "xrp_address_map.h"
+#include "xrp_kernel_report.h"
+struct device;
+struct firmware;
+struct xrp_hw_ops;
+struct xrp_allocation_pool;
+struct xrp_dma_buf_list;
+struct xrp_panic_log ;
+struct xrp_comm {
+	struct mutex lock;
+	void __iomem *comm;
+	struct completion completion;
+	u32 priority;
+};
+
+struct xvp {
+	struct device *dev;
+	const char *firmware_name;
+	const struct firmware *firmware;
+	struct miscdevice miscdev;
+	const struct xrp_hw_ops *hw_ops;
+	void *hw_arg;
+	unsigned n_queues;
+
+	u32 *queue_priority;
+	struct xrp_comm *queue;
+	struct xrp_comm **queue_ordered;
+	void __iomem *comm;
+	phys_addr_t pmem;
+	phys_addr_t comm_phys;
+	phys_addr_t shared_size;
+	atomic_t reboot_cycle;
+	atomic_t reboot_cycle_complete;
+
+	struct xrp_address_map address_map;
+
+	bool host_irq_mode;
+
+	struct xrp_allocation_pool *pool;
+	bool off;
+	int nodeid;
+	 
+	struct xrp_reporter *reporter;
+    
+    struct list_head  dma_buf_list;
+
+     struct proc_dir_entry *proc_dir;
+
+    void __iomem *panic;
+    phys_addr_t   panic_phy;
+    phys_addr_t  panic_size;
+    struct xrp_panic_log *panic_log;
+    // struct xrp_dsp_debug_info debug_info;
+};
+
+#endif

+ 107 - 0
driver/xrp-kernel/xrp_kernel_defs.h

@@ -0,0 +1,107 @@
+/*
+ * XRP driver IOCTL codes and data structures
+ *
+ * Copyright (c) 2015 - 2017 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#ifndef _XRP_KERNEL_DEFS_H
+#define _XRP_KERNEL_DEFS_H
+
+#define XRP_IOCTL_MAGIC 'r'
+#define XRP_IOCTL_ALLOC		_IO(XRP_IOCTL_MAGIC, 1)
+#define XRP_IOCTL_FREE		_IO(XRP_IOCTL_MAGIC, 2)
+#define XRP_IOCTL_QUEUE		_IO(XRP_IOCTL_MAGIC, 3)
+#define XRP_IOCTL_QUEUE_NS	_IO(XRP_IOCTL_MAGIC, 4)
+
+#define XRP_IOCTL_REPORT_CREATE	_IO(XRP_IOCTL_MAGIC, 5)
+
+#define XRP_IOCTL_REPORT_RELEASE	_IO(XRP_IOCTL_MAGIC, 6)
+
+#define XRP_IOCTL_DMABUF_IMPORT	   _IO(XRP_IOCTL_MAGIC, 7)
+
+#define XRP_IOCTL_DMABUF_EXPORT	   _IO(XRP_IOCTL_MAGIC, 8)
+#define XRP_IOCTL_DMABUF_RELEASE   _IO(XRP_IOCTL_MAGIC, 9)
+
+#define XRP_IOCTL_DMABUF_SYNC  _IO(XRP_IOCTL_MAGIC, 10)
+struct xrp_ioctl_alloc {
+	__u32 size;
+	__u32 align;
+	__u64 addr;
+    __u64 paddr;
+};
+
+enum {
+	XRP_FLAG_READ = 0x1,
+	XRP_FLAG_WRITE = 0x2,
+	XRP_FLAG_READ_WRITE = 0x3,
+};
+
+struct xrp_ioctl_buffer {
+	__u32 flags;
+	__u32 size;
+	__u64 addr;
+};
+
+enum {
+	XRP_QUEUE_FLAG_NSID = 0x4,
+	XRP_QUEUE_FLAG_PRIO = 0xff00,
+	XRP_QUEUE_FLAG_PRIO_SHIFT = 8,
+
+	XRP_QUEUE_VALID_FLAGS =
+		XRP_QUEUE_FLAG_NSID |
+		XRP_QUEUE_FLAG_PRIO,
+};
+
+struct xrp_ioctl_queue {
+	__u32 flags;
+	__u32 in_data_size;
+	__u32 out_data_size;
+	__u32 buffer_size;
+	__u64 in_data_addr;
+	__u64 out_data_addr;
+	__u64 buffer_addr;
+	__u64 nsid_addr;
+};
+
+struct xrp_report_buffer
+{
+	__u32 report_id;
+	__u32 data[1];
+};
+
+
+struct xrp_dma_buf{
+    int fd;
+  	__u32 flags;
+	__u32 size;
+	__u64 addr;
+    __u64 paddr;
+} ;
+// struct xrp_ioctl_report {
+	
+// 	__u32 size;
+// 	struct xrp_report_buffer  *addr;
+// };
+#endif

+ 150 - 0
driver/xrp-kernel/xrp_kernel_dsp_interface.h

@@ -0,0 +1,150 @@
+/*
+ * Data structures and constants for generic XRP interface between
+ * linux and DSP
+ *
+ * Copyright (c) 2015 - 2019 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#ifndef _XRP_KERNEL_DSP_INTERFACE_H
+#define _XRP_KERNEL_DSP_INTERFACE_H
+
+#ifndef XRP_DSP_COMM_BASE_MAGIC
+#define XRP_DSP_COMM_BASE_MAGIC		0x20161006
+#endif
+
+enum {
+	XRP_DSP_SYNC_IDLE = 0,
+	XRP_DSP_SYNC_HOST_TO_DSP = 0x1,
+	XRP_DSP_SYNC_DSP_TO_HOST = 0x3,
+	XRP_DSP_SYNC_START = 0x101,
+	XRP_DSP_SYNC_DSP_READY_V1 = 0x203,
+	XRP_DSP_SYNC_DSP_READY_V2 = 0x303,
+};
+
+enum {
+	XRP_DSP_SYNC_TYPE_ACCEPT = 0x80000000,
+	XRP_DSP_SYNC_TYPE_MASK = 0x00ffffff,
+	XRP_DSP_SYNC_TYPE_LAST = 0,
+	XRP_DSP_SYNC_TYPE_HW_SPEC_DATA = 1,
+	XRP_DSP_SYNC_TYPE_HW_QUEUES = 2,
+    XRP_DSP_SYNC_TYPE_HW_DEBUG_INFO =3,
+};
+
+struct xrp_dsp_tlv {
+	__u32 type;
+	__u32 length;
+	__u32 value[0];
+};
+
+struct xrp_dsp_sync_v1 {
+	__u32 sync;
+	__u32 hw_sync_data[0];
+};
+
+struct xrp_dsp_sync_v2 {
+	__u32 sync;
+	__u32 reserved[3];
+	struct xrp_dsp_tlv hw_sync_data[0];
+};
+
+enum log_level{
+    FW_DEBUG_LOG_MODE_QUIET,   /* disabel FW log printf */
+    FW_DEBUG_LOG_MODE_ERR,   /* enable FW log printf with error level */
+    FW_DEBUG_LOG_MODE_WRN,   /* enable FW log printf with warning level */
+    FW_DEBUG_LOG_MODE_INF,   /* enable FW log printf with info level*/
+    FW_DEBUG_LOG_MODE_DBG,   /* enable FW log printf with debug level*/
+    FW_DEBUG_LOG_MODE_TRACE,   /* enable FW log printf with trace level*/
+};
+
+struct xrp_dsp_debug_info{
+    __u32 panic_addr;
+    __u32 log_level;
+    __u32 profile_addr;
+};
+enum {
+	XRP_DSP_BUFFER_FLAG_READ = 0x1,
+	XRP_DSP_BUFFER_FLAG_WRITE = 0x2,
+};
+
+struct xrp_dsp_buffer {
+	/*
+	 * When submitted to DSP: types of access allowed
+	 * When returned to host: actual access performed
+	 */
+	__u32 flags;
+	__u32 size;
+	__u32 addr;
+};
+
+enum {
+	XRP_DSP_CMD_FLAG_REQUEST_VALID = 0x00000001,
+	XRP_DSP_CMD_FLAG_RESPONSE_VALID = 0x00000002,
+	XRP_DSP_CMD_FLAG_REQUEST_NSID = 0x00000004,
+	XRP_DSP_CMD_FLAG_RESPONSE_DELIVERY_FAIL = 0x00000008,
+};
+
+enum {
+	XRP_DSP_REPORT_INVALID = 0,
+	XRP_DSP_REPORT_WORKING = 0x1,
+	XRP_DSP_REPORT_OVERWIRTE = 0x3,
+};
+#define XRP_DSP_REPORT_TO_HOST_FLAG  (0x10000000)
+#define XRP_DSP_CMD_INLINE_DATA_SIZE 16
+#define XRP_DSP_CMD_INLINE_BUFFER_COUNT 1
+#define XRP_DSP_CMD_NAMESPACE_ID_SIZE 16
+#define XRP_DSP_CMD_STRIDE 128
+
+struct xrp_dsp_cmd {
+	__u32 flags;
+	__u32 in_data_size;
+	__u32 out_data_size;
+	__u32 buffer_size;
+	union {
+		__u32 in_data_addr;
+		__u8 in_data[XRP_DSP_CMD_INLINE_DATA_SIZE];
+	};
+	union {
+		__u32 out_data_addr;
+		__u8 out_data[XRP_DSP_CMD_INLINE_DATA_SIZE];
+	};
+	union {
+		__u32 buffer_addr;
+		struct xrp_dsp_buffer buffer_data[XRP_DSP_CMD_INLINE_BUFFER_COUNT];
+		__u8 buffer_alignment[XRP_DSP_CMD_INLINE_DATA_SIZE];
+	};
+	__u8 nsid[XRP_DSP_CMD_NAMESPACE_ID_SIZE];
+/*************DSP report channel***************************************/
+	__u32 report_id;
+	__u32 report_paylad_size;
+	__u32 report_buffer_size;
+	__u32 report_status;
+	union {
+		__u32 report_addr;
+		__u8  report_data[XRP_DSP_CMD_INLINE_DATA_SIZE];
+	};
+    __u32 cmd_flag;
+};
+
+#endif

+ 43 - 0
driver/xrp-kernel/xrp_kernel_report.h

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2017 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#ifndef XRP_KERNEL_REPORT_H
+#define XRP_KERNEL_REPORT_H
+
+// #include "xrp_alloc.h"
+#include <linux/interrupt.h>
+struct xrp_reporter {
+
+    struct fasync_struct *fasync;
+	struct tasklet_struct  report_task;
+	__u64 buffer_virt;
+
+	phys_addr_t buffer_phys;
+	size_t buffer_size;
+
+};
+
+#endif

+ 35 - 0
driver/xrp-kernel/xrp_private_alloc.h

@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2017 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#ifndef XRP_PRIVATE_ALLOC_H
+#define XRP_PRIVATE_ALLOC_H
+
+#include "xrp_alloc.h"
+
+long xrp_init_private_pool(struct xrp_allocation_pool **pool,
+			   phys_addr_t start, u32 size);
+
+#endif

+ 40 - 0
driver/xrp-kernel/xrp_ring_buffer.h

@@ -0,0 +1,40 @@
+/*
+ * XRP ring buffer structure
+ *
+ * Copyright (c) 2018 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#ifndef XRP_RING_BUFFER_H
+#define XRP_RING_BUFFER_H
+
+struct xrp_ring_buffer {
+	__u32 read;
+	__u32 write;
+	__u32 size;
+	__u32 reserved[1];
+	__u8 data[0];
+};
+
+#endif

+ 3287 - 0
driver/xrp-kernel/xvp_main.c

@@ -0,0 +1,3287 @@
+/*
+ * XRP: Linux device driver for Xtensa Remote Processing
+ *
+ * Copyright (c) 2015 - 2017 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Alternatively you can use and distribute this file under the terms of
+ * the GNU General Public License version 2 or later.
+ */
+
+#include <linux/version.h>
+#include <linux/atomic.h>
+#include <linux/acpi.h>
+#include <linux/completion.h>
+#include <linux/delay.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 16, 0)
+#include <linux/dma-mapping.h>
+#else
+#include <linux/dma-direct.h>
+#endif
+#include <linux/firmware.h>
+#include <linux/fs.h>
+#include <linux/hashtable.h>
+#include <linux/highmem.h>
+#include <linux/idr.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_reserved_mem.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/property.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/sort.h>
+#include <linux/timer.h>
+#include <linux/dma-mapping.h>
+#include <linux/dma-buf.h>
+#include <asm/mman.h>
+#include <linux/mman.h>
+#include <asm/uaccess.h>
+#include "xrp_cma_alloc.h"
+#include "xrp_firmware.h"
+#include "xrp_hw.h"
+#include "xrp_internal.h"
+#include "xrp_kernel_defs.h"
+#include "xrp_kernel_dsp_interface.h"
+#include "xrp_private_alloc.h"
+#include "xrp_debug.h"
+#define DRIVER_NAME "xrp"
+#define XRP_DEFAULT_TIMEOUT 60
+
+#ifndef __io_virt
+#define __io_virt(a) ((void __force *)(a))
+#endif
+
+struct xrp_alien_mapping {
+	unsigned long vaddr;
+	unsigned long size;
+	phys_addr_t paddr;
+	void *allocation;
+	enum {
+		ALIEN_GUP,
+		ALIEN_PFN_MAP,
+		ALIEN_COPY,
+	} type;
+};
+
+struct xrp_mapping {
+	enum {
+		XRP_MAPPING_NONE,
+		XRP_MAPPING_NATIVE,
+		XRP_MAPPING_ALIEN,
+		XRP_MAPPING_KERNEL = 0x4,
+	} type;
+	union {
+		struct {
+			struct xrp_allocation *xrp_allocation;
+			unsigned long vaddr;
+		} native;
+		struct xrp_alien_mapping alien_mapping;
+	};
+};
+
+struct xvp_file {
+	struct xvp *xvp;
+	spinlock_t busy_list_lock;
+	struct xrp_allocation *busy_list;
+};
+
+struct xrp_known_file {
+	void *filp;
+	struct hlist_node node;
+};
+
+struct xrp_dma_buf_item{
+
+	struct list_head  link;
+    struct dma_buf *dmabuf;
+    struct sg_table *sgt;
+    struct dma_buf_attachment * attachment;
+    int ref;
+};
+static int firmware_command_timeout = XRP_DEFAULT_TIMEOUT;
+module_param(firmware_command_timeout, int, 0644);
+MODULE_PARM_DESC(firmware_command_timeout, "Firmware command timeout in seconds.");
+
+static int firmware_reboot = 1;
+module_param(firmware_reboot, int, 0644);
+MODULE_PARM_DESC(firmware_reboot, "Reboot firmware on command timeout.");
+
+enum {
+	LOOPBACK_NORMAL,	/* normal work mode */
+	LOOPBACK_NOIO,		/* don't communicate with FW, but still load it and control DSP */
+	LOOPBACK_NOMMIO,	/* don't comminicate with FW or use DSP MMIO, but still load the FW */
+	LOOPBACK_NOFIRMWARE,	/*  communicate with FW or use DSP MMIO, don't load the FW */
+
+	LOOPBACK_NOFIRMWARE_NOMMIO, /* don't communicate with FW or use DSP MMIO, don't load the FW */
+};
+static int loopback = 0;
+module_param(loopback, int, 0644);
+MODULE_PARM_DESC(loopback, "Don't use actual DSP, perform everything locally.");
+
+static int load_mode = 0;
+module_param(load_mode, int, 0644);
+MODULE_PARM_DESC(load_mode, "firmware load mode. 0: load by driver. 1:load by xplorer to debug.");
+
+enum {
+    LOAD_MODE_AUTO,   /* load firmware auto by drvier */
+    LOAD_MODE_MANUAL,   /* load firmware manually for debug*/
+};
+
+static int heartbeat_period = 0;
+module_param(heartbeat_period, int, 0644);
+MODULE_PARM_DESC(heartbeat_period, "Firmware command timeout in seconds.");
+
+static int dsp_fw_log_mode = 1;
+module_param(dsp_fw_log_mode, int, 0644);
+MODULE_PARM_DESC(dsp_fw_log_mode, "Firmware LOG MODE.0:disable,1:ERROR(DEFAULT),2:WRNING,3:INFO,4:DEUBG,5:TRACE");
+static DEFINE_HASHTABLE(xrp_known_files, 10);
+static DEFINE_SPINLOCK(xrp_known_files_lock);
+
+static DEFINE_SPINLOCK(xrp_dma_buf_lock);
+static DEFINE_IDA(xvp_nodeid);
+
+static int xrp_boot_firmware(struct xvp *xvp);
+
+static long xrp_copy_user_from_phys(struct xvp *xvp,
+				    unsigned long vaddr, unsigned long size,
+				    phys_addr_t paddr, unsigned long flags);
+static bool xrp_cacheable(struct xvp *xvp, unsigned long pfn,
+			  unsigned long n_pages)
+{
+	if (xvp->hw_ops->cacheable) {
+		return xvp->hw_ops->cacheable(xvp->hw_arg, pfn, n_pages);
+	} else {
+		unsigned long i;
+
+		for (i = 0; i < n_pages; ++i)
+			if (!pfn_valid(pfn + i))
+				return false;
+		return true;
+	}
+}
+
+static int xrp_dma_direction(unsigned flags)
+{
+	static const enum dma_data_direction xrp_dma_direction[] = {
+		[0] = DMA_NONE,
+		[XRP_FLAG_READ] = DMA_TO_DEVICE,
+		[XRP_FLAG_WRITE] = DMA_FROM_DEVICE,
+		[XRP_FLAG_READ_WRITE] = DMA_BIDIRECTIONAL,
+	};
+	return xrp_dma_direction[flags & XRP_FLAG_READ_WRITE];
+}
+
+static void xrp_default_dma_sync_for_device(struct xvp *xvp,
+					    phys_addr_t phys,
+					    unsigned long size,
+					    unsigned long flags)
+{
+	dma_sync_single_for_device(xvp->dev, phys_to_dma(xvp->dev, phys), size,
+				   xrp_dma_direction(flags));
+}
+
+static void xrp_dma_sync_for_device(struct xvp *xvp,
+				    unsigned long virt,
+				    phys_addr_t phys,
+				    unsigned long size,
+				    unsigned long flags)
+{
+	if (xvp->hw_ops->dma_sync_for_device)
+		xvp->hw_ops->dma_sync_for_device(xvp->hw_arg,
+						 (void *)virt, phys, size,
+						 flags);
+	else
+		xrp_default_dma_sync_for_device(xvp, phys, size, flags);
+}
+
+static void xrp_default_dma_sync_for_cpu(struct xvp *xvp,
+					 phys_addr_t phys,
+					 unsigned long size,
+					 unsigned long flags)
+{
+	dma_sync_single_for_cpu(xvp->dev, phys_to_dma(xvp->dev, phys), size,
+				xrp_dma_direction(flags));
+}
+
+static void xrp_dma_sync_for_cpu(struct xvp *xvp,
+				 unsigned long virt,
+				 phys_addr_t phys,
+				 unsigned long size,
+				 unsigned long flags)
+{
+	if (xvp->hw_ops->dma_sync_for_cpu)
+		xvp->hw_ops->dma_sync_for_cpu(xvp->hw_arg,
+					      (void *)virt, phys, size,
+					      flags);
+	else
+		xrp_default_dma_sync_for_cpu(xvp, phys, size, flags);
+}
+static inline void xrp_comm_write32(volatile void __iomem *addr, u32 v)
+{
+	//__raw_writel(v, addr);
+	writel(v, addr);
+}
+
+static inline u32 xrp_comm_read32(volatile void __iomem *addr)
+{
+	//return __raw_readl(addr);
+	return readl(addr);
+}
+
+static inline void __iomem *xrp_comm_put_tlv(void __iomem **addr,
+					     uint32_t type,
+					     uint32_t length)
+{
+	struct xrp_dsp_tlv __iomem *tlv = *addr;
+
+	xrp_comm_write32(&tlv->type, type);
+	xrp_comm_write32(&tlv->length, length);
+	*addr = tlv->value + ((length + 3) / 4);
+	return tlv->value;
+}
+
+static inline void __iomem *xrp_comm_get_tlv(void __iomem **addr,
+					     uint32_t *type,
+					     uint32_t *length)
+{
+	struct xrp_dsp_tlv __iomem *tlv = *addr;
+
+	*type = xrp_comm_read32(&tlv->type);
+	*length = xrp_comm_read32(&tlv->length);
+	*addr = tlv->value + ((*length + 3) / 4);
+	return tlv->value;
+}
+
+static inline void xrp_comm_write(volatile void __iomem *addr, const void *p,
+				  size_t sz)
+{
+	size_t sz32 = sz & ~3;
+	u32 v;
+
+	while (sz32) {
+		memcpy(&v, p, sizeof(v));
+		__raw_writel(v, addr);
+		p += 4;
+		addr += 4;
+		sz32 -= 4;
+	}
+	sz &= 3;
+	if (sz) {
+		v = 0;
+		memcpy(&v, p, sz);
+		__raw_writel(v, addr);
+	}
+}
+
+static inline void xrp_comm_read(volatile void __iomem *addr, void *p,
+				  size_t sz)
+{
+	size_t sz32 = sz & ~3;
+	u32 v;
+
+	while (sz32) {
+		v = __raw_readl(addr);
+		memcpy(p, &v, sizeof(v));
+		p += 4;
+		addr += 4;
+		sz32 -= 4;
+	}
+	sz &= 3;
+	if (sz) {
+		v = __raw_readl(addr);
+		memcpy(p, &v, sz);
+	}
+}
+
+
+static inline void xrp_send_device_irq(struct xvp *xvp)
+{
+	if (xvp->hw_ops->send_irq)
+		xvp->hw_ops->send_irq(xvp->hw_arg);
+}
+
+static inline bool xrp_panic_check(struct xvp *xvp)
+{
+	if (xvp->hw_ops->panic_check)
+		return xvp->hw_ops->panic_check(xvp->hw_arg);
+	else
+		return panic_check(xvp->panic_log);
+}
+
+static void xrp_add_known_file(struct file *filp)
+{
+	struct xrp_known_file *p = kmalloc(sizeof(*p), GFP_KERNEL);
+
+	if (!p)
+		return;
+
+	p->filp = filp;
+	spin_lock(&xrp_known_files_lock);
+	hash_add(xrp_known_files, &p->node, (unsigned long)filp);
+	spin_unlock(&xrp_known_files_lock);
+}
+
+static void xrp_remove_known_file(struct file *filp)
+{
+	struct xrp_known_file *p;
+	struct xrp_known_file *pf = NULL;
+
+	spin_lock(&xrp_known_files_lock);
+	hash_for_each_possible(xrp_known_files, p, node, (unsigned long)filp) {
+		if (p->filp == filp) {
+			hash_del(&p->node);
+			pf = p;
+			break;
+		}
+	}
+	spin_unlock(&xrp_known_files_lock);
+	if (pf)
+		kfree(pf);
+}
+
+static bool xrp_is_known_file(struct file *filp)
+{
+	bool ret = false;
+	struct xrp_known_file *p;
+
+	spin_lock(&xrp_known_files_lock);
+	hash_for_each_possible(xrp_known_files, p, node, (unsigned long)filp) {
+		if (p->filp == filp) {
+			ret = true;
+			break;
+		}
+	}
+	spin_unlock(&xrp_known_files_lock);
+	return ret;
+}
+
+static void xrp_sync_v2(struct xvp *xvp,
+			void *hw_sync_data, size_t sz)
+{
+	struct xrp_dsp_sync_v2 __iomem *shared_sync = xvp->comm;
+	void __iomem *addr = shared_sync->hw_sync_data;
+    
+	xrp_comm_write(xrp_comm_put_tlv(&addr,
+					XRP_DSP_SYNC_TYPE_HW_SPEC_DATA, sz),
+		       hw_sync_data, sz);
+	if (xvp->n_queues > 1) {
+		struct xrp_dsp_sync_v2 __iomem *queue_sync;
+		unsigned i;
+
+		xrp_comm_write(xrp_comm_put_tlv(&addr,
+						XRP_DSP_SYNC_TYPE_HW_QUEUES,
+						xvp->n_queues * sizeof(u32)),
+			       xvp->queue_priority,
+			       xvp->n_queues * sizeof(u32));
+		for (i = 1; i < xvp->n_queues; ++i) {
+			queue_sync = xvp->queue[i].comm;
+			xrp_comm_write32(&queue_sync->sync,
+					 XRP_DSP_SYNC_IDLE);
+		}
+	}
+    struct xrp_dsp_debug_info debug_info ={
+        .panic_addr = xvp->panic_phy,
+        .log_level = dsp_fw_log_mode,
+    };
+
+    xrp_comm_write(xrp_comm_put_tlv(&addr,
+					XRP_DSP_SYNC_TYPE_HW_DEBUG_INFO, sizeof(struct xrp_dsp_debug_info)),
+		       &debug_info, sizeof(struct xrp_dsp_debug_info));
+	xrp_comm_put_tlv(&addr, XRP_DSP_SYNC_TYPE_LAST, 0);
+}
+
+static int xrp_sync_complete_v2(struct xvp *xvp, size_t sz)
+{
+	struct xrp_dsp_sync_v2 __iomem *shared_sync = xvp->comm;
+	void __iomem *addr = shared_sync->hw_sync_data;
+	u32 type, len;
+
+	xrp_comm_get_tlv(&addr, &type, &len);
+	if (len != sz) {
+		dev_err(xvp->dev,
+			"HW spec data size modified by the DSP\n");
+		return -EINVAL;
+	}
+	if (!(type & XRP_DSP_SYNC_TYPE_ACCEPT))
+		dev_info(xvp->dev,
+			 "HW spec data not recognized by the DSP\n");
+
+	if (xvp->n_queues > 1) {
+		void __iomem *p = xrp_comm_get_tlv(&addr, &type, &len);
+
+		if (len != xvp->n_queues * sizeof(u32)) {
+			dev_err(xvp->dev,
+				"Queue priority size modified by the DSP\n");
+			return -EINVAL;
+		}
+		if (type & XRP_DSP_SYNC_TYPE_ACCEPT) {
+			xrp_comm_read(p, xvp->queue_priority,
+				      xvp->n_queues * sizeof(u32));
+		} else {
+			dev_info(xvp->dev,
+				 "Queue priority data not recognized by the DSP\n");
+			xvp->n_queues = 1;
+		}
+	}
+	return 0;
+}
+
+static int xrp_synchronize(struct xvp *xvp)
+{
+	size_t sz;
+	void *hw_sync_data;
+	unsigned long deadline = jiffies + firmware_command_timeout * HZ;
+	struct xrp_dsp_sync_v1 __iomem *shared_sync = xvp->comm;
+	int ret;
+	u32 v, v1;
+
+	hw_sync_data = xvp->hw_ops->get_hw_sync_data(xvp->hw_arg, &sz);
+	if (!hw_sync_data) {
+		ret = -ENOMEM;
+		goto err;
+	}
+	ret = -ENODEV;
+	dev_dbg(xvp->dev,"%s:comm sync:%p\n",__func__,&shared_sync->sync);
+	xrp_comm_write32(&shared_sync->sync, XRP_DSP_SYNC_START);
+	mb();
+	do {
+		v = xrp_comm_read32(&shared_sync->sync);
+		if (v != XRP_DSP_SYNC_START)
+			break;
+		if (xrp_panic_check(xvp))
+			goto err;
+		schedule();
+	} while (time_before(jiffies, deadline));
+    dev_dbg(xvp->dev,"%s:comm sync data :%x\n",__func__,v);
+	switch (v) {
+	case XRP_DSP_SYNC_DSP_READY_V1:
+		if (xvp->n_queues > 1) {
+			dev_info(xvp->dev,
+				 "Queue priority data not recognized by the DSP\n");
+			xvp->n_queues = 1;
+		}
+		xrp_comm_write(&shared_sync->hw_sync_data, hw_sync_data, sz);
+		break;
+	case XRP_DSP_SYNC_DSP_READY_V2:
+		xrp_sync_v2(xvp, hw_sync_data, sz);
+		break;
+	case XRP_DSP_SYNC_START:
+		dev_err(xvp->dev, "DSP is not ready for synchronization\n");
+		goto err;
+	default:
+		dev_err(xvp->dev,
+			"DSP response to XRP_DSP_SYNC_START is not recognized\n");
+		goto err;
+	}
+
+	mb();
+	xrp_comm_write32(&shared_sync->sync, XRP_DSP_SYNC_HOST_TO_DSP);
+
+	do {
+		mb();
+		v1 = xrp_comm_read32(&shared_sync->sync);
+		if (v1 == XRP_DSP_SYNC_DSP_TO_HOST)
+			break;
+		if (xrp_panic_check(xvp))
+			goto err;
+		schedule();
+	} while (time_before(jiffies, deadline));
+
+	if (v1 != XRP_DSP_SYNC_DSP_TO_HOST) {
+		dev_err(xvp->dev,
+			"DSP haven't confirmed initialization data reception\n");
+		goto err;
+	}
+
+	if (v == XRP_DSP_SYNC_DSP_READY_V2) {
+		ret = xrp_sync_complete_v2(xvp, sz);
+		if (ret < 0)
+			goto err;
+	}
+
+	xrp_send_device_irq(xvp);
+
+	// if (xvp->host_irq_mode) {
+	// 	int res = wait_for_completion_timeout(&xvp->queue[0].completion,
+	// 					      firmware_command_timeout * HZ);
+
+	// 	ret = -ENODEV;
+	// 	if (xrp_panic_check(xvp))
+	// 		goto err;
+	// 	if (res == 0) {
+	// 		dev_err(xvp->dev,
+	// 			"host IRQ mode is requested, but DSP couldn't deliver IRQ during synchronization\n");
+	// 		goto err;
+	// 	}
+	// }
+	ret = 0;
+err:
+	kfree(hw_sync_data);
+	xrp_comm_write32(&shared_sync->sync, XRP_DSP_SYNC_IDLE);
+	return ret;
+}
+
+static bool xrp_cmd_complete(struct xrp_comm *xvp)
+{
+	struct xrp_dsp_cmd __iomem *cmd = xvp->comm;
+	u32 flags = xrp_comm_read32(&cmd->flags);
+	pr_debug(" xrp_cmd_complete %x\n", flags);
+	rmb();
+	return (flags & (XRP_DSP_CMD_FLAG_REQUEST_VALID |
+			 XRP_DSP_CMD_FLAG_RESPONSE_VALID)) ==
+		(XRP_DSP_CMD_FLAG_REQUEST_VALID |
+		 XRP_DSP_CMD_FLAG_RESPONSE_VALID);
+}
+
+static inline int xrp_report_comlete(struct xvp *xvp)
+{
+	struct xrp_dsp_cmd __iomem *cmd = xvp->comm;
+
+	if(!xvp->reporter)
+		return -1;
+
+	u32 flags = xrp_comm_read32(&cmd->report_id);
+
+	if(flags& XRP_DSP_REPORT_TO_HOST_FLAG )
+	{
+        // dev_err(xvp->dev, "%s,report_flag %x\n", __func__,flags);
+	    flags &= (~XRP_DSP_REPORT_TO_HOST_FLAG);
+
+        xrp_comm_write32(&cmd->report_id,flags);
+		tasklet_schedule(&xvp->reporter->report_task);
+		return 0;
+	}
+	return -1;
+}
+
+
+static inline int xrp_device_cmd_comlete(struct xvp *xvp)
+{
+	struct xrp_dsp_cmd __iomem *cmd = xvp->comm;
+
+	u32 flags = xrp_comm_read32(&cmd->cmd_flag);
+
+	if(flags& XRP_DSP_REPORT_TO_HOST_FLAG )
+	{
+        xrp_comm_write32(&cmd->cmd_flag,0);
+		return 0;
+	}
+	return -1;
+}
+
+irqreturn_t xrp_irq_handler(int irq, struct xvp *xvp)
+{
+	unsigned i, n = 0;
+
+	// dev_dbg(xvp->dev, "%s\n", __func__);
+	if (!xvp->comm)
+		return IRQ_NONE;
+
+	if(!xrp_report_comlete(xvp))
+	{
+		dev_dbg(xvp->dev, "completing report\n");
+		// return IRQ_HANDLED;
+	}
+    if(xrp_device_cmd_comlete(xvp))
+    {
+        dev_dbg(xvp->dev, "no cmd msg report\n");
+        return IRQ_HANDLED;
+    }
+	for (i = 0; i < xvp->n_queues; ++i) {
+		if (xrp_cmd_complete(xvp->queue + i)) {
+			dev_dbg(xvp->dev, "completing queue %d\n", i);
+			complete(&xvp->queue[i].completion);
+			++n;
+		}
+	}
+
+	return n ? IRQ_HANDLED : IRQ_NONE;
+}
+EXPORT_SYMBOL(xrp_irq_handler);
+
+static inline void xvp_file_lock(struct xvp_file *xvp_file)
+{
+	spin_lock(&xvp_file->busy_list_lock);
+}
+
+static inline void xvp_file_unlock(struct xvp_file *xvp_file)
+{
+	spin_unlock(&xvp_file->busy_list_lock);
+}
+
+static void xrp_allocation_queue(struct xvp_file *xvp_file,
+				 struct xrp_allocation *xrp_allocation)
+{
+	xvp_file_lock(xvp_file);
+
+	xrp_allocation->next = xvp_file->busy_list;
+	xvp_file->busy_list = xrp_allocation;
+
+	xvp_file_unlock(xvp_file);
+}
+
+static struct xrp_allocation *xrp_allocation_dequeue(struct xvp_file *xvp_file,
+						     phys_addr_t paddr, u32 size)
+{
+	struct xrp_allocation **pcur;
+	struct xrp_allocation *cur;
+
+	xvp_file_lock(xvp_file);
+
+	for (pcur = &xvp_file->busy_list; (cur = *pcur); pcur = &((*pcur)->next)) {
+		pr_debug("%s: %pap / %pap x %d\n", __func__, &paddr, &cur->start, cur->size);
+		if (paddr >= cur->start && paddr + size - cur->start <= cur->size) {
+			*pcur = cur->next;
+			break;
+		}
+	}
+
+	xvp_file_unlock(xvp_file);
+	return cur;
+}
+
+static long xrp_ioctl_alloc(struct file *filp,
+			    struct xrp_ioctl_alloc __user *p)
+{
+	struct xvp_file *xvp_file = filp->private_data;
+	struct xrp_allocation *xrp_allocation;
+	unsigned long vaddr;
+	struct xrp_ioctl_alloc xrp_ioctl_alloc;
+	long err;
+
+	// pr_debug("%s: %p\n", __func__, p);
+	if (copy_from_user(&xrp_ioctl_alloc, p, sizeof(*p)))
+		return -EFAULT;
+
+	// pr_debug("%s: size = %d, align = %x\n", __func__,
+	// 	 xrp_ioctl_alloc.size, xrp_ioctl_alloc.align);
+
+	err = xrp_allocate(xvp_file->xvp->pool,
+			   xrp_ioctl_alloc.size,
+			   xrp_ioctl_alloc.align,
+			   &xrp_allocation);
+	if (err)
+		return err;
+
+	xrp_allocation_queue(xvp_file, xrp_allocation);
+
+	vaddr = vm_mmap(filp, 0, xrp_allocation->size,
+			PROT_READ | PROT_WRITE, MAP_SHARED,
+			xrp_allocation_offset(xrp_allocation));
+
+	xrp_ioctl_alloc.addr = vaddr;
+    xrp_ioctl_alloc.paddr = xrp_allocation->start;
+    pr_debug("%s: vaddr = %llx, paddr = %llx\n", __func__,
+		 xrp_ioctl_alloc.addr, xrp_ioctl_alloc.paddr);
+	if (copy_to_user(p, &xrp_ioctl_alloc, sizeof(*p))) {
+		vm_munmap(vaddr, xrp_ioctl_alloc.size);
+		return -EFAULT;
+	}
+	return 0;
+}
+static void xrp_report_tasklet(unsigned long arg)
+{
+	struct xvp *xvp=(struct xvp *)arg;
+		struct xrp_dsp_cmd __iomem *cmd=xvp->comm;
+	struct xrp_report_buffer *p_buf = xvp->reporter->buffer_virt;
+	// pr_debug("%s,addr:%lx\n",__func__,arg);
+	if(!xvp->reporter->fasync)
+	{
+		pr_debug("%s:fasync is not register in user space\n",__func__);
+		return;
+	}
+	// pr_debug("%s,%d\n",__func__,xvp->reporter->fasync->magic);
+	// if(!xvp->reporter->user_buffer_virt &&
+	// 	!xvp->reporter->buffer_size)
+	// {
+	// 	pr_debug("%s:user_buffer_virt and buffer size is invalid\n",__func__);
+	// 	return;
+	// }
+	// size_t s= xrp_comm_read32(&cmd->report_paylad_size);
+
+	// unsigned int id = xrp_comm_read32(&cmd->report_id);
+	// if(copy_to_user(&p_buf_user->report_id,&id,sizeof(p_buf_user->report_id)));
+	// {
+	// 	pr_debug("%s:copy report id to user fail\n",__func__);
+	// 	return;
+	// }
+
+    // if(xvp->reporter->buffer_size>XRP_DSP_CMD_INLINE_DATA_SIZE)
+	// {
+	// 	if(xrp_copy_user_from_phys(xvp,&p_buf_user->data[0],s,xvp->reporter->buffer_phys,XRP_FLAG_READ_WRITE))
+	// 		return;			 
+	// }
+	// else
+	// {
+	// 	char temp_buf[XRP_DSP_CMD_INLINE_DATA_SIZE];
+	// 	xrp_comm_read(&cmd->report_data,temp_buf,s);
+	// 	if(copy_to_user(&p_buf_user->data[0],temp_buf,s))
+	// 	{
+	// 		pr_debug("%s:copy report data to user fail\n",__func__);
+	// 		return;
+	// 	}
+	// }
+	/*****clear report*********************/
+	p_buf->report_id = xrp_comm_read32(&cmd->report_id)&0xffff;
+
+	//xrp_dma_sync_for_cpu(xvp,xvp->reporter->buffer_virt,xvp->reporter->buffer_phys,xvp->reporter->buffer_size,XRP_FLAG_WRITE);	
+	kill_fasync(&(xvp->reporter->fasync), SIGIO, POLL_IN);
+	xrp_comm_write32(&cmd->report_id,0x0);
+    // pr_debug("%s,report_id:%d,report_data:%x\n",__func__,p_buf->report_id,p_buf->data[0]);
+}
+static long xrp_map_phy_to_virt(phys_addr_t paddr,unsigned long size,__u64 *vaddr)
+{
+		// if (pfn_valid(__phys_to_pfn(paddr))) {
+		// 	struct page *page = pfn_to_page(__phys_to_pfn(paddr));
+		// 	size_t page_offs = paddr & ~PAGE_MASK;
+		// 	size_t offs;
+
+		// 	// for (offs = 0; offs < size; ++page) {
+		// 	// 	void *p = kmap(page);
+		// 	// 	size_t sz = PAGE_SIZE - page_offs;
+		// 	// 	size_t copy_sz = sz;
+		// 	// 	unsigned long rc;
+		// 	// }
+		// 	if(page_offs+size>PAGE_SIZE)
+		// 	{
+		// 		pr_debug("%s,phys addr map to virt exceed one page",__func__);
+		// 		return -EINVAL;
+		// 	}
+		// 	void *p  = kmap(page);
+		// 	if(!p)
+		// 	{
+		// 		pr_debug("%s couldn't kmap %pap x 0x%08x\n",__func__,&paddr, (u32)size);
+		// 		return -EINVAL;
+		// 	}
+		// 	*vaddr =p + page_offs;
+		// 	pr_debug("%s map to mem",__func__);
+		// 	return 0;
+
+		// }
+		// else
+        {
+				void __iomem *p = ioremap(paddr, size);
+				unsigned long rc;
+
+				if (!p) {
+					pr_debug("%s,couldn't ioremap %pap x 0x%08x\n",__func__,&paddr, (u32)size);
+					return -EINVAL;
+				}
+				*vaddr = p;
+				pr_debug("%s map to io mem",__func__);
+				return 0;
+		}
+				// 	iounmap(p);
+				// if (rc)
+				// 	return -EFAULT;
+
+				// }
+}
+
+static long xrp_unmap_phy_to_virt(unsigned long *vaddr,phys_addr_t paddr,unsigned long size)
+{
+		if (pfn_valid(__phys_to_pfn(paddr))) {
+			struct page *page = pfn_to_page(__phys_to_pfn(paddr));
+			kunmap(page);
+		}
+		else{
+			iounmap(*vaddr);
+		}
+		*vaddr=NULL;
+		return 0;
+}
+static long xrp_ioctl_alloc_report(struct file *filp,
+			    struct xrp_ioctl_alloc __user *p)
+{
+		struct xvp_file *xvp_file = filp->private_data;
+		struct xrp_allocation *xrp_allocation;
+		struct xvp *xvp = xvp_file->xvp;
+		struct xrp_ioctl_alloc xrp_ioctl_alloc;
+		struct xrp_dsp_cmd __iomem *cmd=xvp->comm;
+		unsigned long vaddr;
+		long err;
+
+		pr_debug("%s: %p\n", __func__, p);
+		if (copy_from_user(&xrp_ioctl_alloc, p, sizeof(*p)))
+			return -EFAULT;
+		pr_debug("%s: virtAddr = %lx.size = %d, align = %x\n", __func__,
+		 		xrp_ioctl_alloc.addr,xrp_ioctl_alloc.size, 
+				xrp_ioctl_alloc.align);
+		// if(NULL == xrp_ioctl_alloc.addr)
+		// {
+		// 	return -EFAULT;
+		// }
+		xvp->reporter= kmalloc(sizeof(*(xvp->reporter)), GFP_KERNEL);
+		if (!xvp->reporter)
+			return -EFAULT;
+		xvp->reporter->fasync=NULL;
+		err = xrp_allocate(xvp_file->xvp->pool,
+			xrp_ioctl_alloc.size,
+			xrp_ioctl_alloc.align,
+			&xrp_allocation);
+
+		if (err)
+			return err;
+		xrp_allocation_queue(xvp_file, xrp_allocation);
+
+		vaddr = vm_mmap(filp, 0, xrp_allocation->size,
+							PROT_READ | PROT_WRITE, MAP_SHARED,
+							xrp_allocation_offset(xrp_allocation));
+		xrp_ioctl_alloc.addr=vaddr;		
+		xvp->reporter->buffer_phys = xrp_allocation->start;
+
+		if(xrp_map_phy_to_virt(xvp->reporter->buffer_phys,sizeof(__u32),&xvp->reporter->buffer_virt))
+		{
+			pr_debug("%s: map to kernel virt fail\n", __func__);
+			kfree(xvp->reporter);
+			return -EFAULT;
+		}
+
+		xrp_comm_write32(&cmd->report_addr, 
+					xrp_translate_to_dsp(&xvp->address_map,xvp->reporter->buffer_phys+sizeof(__u32)));
+		unsigned int dsp_addr = xrp_comm_read32(&cmd->report_addr);		
+		pr_debug("%s: alloc_report buffer user virt:%llx,kernel virt:%lx, phys:%llx,dsp_addr:%x,size:%d\n", __func__,
+					vaddr,xvp->reporter->buffer_virt,xvp->reporter->buffer_phys,dsp_addr,xrp_allocation->size);
+		/*alloc report memory for DSP , alloc kernel memory for user get*/
+		// if(xrp_ioctl_alloc.size>XRP_DSP_CMD_INLINE_DATA_SIZE)
+		// {
+
+		// 	err = xrp_allocate(xvp_file->xvp->pool,
+		// 			xrp_ioctl_alloc.size,
+		// 			xrp_ioctl_alloc.align,
+		// 			&xrp_allocation);
+		// 	if (err)
+		// 		return err;
+
+		// 	// xrp_allocation_queue(xvp_file, xrp_allocation);
+		// 	xvp->reporter->buffer_phys = xrp_allocation->start;
+		// 	xrp_comm_write32(&cmd->report_addr, 
+		// 				xrp_translate_to_dsp(&xvp->address_map,xvp->reporter->buffer_phys));
+		// 	// vaddr = vm_mmap(filp, 0, xrp_allocation->size,
+		// 	// PROT_READ | PROT_WRITE, MAP_SHARED,
+		// 	// xrp_allocation_offset(xrp_allocation));
+		// 	// xrp_ioctl_alloc.addr=vaddr;
+		// 	pr_debug("%s: kernel bufdfer:%lx\n", __func__, xvp->reporter->buffer_phys);
+		// }
+		// else{
+		// 	xvp->reporter->buffer_phys = NULL;
+		// }
+        /*save the user addr ,which kernel copy the report to */
+		// xvp->reporter->user_buffer_virt = xrp_ioctl_alloc.addr;	
+		xvp->reporter->buffer_size = xrp_ioctl_alloc.size;
+		xrp_comm_write32(&cmd->report_buffer_size,xvp->reporter->buffer_size);
+		xrp_comm_write32(&cmd->report_status,XRP_DSP_REPORT_WORKING);
+		xrp_comm_write32(&cmd->report_id,0);
+		tasklet_init(&xvp->reporter->report_task,xrp_report_tasklet,(unsigned long)xvp);
+		if (copy_to_user(p, &xrp_ioctl_alloc, sizeof(*p))) {
+			vm_munmap(vaddr, xrp_ioctl_alloc.size);
+			kfree(xvp->reporter);
+			pr_debug("%s: copy to user fail\n", __func__);
+			return -EFAULT;
+		}
+		pr_debug("%s: alloc_report %lx end\n", __func__,xvp);
+	return 0;
+}
+
+static int xrp_report_fasync(int fd, struct file *filp, int on){
+   struct xvp_file *xvp_file  = (struct xvp_file *)filp->private_data;
+   
+   pr_debug("%s: start,mode: %d\n", __func__,on);
+   if(xvp_file->xvp->reporter == NULL)
+   {
+        pr_debug("%s: reporter is NULL\n", __func__,on);
+        return 0;
+   }
+   if( fasync_helper(fd,filp,on,&(xvp_file->xvp->reporter->fasync)) < 0){
+       pr_debug("%s: xrp_report_fasync fail\n", __func__);
+       return -EIO;
+   }
+   pr_debug("%s: end\n", __func__);
+   return 0;
+}
+
+static int xrp_report_fasync_release(struct file *filp){
+	struct xvp_file *xvp_file  = (struct xvp_file *)filp->private_data;
+	if(xvp_file->xvp->reporter)
+		return  xrp_report_fasync(-1,filp,0); 
+	return 0;
+
+}
+static long xrp_ioctl_release_report(struct file *filp,
+						struct xrp_ioctl_alloc __user *p)
+{
+	struct xvp_file *xvp_file = filp->private_data;
+	struct xvp *xvp = xvp_file->xvp;
+	struct mm_struct *mm = current->mm;
+	struct xrp_ioctl_alloc xrp_ioctl_alloc;
+	struct vm_area_struct *vma;
+	unsigned long start;
+	struct xrp_dsp_cmd __iomem *cmd=xvp->comm;
+
+	tasklet_kill(&xvp->reporter->report_task);
+	xrp_comm_write32(&cmd->report_status,XRP_DSP_REPORT_INVALID);
+
+	if (copy_from_user(&xrp_ioctl_alloc, p, sizeof(*p)))
+	return -EFAULT;
+
+	start = xrp_ioctl_alloc.addr;
+	pr_debug("%s: virt_addr = 0x%08lx\n", __func__, start);
+
+    #if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
+	down_read(&mm->mmap_sem);
+	#else
+	down_read(&mm->mmap_lock);
+	#endif
+	vma = find_vma(mm, start);
+
+	if (vma && vma->vm_file == filp &&
+		vma->vm_start <= start && start < vma->vm_end) {
+		size_t size;
+
+		start = vma->vm_start;
+		size = vma->vm_end - vma->vm_start;
+        #if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
+		up_read(&mm->mmap_sem);
+		#else
+		up_read(&mm->mmap_lock);		
+		#endif
+		pr_debug("%s: 0x%lx x %zu\n", __func__, start, size);
+		vm_munmap(start, size);
+	}
+	else{
+		pr_debug("%s: no vma/bad vma for vaddr = 0x%08lx\n", __func__, start);
+        #if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
+		up_read(&mm->mmap_sem);
+		#else
+		up_read(&mm->mmap_lock);		
+		#endif
+		return -EINVAL;
+	}
+
+	xrp_report_fasync_release(filp);	
+	kfree(xvp->reporter);
+	xvp->reporter =NULL;
+	
+
+	return 0;
+}
+// static struct struct_list timer;
+
+// static void xrp_device_heartbeat_check(unsigned long arg)
+// {
+//     struct xvp *xvp = struct xvp *(arg);
+//     if(xvp->reporter != NULL)
+//     {
+//        	xrp_comm_write32(&cmd->flags, 0);
+//     }
+
+//     mod_timer(&timer,jiffies + heartbeat_period * HZ);
+// }
+// static int xrp_device_heartbeat_init(void * arg)
+// {
+//     if(heartbeat_period > 0)
+//     {
+//         init_timer(&timer);
+//         timer.function = xrp_device_heartbeat_check;
+//         timer.expires = jiffies + heartbeat_period * HZ;
+//         timer.data = arg;
+//         add_timer(&timer);
+//         pr_debug("%s enable heartbeat timer\n", __func__);
+//     }
+
+// }
+static void xrp_put_pages(phys_addr_t phys, unsigned long n_pages)
+{
+	struct page *page;
+	unsigned long i;
+
+	page = pfn_to_page(__phys_to_pfn(phys));
+	for (i = 0; i < n_pages; ++i)
+		put_page(page + i);
+}
+
+static void xrp_alien_mapping_destroy(struct xrp_alien_mapping *alien_mapping)
+{
+	switch (alien_mapping->type) {
+	case ALIEN_GUP:
+		xrp_put_pages(alien_mapping->paddr,
+			      PFN_UP(alien_mapping->vaddr +
+				     alien_mapping->size) -
+			      PFN_DOWN(alien_mapping->vaddr));
+		break;
+	case ALIEN_COPY:
+		xrp_allocation_put(alien_mapping->allocation);
+		break;
+	default:
+		break;
+	}
+}
+
+static long xvp_pfn_virt_to_phys(struct xvp_file *xvp_file,
+				 struct vm_area_struct *vma,
+				 unsigned long vaddr, unsigned long size,
+				 phys_addr_t *paddr,
+				 struct xrp_alien_mapping *mapping)
+{
+	int ret;
+	unsigned long i;
+	unsigned long nr_pages = PFN_UP(vaddr + size) - PFN_DOWN(vaddr);
+	unsigned long pfn;
+	const struct xrp_address_map_entry *address_map;
+
+	ret = follow_pfn(vma, vaddr, &pfn);
+	if (ret)
+		return ret;
+
+	*paddr = __pfn_to_phys(pfn) + (vaddr & ~PAGE_MASK);
+	address_map = xrp_get_address_mapping(&xvp_file->xvp->address_map,
+					      *paddr);
+	if (!address_map) {
+		pr_debug("%s: untranslatable addr: %pap\n", __func__, paddr);
+		return -EINVAL;
+	}
+
+	for (i = 1; i < nr_pages; ++i) {
+		unsigned long next_pfn;
+		phys_addr_t next_phys;
+
+		ret = follow_pfn(vma, vaddr + (i << PAGE_SHIFT), &next_pfn);
+		if (ret)
+			return ret;
+		if (next_pfn != pfn + 1) {
+			pr_debug("%s: non-contiguous physical memory\n",
+				 __func__);
+			return -EINVAL;
+		}
+		next_phys = __pfn_to_phys(next_pfn);
+		if (xrp_compare_address(next_phys, address_map)) {
+			pr_debug("%s: untranslatable addr: %pap\n",
+				 __func__, &next_phys);
+			return -EINVAL;
+		}
+		pfn = next_pfn;
+	}
+	*mapping = (struct xrp_alien_mapping){
+		.vaddr = vaddr,
+		.size = size,
+		.paddr = *paddr,
+		.type = ALIEN_PFN_MAP,
+	};
+	pr_debug("%s: success, paddr: %pap\n", __func__, paddr);
+	return 0;
+}
+
+static long xvp_gup_virt_to_phys(struct xvp_file *xvp_file,
+				 unsigned long vaddr, unsigned long size,
+				 phys_addr_t *paddr,
+				 struct xrp_alien_mapping *mapping)
+{
+	int ret;
+	int i;
+	int nr_pages;
+	struct page **page;
+	const struct xrp_address_map_entry *address_map;
+
+	if (PFN_UP(vaddr + size) - PFN_DOWN(vaddr) > INT_MAX)
+		return -EINVAL;
+
+	nr_pages = PFN_UP(vaddr + size) - PFN_DOWN(vaddr);
+	page = kmalloc(nr_pages * sizeof(void *), GFP_KERNEL);
+	if (!page)
+		return -ENOMEM;
+
+	ret = get_user_pages_fast(vaddr, nr_pages, 1, page);
+	if (ret < 0)
+		goto out;
+
+	if (ret < nr_pages) {
+		pr_debug("%s: asked for %d pages, but got only %d\n",
+			 __func__, nr_pages, ret);
+		nr_pages = ret;
+		ret = -EINVAL;
+		goto out_put;
+	}
+
+	address_map = xrp_get_address_mapping(&xvp_file->xvp->address_map,
+					      page_to_phys(page[0]));
+	if (!address_map) {
+		phys_addr_t addr = page_to_phys(page[0]);
+		pr_debug("%s: untranslatable addr: %pap\n",
+			 __func__, &addr);
+		ret = -EINVAL;
+		goto out_put;
+	}
+
+	for (i = 1; i < nr_pages; ++i) {
+		phys_addr_t addr;
+
+		if (page[i] != page[i - 1] + 1) {
+			pr_debug("%s: non-contiguous physical memory\n",
+				 __func__);
+			ret = -EINVAL;
+			goto out_put;
+		}
+		addr = page_to_phys(page[i]);
+		if (xrp_compare_address(addr, address_map)) {
+			pr_debug("%s: untranslatable addr: %pap\n",
+				 __func__, &addr);
+			ret = -EINVAL;
+			goto out_put;
+		}
+	}
+
+	*paddr = __pfn_to_phys(page_to_pfn(page[0])) + (vaddr & ~PAGE_MASK);
+	*mapping = (struct xrp_alien_mapping){
+		.vaddr = vaddr,
+		.size = size,
+		.paddr = *paddr,
+		.type = ALIEN_GUP,
+	};
+	ret = 0;
+	pr_debug("%s: success, paddr: %pap\n", __func__, paddr);
+
+out_put:
+	if (ret < 0)
+		for (i = 0; i < nr_pages; ++i)
+			put_page(page[i]);
+out:
+	kfree(page);
+	return ret;
+}
+
+static long _xrp_copy_user_phys(struct xvp *xvp,
+				unsigned long vaddr, unsigned long size,
+				phys_addr_t paddr, unsigned long flags,
+				bool to_phys)
+{
+	// if (pfn_valid(__phys_to_pfn(paddr))) {
+	// 	struct page *page = pfn_to_page(__phys_to_pfn(paddr));
+	// 	size_t page_offs = paddr & ~PAGE_MASK;
+	// 	size_t offs;
+
+	// 	if (!to_phys)
+	// 		xrp_default_dma_sync_for_cpu(xvp, paddr, size, flags);
+	// 	for (offs = 0; offs < size; ++page) {
+	// 		void *p = kmap(page);
+	// 		size_t sz = PAGE_SIZE - page_offs;
+	// 		size_t copy_sz = sz;
+	// 		unsigned long rc;
+
+	// 		if (!p)
+	// 			return -ENOMEM;
+
+	// 		if (size - offs < copy_sz)
+	// 			copy_sz = size - offs;
+
+	// 		if (to_phys)
+	// 			rc = copy_from_user(p + page_offs,
+	// 					    (void __user *)(vaddr + offs),
+	// 					    copy_sz);
+	// 		else
+	// 			rc = copy_to_user((void __user *)(vaddr + offs),
+	// 					  p + page_offs, copy_sz);
+    //         pr_debug("%s rc:%d,user addr :(%llx,%d) kernel:addr(%llx,%d) size:%d\n", __func__,rc,vaddr,offs,p,page_offs,copy_sz);
+	// 		page_offs = 0;
+	// 		offs += copy_sz;
+
+	// 		kunmap(page);
+	// 		if (rc)
+	// 			return -EFAULT;
+	// 	}
+	// 	if (to_phys)
+	// 		xrp_default_dma_sync_for_device(xvp, paddr, size, flags);
+	// } else
+     {
+		void __iomem *p = ioremap(paddr, size);
+		unsigned long rc;
+        pr_debug("%s ioremap:to_phys %d-(%llx,%llx)\n", __func__,to_phys,paddr,p);
+		if (!p) {
+			dev_err(xvp->dev,
+				"couldn't ioremap %pap x 0x%08x\n",
+				&paddr, (u32)size);
+			return -EINVAL;
+		}
+		if (to_phys)
+        {
+			rc = copy_from_user(__io_virt(p),
+					    (void __user *)vaddr, size);
+            /*fix  5.10 kernel  copy from vaddr in kernel to phy*/
+            if(rc)
+            {
+                xrp_comm_write(p,(void *)vaddr,size);
+                pr_debug("%s WR replease by copy to phy\n", __func__);
+                rc =0 ;
+            }
+        }
+		else
+			rc = copy_to_user((void __user *)vaddr,
+					  __io_virt(p), size);
+        pr_debug("%s rc:%d,user addr :(%llx) kernel:addr(%llx) size:%d\n", __func__,rc,vaddr,p,size);
+		iounmap(p);
+		if (rc)
+			return -EFAULT;
+	}
+	return 0;
+}
+
+static long xrp_copy_user_to_phys(struct xvp *xvp,
+				  unsigned long vaddr, unsigned long size,
+				  phys_addr_t paddr, unsigned long flags)
+{
+	return _xrp_copy_user_phys(xvp, vaddr, size, paddr, flags, true);
+}
+
+static long xrp_copy_user_from_phys(struct xvp *xvp,
+				    unsigned long vaddr, unsigned long size,
+				    phys_addr_t paddr, unsigned long flags)
+{
+	return _xrp_copy_user_phys(xvp, vaddr, size, paddr, flags, false);
+}
+
+static long xvp_copy_virt_to_phys(struct xvp_file *xvp_file,
+				  unsigned long flags,
+				  unsigned long vaddr, unsigned long size,
+				  phys_addr_t *paddr,
+				  struct xrp_alien_mapping *mapping)
+{
+	phys_addr_t phys;
+	unsigned long align = clamp(vaddr & -vaddr, 16ul, PAGE_SIZE);
+	unsigned long offset = vaddr & (align - 1);
+	struct xrp_allocation *allocation;
+	long rc;
+
+	rc = xrp_allocate(xvp_file->xvp->pool,
+			  size + align, align, &allocation);
+	if (rc < 0)
+		return rc;
+
+	phys = (allocation->start & -align) | offset;
+	if (phys < allocation->start)
+		phys += align;
+
+	if (flags & XRP_FLAG_READ) {
+		if (xrp_copy_user_to_phys(xvp_file->xvp,
+					  vaddr, size, phys, flags)) {
+			xrp_allocation_put(allocation);
+			return -EFAULT;
+		}
+	}
+
+	*paddr = phys;
+	*mapping = (struct xrp_alien_mapping){
+		.vaddr = vaddr,
+		.size = size,
+		.paddr = *paddr,
+		.allocation = allocation,
+		.type = ALIEN_COPY,
+	};
+	pr_debug("%s: copying to pa: %pap\n", __func__, paddr);
+
+	return 0;
+}
+
+static unsigned xvp_get_region_vma_count(unsigned long virt,
+					 unsigned long size,
+					 struct vm_area_struct *vma)
+{
+	unsigned i;
+	struct mm_struct *mm = current->mm;
+
+	if (virt + size < virt)
+		return 0;
+	if (vma->vm_start > virt)
+		return 0;
+	if (vma->vm_start <= virt &&
+	    virt + size <= vma->vm_end)
+		return 1;
+	for (i = 2; ; ++i) {
+		struct vm_area_struct *next_vma = find_vma(mm, vma->vm_end);
+
+		if (!next_vma)
+			return 0;
+		if (next_vma->vm_start != vma->vm_end)
+			return 0;
+		vma = next_vma;
+		if (virt + size <= vma->vm_end)
+			return i;
+	}
+	return 0;
+}
+
+static long xrp_share_kernel(struct file *filp,
+			     unsigned long virt, unsigned long size,
+			     unsigned long flags, phys_addr_t *paddr,
+			     struct xrp_mapping *mapping)
+{
+	struct xvp_file *xvp_file = filp->private_data;
+	struct xvp *xvp = xvp_file->xvp;
+	phys_addr_t phys = __pa(virt);
+	long err = 0;
+
+	pr_debug("%s: sharing kernel-only buffer: %pap\n", __func__, &phys);
+	if (xrp_translate_to_dsp(&xvp->address_map, phys) ==
+	    XRP_NO_TRANSLATION) {
+		#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
+		mm_segment_t oldfs = get_fs();
+		set_fs(KERNEL_DS);
+		#else
+		mm_segment_t oldfs =force_uaccess_begin();
+		#endif
+
+		pr_debug("%s: untranslatable addr, making shadow copy\n",
+			 __func__);
+	  
+		err = xvp_copy_virt_to_phys(xvp_file, flags,
+					    virt, size, paddr,
+					    &mapping->alien_mapping);
+		#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
+		set_fs(oldfs);
+		#else
+		force_uaccess_end(oldfs);
+		#endif
+		mapping->type = XRP_MAPPING_ALIEN | XRP_MAPPING_KERNEL;
+	} else {
+		mapping->type = XRP_MAPPING_KERNEL;
+		*paddr = phys;
+
+		xrp_default_dma_sync_for_device(xvp, phys, size, flags);
+	}
+	pr_debug("%s: mapping = %p, mapping->type = %d\n",
+		 __func__, mapping, mapping->type);
+	return err;
+}
+
+static bool vma_needs_cache_ops(struct vm_area_struct *vma)
+{
+	pgprot_t prot = vma->vm_page_prot;
+
+	return pgprot_val(prot) != pgprot_val(pgprot_noncached(prot)) &&
+		pgprot_val(prot) != pgprot_val(pgprot_writecombine(prot));
+}
+
+/* Share blocks of memory, from host to IVP or back.
+ *
+ * When sharing to IVP return physical addresses in paddr.
+ * Areas allocated from the driver can always be shared in both directions.
+ * Contiguous 3rd party allocations need to be shared to IVP before they can
+ * be shared back.
+ */
+
+static long __xrp_share_block(struct file *filp,
+			      unsigned long virt, unsigned long size,
+			      unsigned long flags, phys_addr_t *paddr,
+			      struct xrp_mapping *mapping)
+{
+	phys_addr_t phys = ~0ul;
+	struct xvp_file *xvp_file = filp->private_data;
+	struct xvp *xvp = xvp_file->xvp;
+	struct mm_struct *mm = current->mm;
+	struct vm_area_struct *vma = find_vma(mm, virt);
+	bool do_cache = true;
+	long rc = -EINVAL;
+
+	if (!vma) {
+		pr_debug("%s: no vma for vaddr/size = 0x%08lx/0x%08lx\n",
+			 __func__, virt, size);
+		return -EINVAL;
+	}
+	/*
+	 * Region requested for sharing should be within single VMA.
+	 * That's true for the majority of cases, but sometimes (e.g.
+	 * sharing buffer in the beginning of .bss which shares a
+	 * file-mapped page with .data, followed by anonymous page)
+	 * region will cross multiple VMAs. Support it in the simplest
+	 * way possible: start with get_user_pages and use shadow copy
+	 * if that fails.
+	 */
+	switch (xvp_get_region_vma_count(virt, size, vma)) {
+	case 0:
+		pr_debug("%s: bad vma for vaddr/size = 0x%08lx/0x%08lx\n",
+			 __func__, virt, size);
+		pr_debug("%s: vma->vm_start = 0x%08lx, vma->vm_end = 0x%08lx\n",
+			 __func__, vma->vm_start, vma->vm_end);
+		return -EINVAL;
+	case 1:
+		break;
+	default:
+		pr_debug("%s: multiple vmas cover vaddr/size = 0x%08lx/0x%08lx\n",
+			 __func__, virt, size);
+		vma = NULL;
+		break;
+	}
+	/*
+	 * And it need to be allocated from the same file descriptor, or
+	 * at least from a file descriptor managed by the XRP.
+	 */
+	if (vma &&
+	    (vma->vm_file == filp || xrp_is_known_file(vma->vm_file))) {
+		struct xvp_file *vm_file = vma->vm_file->private_data;
+		struct xrp_allocation *xrp_allocation = vma->vm_private_data;
+
+		phys =  (vma->vm_pgoff << PAGE_SHIFT) +
+			virt - vma->vm_start;
+		pr_debug("%s: XRP allocation at 0x%08lx, paddr: %pap\n",
+			 __func__, virt, &phys);
+		/*
+		 * If it was allocated from a different XRP file it may belong
+		 * to a different device and not be directly accessible.
+		 * Check if it is.
+		 */
+		if (vma->vm_file != filp) {
+			const struct xrp_address_map_entry *address_map =
+				xrp_get_address_mapping(&xvp->address_map,
+							phys);
+
+			if (!address_map ||
+			    xrp_compare_address(phys + size - 1, address_map))
+				pr_debug("%s: untranslatable addr: %pap\n",
+					 __func__, &phys);
+			else
+				rc = 0;
+
+		} else {
+			rc = 0;
+		}
+
+		if (rc == 0) {
+			mapping->type = XRP_MAPPING_NATIVE;
+			mapping->native.xrp_allocation = xrp_allocation;
+			mapping->native.vaddr = virt;
+			xrp_allocation_get(xrp_allocation);
+			do_cache = vma_needs_cache_ops(vma);
+		}
+	}
+	if (rc < 0) {
+		struct xrp_alien_mapping *alien_mapping =
+			&mapping->alien_mapping;
+		unsigned long n_pages = PFN_UP(virt + size) - PFN_DOWN(virt);
+
+		/* Otherwise this is alien allocation. */
+		pr_debug("%s: non-XVP allocation at 0x%08lx\n",
+			 __func__, virt);
+
+		/*
+		 * A range can only be mapped directly if it is either
+		 * uncached or HW-specific cache operations can handle it.
+		 */
+		if (vma && vma->vm_flags & (VM_IO | VM_PFNMAP)) {
+			rc = xvp_pfn_virt_to_phys(xvp_file, vma,
+						  virt, size,
+						  &phys,
+						  alien_mapping);
+			if (rc == 0 && vma_needs_cache_ops(vma) &&
+			    !xrp_cacheable(xvp, PFN_DOWN(phys), n_pages)) {
+				pr_debug("%s: needs unsupported cache mgmt\n",
+					 __func__);
+				rc = -EINVAL;
+			}
+		} else {
+			#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
+			up_read(&mm->mmap_sem);
+			#else
+			up_read(&mm->mmap_lock);
+			#endif
+			rc = xvp_gup_virt_to_phys(xvp_file, virt,
+						  size, &phys,
+						  alien_mapping);
+			if (rc == 0 &&
+			    (!vma || vma_needs_cache_ops(vma)) &&
+			    !xrp_cacheable(xvp, PFN_DOWN(phys), n_pages)) {
+				pr_debug("%s: needs unsupported cache mgmt\n",
+					 __func__);
+				xrp_put_pages(phys, n_pages);
+				rc = -EINVAL;
+			}
+			#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
+			down_read(&mm->mmap_sem);
+			#else
+			down_read(&mm->mmap_lock);
+			#endif
+		}
+		if (rc == 0 && vma && !vma_needs_cache_ops(vma))
+			do_cache = false;
+
+		/*
+		 * If we couldn't share try to make a shadow copy.
+		 */
+		if (rc < 0) {
+			rc = xvp_copy_virt_to_phys(xvp_file, flags,
+						   virt, size, &phys,
+						   alien_mapping);
+			do_cache = false;
+		}
+
+		/* We couldn't share it. Fail the request. */
+		if (rc < 0) {
+			pr_debug("%s: couldn't map virt to phys\n",
+				 __func__);
+			return -EINVAL;
+		}
+
+		phys = alien_mapping->paddr +
+			virt - alien_mapping->vaddr;
+
+		mapping->type = XRP_MAPPING_ALIEN;
+	}
+
+	*paddr = phys;
+	pr_debug("%s: mapping = %p, mapping->type = %d,do_cache = %d\n",
+		 __func__, mapping, mapping->type,do_cache);
+
+	if (do_cache)
+		xrp_dma_sync_for_device(xvp,
+					virt, phys, size,
+					flags);
+	return 0;
+}
+
+static long xrp_writeback_alien_mapping(struct xvp_file *xvp_file,
+					struct xrp_alien_mapping *alien_mapping,
+					unsigned long flags)
+{
+	struct page *page;
+	size_t nr_pages;
+	size_t i;
+	long ret = 0;
+
+	switch (alien_mapping->type) {
+	case ALIEN_GUP:
+		xrp_dma_sync_for_cpu(xvp_file->xvp,
+				     alien_mapping->vaddr,
+				     alien_mapping->paddr,
+				     alien_mapping->size,
+				     flags);
+		pr_debug("%s: dirtying alien GUP @va = %p, pa = %pap\n",
+			 __func__, (void __user *)alien_mapping->vaddr,
+			 &alien_mapping->paddr);
+		page = pfn_to_page(__phys_to_pfn(alien_mapping->paddr));
+		nr_pages = PFN_UP(alien_mapping->vaddr + alien_mapping->size) -
+			PFN_DOWN(alien_mapping->vaddr);
+		for (i = 0; i < nr_pages; ++i)
+			SetPageDirty(page + i);
+		break;
+
+	case ALIEN_COPY:
+		pr_debug("%s: synchronizing alien copy @pa = %pap back to %p\n",
+			 __func__, &alien_mapping->paddr,
+			 (void __user *)alien_mapping->vaddr);
+		if (xrp_copy_user_from_phys(xvp_file->xvp,
+					    alien_mapping->vaddr,
+					    alien_mapping->size,
+					    alien_mapping->paddr,
+					    flags))
+			ret = -EINVAL;
+		break;
+
+	default:
+		break;
+	}
+	return ret;
+}
+
+/*
+ *
+ */
+static long __xrp_unshare_block(struct file *filp, struct xrp_mapping *mapping,
+				unsigned long flags)
+{
+	long ret = 0;
+	mm_segment_t oldfs ;
+
+	if (mapping->type & XRP_MAPPING_KERNEL)
+		#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
+		oldfs = get_fs();
+		set_fs(KERNEL_DS);
+		#else
+		oldfs =force_uaccess_begin();
+		#endif
+
+	switch (mapping->type & ~XRP_MAPPING_KERNEL) {
+	case XRP_MAPPING_NATIVE:
+		if (flags & XRP_FLAG_WRITE) {
+			struct xvp_file *xvp_file = filp->private_data;
+
+			xrp_dma_sync_for_cpu(xvp_file->xvp,
+					     mapping->native.vaddr,
+					     mapping->native.xrp_allocation->start,
+					     mapping->native.xrp_allocation->size,
+					     flags);
+
+		}
+		xrp_allocation_put(mapping->native.xrp_allocation);
+		break;
+
+	case XRP_MAPPING_ALIEN:
+		if (flags & XRP_FLAG_WRITE)
+			ret = xrp_writeback_alien_mapping(filp->private_data,
+							  &mapping->alien_mapping,
+							  flags);
+
+		xrp_alien_mapping_destroy(&mapping->alien_mapping);
+		break;
+
+	case XRP_MAPPING_KERNEL:
+		break;
+
+	default:
+		break;
+	}
+
+	if (mapping->type & XRP_MAPPING_KERNEL)
+		#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
+		set_fs(oldfs);
+		#else
+		force_uaccess_end(oldfs);
+		#endif
+
+	mapping->type = XRP_MAPPING_NONE;
+
+	return ret;
+}
+
+static long xrp_ioctl_free(struct file *filp,
+			   struct xrp_ioctl_alloc __user *p)
+{
+	struct mm_struct *mm = current->mm;
+	struct xrp_ioctl_alloc xrp_ioctl_alloc;
+	struct vm_area_struct *vma;
+	unsigned long start;
+
+	// pr_debug("%s: %p\n", __func__, p);
+	if (copy_from_user(&xrp_ioctl_alloc, p, sizeof(*p)))
+		return -EFAULT;
+
+	start = xrp_ioctl_alloc.addr;
+	// pr_debug("%s: virt_addr = 0x%08lx\n", __func__, start);
+	#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
+	down_read(&mm->mmap_sem);
+	#else
+	down_read(&mm->mmap_lock);
+	#endif
+	vma = find_vma(mm, start);
+
+	if (vma && vma->vm_file == filp &&
+	    vma->vm_start <= start && start < vma->vm_end) {
+		size_t size;
+
+		start = vma->vm_start;
+		size = vma->vm_end - vma->vm_start;
+		#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
+		up_read(&mm->mmap_sem);
+		#else
+		up_read(&mm->mmap_lock);		
+		#endif
+		pr_debug("%s: 0x%lx x %zu\n", __func__, start, size);
+		return vm_munmap(start, size);
+	}
+	// pr_debug("%s: no vma/bad vma for vaddr = 0x%08lx\n", __func__, start);
+	#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)	
+	up_read(&mm->mmap_sem);
+	#else
+	up_read(&mm->mmap_lock);
+	#endif
+
+	return -EINVAL;
+}
+
+static long xvp_complete_cmd_irq(struct xvp *xvp, struct xrp_comm *comm,
+				 bool (*cmd_complete)(struct xrp_comm *p))
+{
+	long timeout = firmware_command_timeout * HZ;
+
+	if (cmd_complete(comm))
+		return 0;
+	if (xrp_panic_check(xvp))
+		return -EBUSY;
+	do {
+		timeout = wait_for_completion_interruptible_timeout(&comm->completion,
+								    timeout);
+		if (cmd_complete(comm))
+			return 0;
+		if (xrp_panic_check(xvp))
+			return -EBUSY;
+	} while (timeout > 0);
+
+	if (timeout == 0)
+		return -EBUSY;
+	return timeout;
+}
+
+static long xvp_complete_cmd_poll(struct xvp *xvp, struct xrp_comm *comm,
+				  bool (*cmd_complete)(struct xrp_comm *p))
+{
+	unsigned long deadline = jiffies + firmware_command_timeout * HZ;
+
+	do {
+		if (cmd_complete(comm))
+			return 0;
+		if (xrp_panic_check(xvp))
+			return -EBUSY;
+		schedule();
+	} while (time_before(jiffies, deadline));
+
+	return -EBUSY;
+}
+
+struct xrp_request {
+	struct xrp_ioctl_queue ioctl_queue;
+	size_t n_buffers;
+	struct xrp_mapping *buffer_mapping;
+	struct xrp_dsp_buffer *dsp_buffer;
+	phys_addr_t in_data_phys;
+	phys_addr_t out_data_phys;
+	phys_addr_t dsp_buffer_phys;
+	union {
+		struct xrp_mapping in_data_mapping;
+		u8 in_data[XRP_DSP_CMD_INLINE_DATA_SIZE];
+	};
+	union {
+		struct xrp_mapping out_data_mapping;
+		u8 out_data[XRP_DSP_CMD_INLINE_DATA_SIZE];
+	};
+	union {
+		struct xrp_mapping dsp_buffer_mapping;
+		struct xrp_dsp_buffer buffer_data[XRP_DSP_CMD_INLINE_BUFFER_COUNT];
+	};
+	u8 nsid[XRP_DSP_CMD_NAMESPACE_ID_SIZE];
+};
+
+static void xrp_unmap_request_nowb(struct file *filp, struct xrp_request *rq)
+{
+	size_t n_buffers = rq->n_buffers;
+	size_t i;
+
+	if (rq->ioctl_queue.in_data_size > XRP_DSP_CMD_INLINE_DATA_SIZE)
+		__xrp_unshare_block(filp, &rq->in_data_mapping, 0);
+	if (rq->ioctl_queue.out_data_size > XRP_DSP_CMD_INLINE_DATA_SIZE)
+		__xrp_unshare_block(filp, &rq->out_data_mapping, 0);
+	for (i = 0; i < n_buffers; ++i)
+		__xrp_unshare_block(filp, rq->buffer_mapping + i, 0);
+	if (n_buffers > XRP_DSP_CMD_INLINE_BUFFER_COUNT)
+		__xrp_unshare_block(filp, &rq->dsp_buffer_mapping, 0);
+
+	if (n_buffers) {
+		kfree(rq->buffer_mapping);
+		if (n_buffers > XRP_DSP_CMD_INLINE_BUFFER_COUNT) {
+			kfree(rq->dsp_buffer);
+		}
+	}
+}
+
+static long xrp_unmap_request(struct file *filp, struct xrp_request *rq)
+{
+	size_t n_buffers = rq->n_buffers;
+	size_t i;
+	long ret = 0;
+	long rc;
+
+	if (rq->ioctl_queue.in_data_size > XRP_DSP_CMD_INLINE_DATA_SIZE)
+		__xrp_unshare_block(filp, &rq->in_data_mapping, XRP_FLAG_READ);
+	if (rq->ioctl_queue.out_data_size > XRP_DSP_CMD_INLINE_DATA_SIZE) {
+		rc = __xrp_unshare_block(filp, &rq->out_data_mapping,
+					 XRP_FLAG_WRITE);
+
+		if (rc < 0) {
+			pr_debug("%s: out_data could not be unshared\n",
+				 __func__);
+			ret = rc;
+		}
+	} else {
+		pr_debug("%s: out_data <%s> to copied\n",
+			__func__,rq->out_data);
+		if (copy_to_user((void __user *)(unsigned long)rq->ioctl_queue.out_data_addr,
+				 rq->out_data,
+				 rq->ioctl_queue.out_data_size)) {
+			pr_debug("%s: out_data could not be copied\n",
+				 __func__);
+			ret = -EFAULT;
+		}
+	}
+
+	if (n_buffers > XRP_DSP_CMD_INLINE_BUFFER_COUNT)
+		__xrp_unshare_block(filp, &rq->dsp_buffer_mapping,
+				    XRP_FLAG_READ_WRITE);
+
+	for (i = 0; i < n_buffers; ++i) {
+		rc = __xrp_unshare_block(filp, rq->buffer_mapping + i,
+					 rq->dsp_buffer[i].flags);
+		if (rc < 0) {
+			pr_debug("%s: buffer %zd could not be unshared\n",
+				 __func__, i);
+			ret = rc;
+		}
+	}
+
+	if (n_buffers) {
+		kfree(rq->buffer_mapping);
+		if (n_buffers > XRP_DSP_CMD_INLINE_BUFFER_COUNT) {
+			kfree(rq->dsp_buffer);
+		}
+		rq->n_buffers = 0;
+	}
+
+	return ret;
+}
+
+static long xrp_map_request(struct file *filp, struct xrp_request *rq,
+			    struct mm_struct *mm)
+{
+	struct xvp_file *xvp_file = filp->private_data;
+	struct xvp *xvp = xvp_file->xvp;
+	struct xrp_ioctl_buffer __user *buffer;
+	size_t n_buffers = rq->ioctl_queue.buffer_size /
+						sizeof(struct xrp_ioctl_buffer);
+
+	size_t i;
+	long ret = 0;
+
+	if ((rq->ioctl_queue.flags & XRP_QUEUE_FLAG_NSID) &&
+	    copy_from_user(rq->nsid,
+			   (void __user *)(unsigned long)rq->ioctl_queue.nsid_addr,
+			   sizeof(rq->nsid))) {
+		pr_debug("%s: nsid could not be copied\n ", __func__);
+		return -EINVAL;
+	}
+	rq->n_buffers = n_buffers;
+	if (n_buffers) {
+		rq->buffer_mapping =
+			kzalloc(n_buffers * sizeof(*rq->buffer_mapping),
+				GFP_KERNEL);
+		if (n_buffers > XRP_DSP_CMD_INLINE_BUFFER_COUNT) {
+			rq->dsp_buffer =
+				kmalloc(n_buffers * sizeof(*rq->dsp_buffer),
+					GFP_KERNEL);
+			if (!rq->dsp_buffer) {
+				kfree(rq->buffer_mapping);
+				return -ENOMEM;
+			}
+		} else {
+			rq->dsp_buffer = rq->buffer_data;
+		}
+	}
+	#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)	
+	down_read(&mm->mmap_sem);
+	#else
+	down_read(&mm->mmap_lock);
+	#endif
+
+	if (rq->ioctl_queue.in_data_size > XRP_DSP_CMD_INLINE_DATA_SIZE) {
+		ret = __xrp_share_block(filp, rq->ioctl_queue.in_data_addr,
+					rq->ioctl_queue.in_data_size,
+					XRP_FLAG_READ, &rq->in_data_phys,
+					&rq->in_data_mapping);
+		if(ret < 0) {
+			pr_debug("%s: in_data could not be shared\n",
+				 __func__);
+			goto share_err;
+		}
+	} else {
+		if (copy_from_user(rq->in_data,
+				   (void __user *)(unsigned long)rq->ioctl_queue.in_data_addr,
+				   rq->ioctl_queue.in_data_size)) {
+			pr_debug("%s: in_data could not be copied\n",
+				 __func__);
+			ret = -EFAULT;
+			goto share_err;
+		}
+	}
+
+	if (rq->ioctl_queue.out_data_size > XRP_DSP_CMD_INLINE_DATA_SIZE) {
+		ret = __xrp_share_block(filp, rq->ioctl_queue.out_data_addr,
+					rq->ioctl_queue.out_data_size,
+					XRP_FLAG_WRITE, &rq->out_data_phys,
+					&rq->out_data_mapping);
+		if (ret < 0) {
+			pr_debug("%s: out_data could not be shared\n",
+				 __func__);
+			goto share_err;
+		}
+	}
+
+	buffer = (void __user *)(unsigned long)rq->ioctl_queue.buffer_addr;
+
+	for (i = 0; i < n_buffers; ++i) {
+		struct xrp_ioctl_buffer ioctl_buffer;
+		phys_addr_t buffer_phys = ~0ul;
+
+		if (copy_from_user(&ioctl_buffer, buffer + i,
+				   sizeof(ioctl_buffer))) {
+			ret = -EFAULT;
+			goto share_err;
+		}
+		if (ioctl_buffer.flags & XRP_FLAG_READ_WRITE) {
+			ret = __xrp_share_block(filp, ioctl_buffer.addr,
+						ioctl_buffer.size,
+						ioctl_buffer.flags,
+						&buffer_phys,
+						rq->buffer_mapping + i);
+			if (ret < 0) {
+				pr_debug("%s: buffer %zd could not be shared\n",
+					 __func__, i);
+				goto share_err;
+			}
+		}
+
+		rq->dsp_buffer[i] = (struct xrp_dsp_buffer){
+			.flags = ioctl_buffer.flags,
+			.size = ioctl_buffer.size,
+			.addr = xrp_translate_to_dsp(&xvp->address_map,
+						     buffer_phys),
+		};
+	}
+
+	if (n_buffers > XRP_DSP_CMD_INLINE_BUFFER_COUNT) {
+		ret = xrp_share_kernel(filp, (unsigned long)rq->dsp_buffer,
+				       n_buffers * sizeof(*rq->dsp_buffer),
+				       XRP_FLAG_READ_WRITE, &rq->dsp_buffer_phys,
+				       &rq->dsp_buffer_mapping);
+		if(ret < 0) {
+			pr_debug("%s: buffer descriptors could not be shared\n",
+				 __func__);
+			goto share_err;
+		}
+	}
+share_err:
+	#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)	
+	up_read(&mm->mmap_sem);
+	#else
+	up_read(&mm->mmap_lock);
+	#endif
+	if (ret < 0)
+		xrp_unmap_request_nowb(filp, rq);
+	return ret;
+}
+
+static void xrp_fill_hw_request(struct xrp_dsp_cmd __iomem *cmd,
+				struct xrp_request *rq,
+				const struct xrp_address_map *map)
+{
+	xrp_comm_write32(&cmd->in_data_size, rq->ioctl_queue.in_data_size);
+	xrp_comm_write32(&cmd->out_data_size, rq->ioctl_queue.out_data_size);
+	xrp_comm_write32(&cmd->buffer_size,
+			 rq->n_buffers * sizeof(struct xrp_dsp_buffer));
+
+	if (rq->ioctl_queue.in_data_size > XRP_DSP_CMD_INLINE_DATA_SIZE)
+		xrp_comm_write32(&cmd->in_data_addr,
+				 xrp_translate_to_dsp(map, rq->in_data_phys));
+	else
+		xrp_comm_write(&cmd->in_data, rq->in_data,
+			       rq->ioctl_queue.in_data_size);
+
+	if (rq->ioctl_queue.out_data_size > XRP_DSP_CMD_INLINE_DATA_SIZE)
+		xrp_comm_write32(&cmd->out_data_addr,
+				 xrp_translate_to_dsp(map, rq->out_data_phys));
+
+	if (rq->n_buffers > XRP_DSP_CMD_INLINE_BUFFER_COUNT)
+		xrp_comm_write32(&cmd->buffer_addr,
+				 xrp_translate_to_dsp(map, rq->dsp_buffer_phys));
+	else
+		xrp_comm_write(&cmd->buffer_data, rq->dsp_buffer,
+			       rq->n_buffers * sizeof(struct xrp_dsp_buffer));
+
+	if (rq->ioctl_queue.flags & XRP_QUEUE_FLAG_NSID)
+		xrp_comm_write(&cmd->nsid, rq->nsid, sizeof(rq->nsid));
+
+#ifdef DEBUG
+	{
+		struct xrp_dsp_cmd dsp_cmd;
+		xrp_comm_read(cmd, &dsp_cmd, sizeof(dsp_cmd));
+		pr_debug("%s: cmd for DSP: %p: %*ph\n",
+			 __func__, cmd,
+			 (int)sizeof(dsp_cmd), &dsp_cmd);
+	}
+#endif
+
+	wmb();
+	/* update flags */
+	xrp_comm_write32(&cmd->flags,
+			 (rq->ioctl_queue.flags & ~XRP_DSP_CMD_FLAG_RESPONSE_VALID) |
+			 XRP_DSP_CMD_FLAG_REQUEST_VALID);
+}
+
+static long xrp_complete_hw_request(struct xrp_dsp_cmd __iomem *cmd,
+				    struct xrp_request *rq)
+{
+	u32 flags = xrp_comm_read32(&cmd->flags);
+
+	if (rq->ioctl_queue.out_data_size <= XRP_DSP_CMD_INLINE_DATA_SIZE)
+		xrp_comm_read(&cmd->out_data, rq->out_data,
+			      rq->ioctl_queue.out_data_size);
+	if (rq->n_buffers <= XRP_DSP_CMD_INLINE_BUFFER_COUNT)
+		xrp_comm_read(&cmd->buffer_data, rq->dsp_buffer,
+			      rq->n_buffers * sizeof(struct xrp_dsp_buffer));
+	xrp_comm_write32(&cmd->flags, 0);
+
+	return (flags & XRP_DSP_CMD_FLAG_RESPONSE_DELIVERY_FAIL) ? -ENXIO : 0;
+}
+
+static long xrp_ioctl_submit_sync(struct file *filp,
+				  struct xrp_ioctl_queue __user *p)
+{
+	struct xvp_file *xvp_file = filp->private_data;
+	struct xvp *xvp = xvp_file->xvp;
+	struct xrp_comm *queue = xvp->queue;
+	struct xrp_request xrp_rq, *rq = &xrp_rq;
+	long ret = 0;
+	bool went_off = false;
+
+	if (copy_from_user(&rq->ioctl_queue, p, sizeof(*p)))
+		return -EFAULT;
+
+	if (rq->ioctl_queue.flags & ~XRP_QUEUE_VALID_FLAGS) {
+		dev_dbg(xvp->dev, "%s: invalid flags 0x%08x\n",
+			__func__, rq->ioctl_queue.flags);
+		return -EINVAL;
+	}
+
+	if (xvp->n_queues > 1) {
+		unsigned n = (rq->ioctl_queue.flags & XRP_QUEUE_FLAG_PRIO) >>
+			XRP_QUEUE_FLAG_PRIO_SHIFT;
+
+		if (n >= xvp->n_queues)
+			n = xvp->n_queues - 1;
+		queue = xvp->queue_ordered[n];
+		dev_dbg(xvp->dev, "%s: priority: %d -> %d\n",
+			__func__, n, queue->priority);
+	}
+
+	ret = xrp_map_request(filp, rq, current->mm);
+	if (ret < 0)
+		return ret;
+
+	if (loopback < LOOPBACK_NOIO) {
+		int reboot_cycle;
+retry:
+		mutex_lock(&queue->lock);
+		reboot_cycle = atomic_read(&xvp->reboot_cycle);
+		if (reboot_cycle != atomic_read(&xvp->reboot_cycle_complete)) {
+			mutex_unlock(&queue->lock);
+			goto retry;
+		}
+
+		if (xvp->off) {
+			ret = -ENODEV;
+		} else {
+			xrp_fill_hw_request(queue->comm, rq, &xvp->address_map);
+
+			xrp_send_device_irq(xvp);
+
+			if (xvp->host_irq_mode) {
+				ret = xvp_complete_cmd_irq(xvp, queue,
+							   xrp_cmd_complete);
+			} else {
+				ret = xvp_complete_cmd_poll(xvp, queue,
+							    xrp_cmd_complete);
+			}
+
+			xrp_panic_check(xvp);
+
+			/* copy back inline data */
+			if (ret == 0) {
+				ret = xrp_complete_hw_request(queue->comm, rq);
+			} else if (ret == -EBUSY && firmware_reboot &&
+				   atomic_inc_return(&xvp->reboot_cycle) ==
+				   reboot_cycle + 1) {
+				int rc;
+				unsigned i;
+
+				dev_dbg(xvp->dev,
+					"%s: restarting firmware...\n",
+					 __func__);
+				for (i = 0; i < xvp->n_queues; ++i)
+					if (xvp->queue + i != queue)
+						mutex_lock(&xvp->queue[i].lock);
+				rc = xrp_boot_firmware(xvp);
+				atomic_set(&xvp->reboot_cycle_complete,
+					   atomic_read(&xvp->reboot_cycle));
+				for (i = 0; i < xvp->n_queues; ++i)
+					if (xvp->queue + i != queue)
+						mutex_unlock(&xvp->queue[i].lock);
+				if (rc < 0) {
+					ret = rc;
+					went_off = xvp->off;
+				}
+			}
+		}
+		mutex_unlock(&queue->lock);
+	}
+
+	if (ret == 0)
+		ret = xrp_unmap_request(filp, rq);
+	else if (!went_off)
+		xrp_unmap_request_nowb(filp, rq);
+	/*
+	 * Otherwise (if the DSP went off) all mapped buffers are leaked here.
+	 * There seems to be no way to recover them as we don't know what's
+	 * going on with the DSP; the DSP may still be reading and writing
+	 * this memory.
+	 */
+
+	return ret;
+}
+// static void xrp_dam_buf_free(struct xrp_allocation *xrp_allocation) 
+// {
+//     dev_dbg(xvp->dev,"%s: release dma_buf allocation n",
+// 					 __func__);
+//     kfree(xrp_allocation->pool);
+//     kfree(xrp_allocation);
+//     return
+// }
+
+// static void xrp_dam_buf_offset(struct xrp_allocation *xrp_allocation)
+// {
+//     return 0;
+// }
+// static const struct xrp_allocation_ops xrp_dma_buf_pool_ops = {
+// 	.alloc = NULL,
+// 	.free = xrp_dam_buf_free,
+// 	.free_pool = NULL,
+// 	.offset = xrp_dam_buf_offset,
+// };
+
+// static inline struct xrp_dma_buf_item * xrp_get_dma_buf_tail(struct xrp_dma_buf_item **list)
+// {
+//     struct xrp_dma_buf_item ** item;
+
+//     if(*list == NULLL)
+//         return NULL;
+
+//     for(item = list;(*item)->next != NULL;item= &(*item)->next)
+//     {
+//         ;
+//     }
+//     return *item;
+// }
+
+// static inline void xrp_dam_buf_add_item(struct xrp_dma_buf_item **list,struct xrp_dma_buf_item *entry)
+// {
+//     struct xrp_dma_buf_item * item = xrp_get_dma_buf_tail(list);
+//     if(item == NULL)
+//     {
+//         *list=entry;
+//     }
+//     else{
+//         item->next = entry;
+//     }
+// }
+
+// static inline int xrp_get_dma_buf_remove(struct xrp_dma_buf_item **list,struct xrp_dma_buf_item *entry)
+// {
+//     {
+//     struct xrp_dma_buf_item ** item;
+
+
+//     for(item = list;(*item)->next != NULL;item= &(*item)->next)
+//     {
+//         struct xrp_dma_buf_item *cur = *item;
+//         if();
+//     }
+// }
+static void xrp_release_dma_buf_item(struct xrp_dma_buf_item * item)
+{
+    spin_lock(&xrp_dma_buf_lock);
+    if(--item->ref==0)
+    {
+        list_del(&item->link);
+        kfree(item);
+    }
+    spin_unlock(&xrp_dma_buf_lock);
+}
+static long xrp_ioctl_dma_buf_import(struct file *filp,
+			                struct xrp_dma_buf __user *p)
+{
+    long ret;
+    struct xvp_file *xvp_file = filp->private_data;
+	struct xvp *xvp = xvp_file->xvp;
+    struct xrp_dma_buf  xrp_dma_buf;
+    struct dma_buf *dmabuf = NULL;
+    struct sg_table *sgt = NULL;
+    struct xrp_dma_buf_item *dma_buf_item=NULL;
+    struct xrp_dma_buf_item *temp=NULL;
+    struct dma_buf_attachment *attachment = NULL;
+    // struct xrp_allocation *xrp_allocation;
+    // struct xrp_private_pool *pool;
+    int npages = 0;
+    int i;
+    struct scatterlist *s;
+    unsigned int size = 0;
+
+    dev_dbg(xvp->dev,"%s: entry\n", __func__);
+	if (copy_from_user(&xrp_dma_buf, p, sizeof(*p)))
+    {
+		return -EFAULT;
+    }
+
+    dmabuf = dma_buf_get(xrp_dma_buf.fd);
+
+    if(!dmabuf)
+    {
+        return -EFAULT;
+    }
+
+    spin_lock(&xrp_dma_buf_lock);
+    list_for_each_entry(temp,&xvp->dma_buf_list, link)
+    {
+        if(temp->dmabuf == dmabuf)
+        {
+            dma_buf_item = temp;
+            dma_buf_item->ref++;
+            break;
+        } 
+    }
+
+   spin_unlock(&xrp_dma_buf_lock);
+
+    if(dma_buf_item == NULL)
+    {
+        dev_dbg(xvp->dev,
+					"%s: no exit same dma buf\n", __func__);
+        attachment = dma_buf_attach(dmabuf, xvp->dev);
+        if (!attachment)
+        {
+            goto One_Err;
+        }
+
+        sgt = dma_buf_map_attachment(attachment, xrp_dma_direction(xrp_dma_buf.flags));
+        if (!sgt)
+        {
+        goto One_Err;
+        }
+
+        dma_buf_item = kzalloc(sizeof(*dma_buf_item),GFP_KERNEL);
+        if(dma_buf_item == NULL)
+        {
+            goto One_Err;
+        }
+        
+        dma_buf_item->attachment = attachment;
+        dma_buf_item->dmabuf = dmabuf;
+        dma_buf_item->sgt = sgt;
+        dma_buf_item->ref = 1;
+        spin_lock(&xrp_dma_buf_lock);
+        list_add_tail(&dma_buf_item->link, &xvp->dma_buf_list);
+        spin_unlock(&xrp_dma_buf_lock);
+    }
+    else
+    {
+        dev_dbg(xvp->dev,
+					"%s: exit same dma buf\n", __func__);
+        attachment = dma_buf_item->attachment;
+        sgt = dma_buf_item->sgt;
+        spin_lock(&xrp_dma_buf_lock);
+        dma_buf_item->ref++;
+        spin_unlock(&xrp_dma_buf_lock);
+    }
+
+    if(sgt->nents != 1)
+    {
+        dev_dbg(xvp->dev,
+					"%s: sg table number (%d) is not 1, unspoort.\n",
+					 __func__,sgt->nents);
+        goto Two_Err;
+    }
+    /* Prepare page array. */
+    /* Get number of pages. */
+    for_each_sg(sgt->sgl, s, sgt->orig_nents, i)
+    {
+        npages += (sg_dma_len(s) + PAGE_SIZE - 1) / PAGE_SIZE;
+        size += sg_dma_len(s);
+    }
+ 
+    xrp_dma_buf.size = size;
+#ifdef VIDMEM_DMA_MAP
+    xrp_dma_buf. = sg_dma_address(s) + j * PAGE_SIZE;
+#else
+    // xrp_dma_buf.paddr = page_to_phys(nth_page(sg_page(s), 0));
+    xrp_dma_buf.paddr = sg_phys(sgt->sgl);
+#endif
+    // dev_dbg(xvp->dev,
+	// 				"%s: import dma-buf phy addr:0x%lx,size:%d\n",
+	// 				 __func__,xrp_dma_buf.paddr,xrp_dma_buf.size);
+//    xrp_allocation = kzalloc(sizeof(*xrp_allocation), GFP_KERNEL | __GFP_NORETRY);
+//    if(!xrp_allocation)
+//    {
+//        return -ENOMEM;
+//    }
+//    pool = kmalloc(sizeof(*pool), GFP_KERNEL);
+//    if(!pool)
+//    {
+//        kfree(xrp_allocation);
+//        return -ENOMEM;
+//    }
+//    *pool = (struct xrp_private_pool){
+// 		.pool = {
+// 			.ops = &xrp_dma_buf_pool_ops,
+// 		},
+// 		.start = xrp_dma_buf.paddr ,
+// 		.size = xrp_dma_buf.size,
+// 		.free_list = NULL,
+// 	};
+//    xrp_allocation->pool = pool;
+//    xrp_allocation->start = xrp_dma_buf.paddr;
+//    xrp_allocation->size = xrp_dma_buf.size;
+   
+//    xrp_allocation_queue(xvp_file, xrp_allocation);
+
+//    xrp_dma_buf.addr = vm_mmap(filp, 0, xrp_allocation->size,
+// 			PROT_READ | PROT_WRITE, MAP_SHARED,
+// 			xrp_dam_buf_offset(xrp_allocation));
+
+
+    struct file *export_filp = fget(xrp_dma_buf.fd);
+    xrp_dma_buf.addr = vm_mmap(export_filp, 0, xrp_dma_buf.size,
+			            PROT_READ | PROT_WRITE, MAP_SHARED,0); 
+    
+    fput(export_filp);
+    dev_dbg(xvp->dev,
+					"%s: import dma-buf phy addr:0x%lx,user addr:0x%lx,size:%d\n",
+					 __func__,xrp_dma_buf.paddr,xrp_dma_buf.addr,xrp_dma_buf.size);
+
+
+    if (copy_to_user(p, &xrp_dma_buf, sizeof(*p))) {
+        dma_buf_put(dmabuf);
+		vm_munmap(xrp_dma_buf.addr , xrp_dma_buf.size);
+		goto Two_Err;
+	}
+
+    return 0;
+
+Two_Err:
+    xrp_release_dma_buf_item(dma_buf_item);
+One_Err:
+    dma_buf_put(dmabuf);
+    return -EINVAL;
+}
+
+static struct xrp_dma_buf_item * xrp_search_dma_buf( struct list_head *list,int fd)
+{
+    struct xrp_dma_buf_item *loop;
+    struct xrp_dma_buf_item *dma_buf_item=NULL;
+    struct dma_buf *dmabuf = NULL;
+    // pr_debug("%s: fd %d,entry\n", __func__,fd);
+    dmabuf = dma_buf_get(fd);
+    spin_lock(&xrp_dma_buf_lock);
+    list_for_each_entry(loop,list, link)
+    {
+        if(loop->dmabuf == dmabuf)
+        {
+            dma_buf_item = loop;
+            break;
+        }
+
+    }
+    spin_unlock(&xrp_dma_buf_lock);
+    dma_buf_put(dmabuf);
+    pr_debug("%s: %p exit\n", __func__,fd,dma_buf_item);
+    return dma_buf_item;
+}
+
+static long xrp_ioctl_dma_buf_release(struct file *filp,
+			                        int __user *p)
+{
+    int fd;
+    struct xvp_file *xvp_file = filp->private_data;
+	struct xvp *xvp = xvp_file->xvp;
+    struct dma_buf *dmabuf = NULL;
+    struct xrp_dma_buf_item *dma_buf_item=NULL;
+    struct xrp_dma_buf_item *loop,*temp;
+    
+    if (copy_from_user(&fd, p, sizeof(*p)))
+    {
+		return -EFAULT;
+    }
+
+    // dmabuf = dma_buf_get(fd);
+    // spin_lock(&xrp_dma_buf_lock);
+    // list_for_each_entry_safe(loop, temp, &xvp->dma_buf_list, link)
+    // {
+    //     if(loop->dmabuf == dmabuf)
+    //     {
+    //         dma_buf_item = loop;
+    //         if((--dma_buf_item->ref)==0)
+    //             list_del(&dma_buf_item);
+    //         break;
+    //     }
+ 
+    // }
+    // spin_unlock(&xrp_dma_buf_lock);
+    // dma_buf_put(dmabuf);
+    dma_buf_item = xrp_search_dma_buf(&xvp->dma_buf_list,fd);
+    if(dma_buf_item == NULL)
+    {
+        return -EFAULT;
+    }
+    
+    dma_buf_unmap_attachment(dma_buf_item->attachment, dma_buf_item->sgt, DMA_BIDIRECTIONAL);
+    dma_buf_detach(dma_buf_item->dmabuf, dma_buf_item->attachment);
+    dma_buf_put(dma_buf_item->dmabuf);
+    xrp_release_dma_buf_item(dma_buf_item);
+    return 0;
+}
+
+
+static long xrp_ioctl_dma_buf_sync(struct file *filp,
+			                struct xrp_dma_buf __user *p)
+{
+    struct xvp_file *xvp_file = filp->private_data;
+	struct xvp *xvp = xvp_file->xvp;
+    struct xrp_dma_buf  xrp_dma_buf;
+    struct xrp_dma_buf_item *dma_buf_item=NULL;
+    if (copy_from_user(&xrp_dma_buf, p, sizeof(*p)))
+    {
+		return -EFAULT;
+    }
+
+    dma_buf_item = xrp_search_dma_buf(&xvp->dma_buf_list,xrp_dma_buf.fd);
+    if(dma_buf_item == NULL)
+    {
+        return -EFAULT;
+    }
+    switch(xrp_dma_buf.flags)
+    {   
+        case XRP_FLAG_READ:
+                    dma_sync_single_for_cpu(xvp->dev, phys_to_dma(xvp->dev, xrp_dma_buf.paddr), xrp_dma_buf.size,
+				                             xrp_dma_direction(xrp_dma_buf.flags));
+                   break;
+        case XRP_FLAG_WRITE:
+                    dma_sync_single_for_device(xvp->dev, phys_to_dma(xvp->dev,  xrp_dma_buf.paddr), xrp_dma_buf.size,
+				                             xrp_dma_direction(xrp_dma_buf.flags));
+                   break;
+        case XRP_FLAG_READ_WRITE:
+                    dma_sync_single_for_cpu(xvp->dev, phys_to_dma(xvp->dev,  xrp_dma_buf.paddr), xrp_dma_buf.size,
+				                             xrp_dma_direction(xrp_dma_buf.flags));
+                    dma_sync_single_for_device(xvp->dev, phys_to_dma(xvp->dev,  xrp_dma_buf.paddr),xrp_dma_buf.size,
+				                             xrp_dma_direction(xrp_dma_buf.flags));
+                    break;
+        default:
+            dev_dbg(xvp->dev,"%s: invalid type%x\n", __func__, xrp_dma_buf.flags);
+            return -EFAULT;
+    }
+    return 0;
+}
+static long xvp_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+{
+	long retval;
+
+	pr_debug("%s: %x\n", __func__, cmd);
+
+	switch(cmd){
+	case XRP_IOCTL_ALLOC:
+		retval = xrp_ioctl_alloc(filp,
+					 (struct xrp_ioctl_alloc __user *)arg);
+		break;
+
+	case XRP_IOCTL_FREE:
+		retval = xrp_ioctl_free(filp,
+					(struct xrp_ioctl_alloc __user *)arg);
+		break;
+
+	case XRP_IOCTL_QUEUE:
+	case XRP_IOCTL_QUEUE_NS:
+		retval = xrp_ioctl_submit_sync(filp,
+					       (struct xrp_ioctl_queue __user *)arg);
+		break;
+	case XRP_IOCTL_REPORT_CREATE:
+		retval = xrp_ioctl_alloc_report(filp,
+					       (struct xrp_ioctl_alloc __user *)arg);
+		break;
+	case XRP_IOCTL_REPORT_RELEASE:
+		retval = xrp_ioctl_release_report(filp,
+					(struct xrp_ioctl_alloc __user *)arg);
+		break;
+    case XRP_IOCTL_DMABUF_IMPORT:
+        retval = xrp_ioctl_dma_buf_import(filp,
+                    (struct xrp_dma_buf __user *)arg);
+        break;
+    case XRP_IOCTL_DMABUF_RELEASE:
+        retval = xrp_ioctl_dma_buf_release(filp,
+                                    (int __user *)arg);
+        break;
+    case XRP_IOCTL_DMABUF_SYNC:
+        retval = xrp_ioctl_dma_buf_sync(filp,
+                    (struct xrp_dma_buf __user *)arg);
+        break;
+	default:
+		retval = -EINVAL;
+		break;
+	}
+	return retval;
+}
+
+static void xvp_vm_open(struct vm_area_struct *vma)
+{
+	// pr_debug("%s\n", __func__);
+	xrp_allocation_get(vma->vm_private_data);
+}
+
+static void xvp_vm_close(struct vm_area_struct *vma)
+{
+	// pr_debug("%s\n", __func__);
+	xrp_allocation_put(vma->vm_private_data);
+}
+
+static const struct vm_operations_struct xvp_vm_ops = {
+	.open = xvp_vm_open,
+	.close = xvp_vm_close,
+};
+
+static int xvp_mmap(struct file *filp, struct vm_area_struct *vma)
+{
+	int err;
+	struct xvp_file *xvp_file = filp->private_data;
+	unsigned long pfn = vma->vm_pgoff;// + PFN_DOWN(xvp_file->xvp->pmem);
+	struct xrp_allocation *xrp_allocation;
+
+	xrp_allocation = xrp_allocation_dequeue(filp->private_data,
+						pfn << PAGE_SHIFT,
+						vma->vm_end - vma->vm_start);
+	if (xrp_allocation) {
+		struct xvp *xvp = xvp_file->xvp;
+		pgprot_t prot = vma->vm_page_prot;
+
+		if (!xrp_cacheable(xvp, pfn,
+				   PFN_DOWN(vma->vm_end - vma->vm_start))) {
+			prot = pgprot_writecombine(prot);
+			// prot = pgprot_noncached(prot);
+			vma->vm_page_prot = prot;
+			dev_dbg(xvp->dev,"%s cache atribution set \n", __func__);
+		}
+
+		err = remap_pfn_range(vma, vma->vm_start, pfn,
+				      vma->vm_end - vma->vm_start,
+				      prot);
+
+		vma->vm_private_data = xrp_allocation;
+		vma->vm_ops = &xvp_vm_ops;
+	} else {
+		pr_err("%s no valid xrp allocate for %lx:\n", __func__,pfn);
+		err = -EINVAL;
+	}
+
+	return err;
+}
+
+static int xvp_open(struct inode *inode, struct file *filp)
+{
+	struct xvp *xvp = container_of(filp->private_data,
+				       struct xvp, miscdev);
+	struct xvp_file *xvp_file;
+	int rc;
+
+	dev_dbg(xvp->dev,"%s\n", __func__);
+	rc = pm_runtime_get_sync(xvp->dev);
+	if (rc < 0)
+    {
+        dev_err(xvp->dev,"%s:pm_runtime_get_sync fail:%d\n", __func__,rc);
+        return rc;
+    }
+
+
+	xvp_file = devm_kzalloc(xvp->dev, sizeof(*xvp_file), GFP_KERNEL);
+	if (!xvp_file) {
+        dev_err(xvp->dev,"%s:malloc fail\n", __func__);
+		pm_runtime_put_sync(xvp->dev);
+		return -ENOMEM;
+	}
+
+	xvp_file->xvp = xvp;
+	spin_lock_init(&xvp_file->busy_list_lock);
+	filp->private_data = xvp_file;
+	xrp_add_known_file(filp);
+	return 0;
+}
+
+static int xvp_close(struct inode *inode, struct file *filp)
+{
+	struct xvp_file *xvp_file = filp->private_data;
+
+	pr_debug("%s\n", __func__);
+	xrp_report_fasync_release(filp);
+	xrp_remove_known_file(filp);
+	pm_runtime_put_sync(xvp_file->xvp->dev);
+	devm_kfree(xvp_file->xvp->dev, xvp_file);
+	return 0;
+}
+
+static inline int xvp_enable_dsp(struct xvp *xvp)
+{
+	if (loopback < LOOPBACK_NOMMIO &&
+	    xvp->hw_ops->enable)
+		return xvp->hw_ops->enable(xvp->hw_arg);
+	else
+		return 0;
+}
+
+static inline void xvp_disable_dsp(struct xvp *xvp)
+{
+	if (loopback < LOOPBACK_NOMMIO &&
+	    xvp->hw_ops->disable)
+		xvp->hw_ops->disable(xvp->hw_arg);
+}
+
+static inline void xvp_remove_proc(struct xvp *xvp)
+{
+    if( xvp->proc_dir)
+    {
+        if(xvp->panic_log)
+        {
+            xrp_remove_panic_log_proc(xvp->panic_log);
+            xvp->panic_log =NULL;
+        }
+        // remove_proc_entry(xvp->proc_dir,NULL);
+        proc_remove(xvp->proc_dir);
+    }
+}
+
+static inline void xrp_set_resetVec(struct xvp *xvp,u32 addr)
+{
+	if (loopback < LOOPBACK_NOMMIO &&
+	    xvp->hw_ops->set_reset_vector)
+		xvp->hw_ops->set_reset_vector(xvp->hw_arg,addr);
+}
+static inline void xrp_reset_dsp(struct xvp *xvp)
+{
+	if (loopback < LOOPBACK_NOMMIO &&
+	    xvp->hw_ops->reset)
+		xvp->hw_ops->reset(xvp->hw_arg);
+}
+
+static inline void xrp_halt_dsp(struct xvp *xvp)
+{
+	if (loopback < LOOPBACK_NOMMIO &&
+	    xvp->hw_ops->halt)
+		xvp->hw_ops->halt(xvp->hw_arg);
+}
+
+static inline void xrp_release_dsp(struct xvp *xvp)
+{
+	if (loopback < LOOPBACK_NOMMIO &&
+	    xvp->hw_ops->release)
+		xvp->hw_ops->release(xvp->hw_arg);
+}
+
+static int xrp_boot_firmware(struct xvp *xvp)
+{
+	int ret;
+	u32 fm_entry_point=0;
+	struct xrp_dsp_sync_v1 __iomem *shared_sync = xvp->comm;
+	// dev_dbg(xvp->dev,"%s",__func__);
+//#if 1      //LOAD_MODE_MANUAL  load release dsp by xplorer	
+    if(load_mode == LOAD_MODE_AUTO)
+    {
+        xrp_halt_dsp(xvp);
+        //xrp_reset_dsp(xvp);
+
+        if (xvp->firmware_name) {
+            if (loopback < LOOPBACK_NOFIRMWARE) {
+                ret = xrp_request_firmware(xvp,&fm_entry_point);
+                if (ret < 0)
+                    return ret;
+            }
+
+            if (loopback < LOOPBACK_NOIO) {
+                xrp_comm_write32(&shared_sync->sync, XRP_DSP_SYNC_IDLE);
+                mb();
+            }
+            // fm_entry_point = xrp_get_firmware_entry_addr(xvp);
+            dev_dbg(xvp->dev,"%s,firmware entry point :%x\n",__func__,fm_entry_point);
+            if(fm_entry_point)
+            {
+                xrp_set_resetVec(xvp,fm_entry_point);
+            }
+        }
+        xrp_reset_dsp(xvp);
+    }
+
+	xrp_release_dsp(xvp);
+//#endif
+	if (loopback < LOOPBACK_NOIO) {
+		ret = xrp_synchronize(xvp);
+		if (ret < 0) {
+			xrp_halt_dsp(xvp);
+			dev_err(xvp->dev,
+				"%s: couldn't synchronize with the DSP core\n",
+				__func__);
+			dev_err(xvp->dev,
+				"XRP device will not use the DSP until the driver is rebound to this device\n");
+			xvp->off = true;
+			return ret;
+		}
+	}
+	return 0;
+}
+
+static const struct file_operations xvp_fops = {
+	.owner  = THIS_MODULE,
+	.llseek = no_llseek,
+	.unlocked_ioctl = xvp_ioctl,
+#ifdef CONFIG_COMPAT
+	.compat_ioctl = xvp_ioctl,
+#endif
+	.mmap = xvp_mmap,
+	.open = xvp_open,
+	.fasync = xrp_report_fasync,
+	.release = xvp_close,
+};
+
+int xrp_runtime_suspend(struct device *dev)
+{
+	struct xvp *xvp = dev_get_drvdata(dev);
+
+	xrp_halt_dsp(xvp);
+    xrp_reset_dsp(xvp);
+	xvp_disable_dsp(xvp);
+    // release_firmware(xvp->firmware);
+	return 0;
+}
+EXPORT_SYMBOL(xrp_runtime_suspend);
+
+int xrp_runtime_resume(struct device *dev)
+{
+	struct xvp *xvp = dev_get_drvdata(dev);
+	unsigned i;
+	int ret = 0;
+
+	for (i = 0; i < xvp->n_queues; ++i)
+		mutex_lock(&xvp->queue[i].lock);
+
+	if (xvp->off)
+		goto out;
+	ret = xvp_enable_dsp(xvp);
+	if (ret < 0) {
+		dev_err(xvp->dev, "couldn't enable DSP\n");
+		goto out;
+	}
+
+	ret = xrp_boot_firmware(xvp);
+	if (ret < 0)
+		xvp_disable_dsp(xvp);
+
+out:
+	for (i = 0; i < xvp->n_queues; ++i)
+		mutex_unlock(&xvp->queue[i].lock);
+
+	return ret;
+}
+EXPORT_SYMBOL(xrp_runtime_resume);
+
+static int xrp_init_regs_v0(struct platform_device *pdev, struct xvp *xvp,int mem_idx)
+{
+    struct resource res;
+	struct device_node *np;
+    int ret = 0;
+	np = of_parse_phandle(pdev->dev.of_node, "memory-region", 0);
+	if (!np) {
+		dev_err(&pdev->dev, "No memory-region specified\n");
+		return -EINVAL;
+	}
+	ret = of_address_to_resource(np, 0, &res);
+    dev_dbg(xvp->dev,"%s:dsp runing addr 0x%llx,size:0x%x\n", __func__,
+		     res.start,resource_size(&res));
+
+
+    ret = of_address_to_resource(np, 1, &res);
+    if (ret)
+    {
+        dev_dbg(xvp->dev,"%s:get comm region fail\n", __func__);
+		return -ENODEV;
+    }
+
+	xvp->comm_phys = res.start;
+	xvp->comm = devm_ioremap_resource(&pdev->dev, &res);
+    dev_dbg(xvp->dev,"%s:xvp->comm =0x%p, phy_addr base=0x%llx\n", __func__,
+		     xvp->comm, xvp->comm_phys);
+	// mem = platform_get_resource(pdev, IORESOURCE_MEM, mem_idx);
+
+    ret = of_address_to_resource(np, 2, &res);
+    if(ret)
+    {
+        dev_dbg(xvp->dev,"%s:get paic region fail:%d\n", __func__,ret);
+    }else
+    {
+        xvp->panic_phy = res.start;
+        xvp->panic = devm_ioremap_resource(&pdev->dev, &res);
+        xvp->panic_size = resource_size(&res);
+        if(xvp->panic)
+        {
+            dev_dbg(xvp->dev,"%s:panic=0x%p, panic phy base=0x%llx,size:%d\n", __func__,
+                    xvp->panic, xvp->panic_phy,xvp->panic_size);
+        }else
+        {
+            dev_warn(xvp->dev,"%s:get paic region fail\n", __func__);
+        }
+    }
+
+	ret = of_address_to_resource(np, 3, &res);
+    if (ret)
+    {
+        dev_dbg(xvp->dev,"%s:get memory pool region fail\n", __func__);
+		return -ENODEV;
+    }
+	xvp->pmem = res.start;
+	xvp->shared_size = resource_size(&res);
+    dev_dbg(xvp->dev,"%s,memory pool phy_addr base=0x%llx,size:0x%x\n", __func__,
+		    xvp->pmem, xvp->shared_size);
+	return xrp_init_private_pool(&xvp->pool, xvp->pmem,
+				     xvp->shared_size);
+}
+
+static int xrp_init_regs_v1(struct platform_device *pdev, struct xvp *xvp,int mem_idx)
+{
+	struct resource *mem;
+	struct resource r;
+
+	mem = platform_get_resource(pdev, IORESOURCE_MEM, mem_idx);
+	if (!mem)
+		return -ENODEV;
+
+	if (resource_size(mem) < 2 * PAGE_SIZE) {
+		dev_err(xvp->dev,
+			"%s: shared memory size is too small\n",
+			__func__);
+		return -ENOMEM;
+	}
+
+	xvp->comm_phys = mem->start;
+	xvp->pmem = mem->start + PAGE_SIZE;
+	xvp->shared_size = resource_size(mem) - PAGE_SIZE;
+
+	r = *mem;
+	r.end = r.start + PAGE_SIZE;
+	xvp->comm = devm_ioremap_resource(&pdev->dev, &r);
+	return xrp_init_private_pool(&xvp->pool, xvp->pmem,
+				     xvp->shared_size);
+}
+
+static bool xrp_translate_base_mimo_to_dsp(struct xvp *xvp)
+{
+
+    if(!xvp->hw_ops->get_base_mimo || !xvp->hw_ops->get_hw_sync_data )
+	{
+		return true;
+	}
+
+
+	phys_addr_t mimo_addr = xvp->hw_ops->get_base_mimo(xvp->hw_arg);
+   
+	u32 device_mimo_addr  = xrp_translate_to_dsp(&xvp->address_map, mimo_addr);
+	if(device_mimo_addr==XRP_NO_TRANSLATION)
+	{
+		dev_err(xvp->dev,
+			"%s: 0x%x translate to dsp address fail\n",
+			__func__,mimo_addr);
+		return false;
+	}
+	xvp->hw_ops->update_device_base(xvp->hw_arg,device_mimo_addr);
+	dev_dbg(xvp->dev,
+	"%s: Base mimo translate to dsp address \n",__func__);
+	return true;
+
+}
+
+static int xrp_init_regs_cma(struct platform_device *pdev, struct xvp *xvp,int mem_idx)
+{
+	dma_addr_t comm_phys;
+
+	if (of_reserved_mem_device_init(xvp->dev) < 0)
+		return -ENODEV;
+
+	xvp->comm = dma_alloc_attrs(xvp->dev, PAGE_SIZE, &comm_phys,
+				    GFP_KERNEL, 0);
+	if (!xvp->comm)
+		return -ENOMEM;
+
+	xvp->comm_phys = dma_to_phys(xvp->dev, comm_phys);
+	return xrp_init_cma_pool(&xvp->pool, xvp->dev);
+}
+
+static int compare_queue_priority(const void *a, const void *b)
+{
+	const void * const *ppa = a;
+	const void * const *ppb = b;
+	const struct xrp_comm *pa = *ppa, *pb = *ppb;
+
+	if (pa->priority == pb->priority)
+		return 0;
+	else
+		return pa->priority < pb->priority ? -1 : 1;
+}
+
+static long xrp_init_common(struct platform_device *pdev,
+			    enum xrp_init_flags init_flags,
+			    const struct xrp_hw_ops *hw_ops, void *hw_arg,
+				int mem_idx,
+			    int (*xrp_init_regs)(struct platform_device *pdev,
+						 struct xvp *xvp,int mem_idx))
+{
+	long ret;
+	char nodename[sizeof("xvp") + 3 * sizeof(int)];
+	struct xvp *xvp;
+	int nodeid;
+	unsigned i;
+    u32 value;
+    char dir_name[32];
+	xvp = devm_kzalloc(&pdev->dev, sizeof(*xvp), GFP_KERNEL);
+	if (!xvp) {
+		ret = -ENOMEM;
+		goto err;
+	}
+    xvp->reporter = NULL;
+	xvp->dev = &pdev->dev;
+	xvp->hw_ops = hw_ops;
+	xvp->hw_arg = hw_arg;
+	if (init_flags & XRP_INIT_USE_HOST_IRQ)
+		xvp->host_irq_mode = true;
+	platform_set_drvdata(pdev, xvp);
+
+	ret = xrp_init_regs(pdev, xvp,mem_idx);
+	if (ret < 0)
+		goto err;
+
+	dev_dbg(xvp->dev,"%s: comm = %pap/%p\n", __func__, &xvp->comm_phys, xvp->comm);
+	dev_dbg(xvp->dev,"%s: xvp->pmem = %pap\n", __func__, &xvp->pmem);
+	// writel(0xdeadbeef,xvp->comm+0x4);
+    // value = readl(xvp->comm+0x4);
+	// pr_debug("offset=04, value is:0x%08x\n",value);
+
+	ret = xrp_init_address_map(xvp->dev, &xvp->address_map);
+	if (ret < 0)
+		goto err_free_pool;
+
+	if(false ==xrp_translate_base_mimo_to_dsp(xvp))
+	{
+		goto err_free_map;
+	}
+	ret = device_property_read_u32_array(xvp->dev, "queue-priority",
+					     NULL, 0);
+	if (ret > 0) {
+		xvp->n_queues = ret;
+		xvp->queue_priority = devm_kmalloc(&pdev->dev,
+						   ret * sizeof(u32),
+						   GFP_KERNEL);
+		if (xvp->queue_priority == NULL)
+			goto err_free_pool;
+		ret = device_property_read_u32_array(xvp->dev,
+						     "queue-priority",
+						     xvp->queue_priority,
+						     xvp->n_queues);
+		if (ret < 0)
+			goto err_free_pool;
+		dev_dbg(xvp->dev,
+			"multiqueue (%d) configuration, queue priorities:\n",
+			xvp->n_queues);
+		for (i = 0; i < xvp->n_queues; ++i)
+			dev_dbg(xvp->dev, "  %d\n", xvp->queue_priority[i]);
+	} else {
+		xvp->n_queues = 1;
+	}
+	xvp->queue = devm_kmalloc(&pdev->dev,
+				  xvp->n_queues * sizeof(*xvp->queue),
+				  GFP_KERNEL);
+	xvp->queue_ordered = devm_kmalloc(&pdev->dev,
+					  xvp->n_queues * sizeof(*xvp->queue_ordered),
+					  GFP_KERNEL);
+	if (xvp->queue == NULL ||
+	    xvp->queue_ordered == NULL)
+		goto err_free_pool;
+
+	for (i = 0; i < xvp->n_queues; ++i) {
+		mutex_init(&xvp->queue[i].lock);
+		xvp->queue[i].comm = xvp->comm + XRP_DSP_CMD_STRIDE * i;
+		init_completion(&xvp->queue[i].completion);
+		if (xvp->queue_priority)
+			xvp->queue[i].priority = xvp->queue_priority[i];
+		xvp->queue_ordered[i] = xvp->queue + i;
+	}
+	sort(xvp->queue_ordered, xvp->n_queues, sizeof(*xvp->queue_ordered),
+	     compare_queue_priority, NULL);
+	if (xvp->n_queues > 1) {
+		dev_dbg(xvp->dev, "SW -> HW queue priority mapping:\n");
+		for (i = 0; i < xvp->n_queues; ++i) {
+			dev_dbg(xvp->dev, "  %d -> %d\n",
+				i, xvp->queue_ordered[i]->priority);
+		}
+	}
+
+	ret = device_property_read_string(xvp->dev, "firmware-name",
+					  &xvp->firmware_name);
+	if (ret == -EINVAL || ret == -ENODATA) {
+		dev_dbg(xvp->dev,
+			"no firmware-name property, not loading firmware\n");
+	} else if (ret < 0) {
+		dev_err(xvp->dev, "invalid firmware name (%ld)\n", ret);
+		goto err_free_map;
+	}
+
+  	nodeid = ida_simple_get(&xvp_nodeid, 0, 0, GFP_KERNEL);
+	if (nodeid < 0) {
+		ret = nodeid;
+		goto err_free_map;
+	}
+
+    sprintf(dir_name,"dsp%d_proc",nodeid);
+    xvp->proc_dir = proc_mkdir(dir_name, NULL);
+    if (NULL != xvp->proc_dir)
+    {
+        xvp->panic_log = xrp_create_panic_log_proc(xvp->proc_dir,xvp->panic,xvp->panic_size);
+    }
+    else
+    {
+        dev_err(xvp->dev, "create %s fail\n", dir_name);
+        goto err_free_id;
+    }
+	pm_runtime_enable(xvp->dev);
+	if (!pm_runtime_enabled(xvp->dev)) {
+		ret = xrp_runtime_resume(xvp->dev);
+		if (ret)
+			goto err_pm_disable;
+	}else
+    {
+        ret = xrp_runtime_resume(xvp->dev);
+		if (ret)
+			goto err_proc_remove;
+        // xvp_enable_dsp(xvp);
+        xrp_runtime_suspend(xvp->dev);
+    }
+
+	xvp->nodeid = nodeid;
+	sprintf(nodename, "xvp%u", nodeid);
+
+	xvp->miscdev = (struct miscdevice){
+		.minor = MISC_DYNAMIC_MINOR,
+		.name = devm_kstrdup(&pdev->dev, nodename, GFP_KERNEL),
+		.nodename = devm_kstrdup(&pdev->dev, nodename, GFP_KERNEL),
+		.fops = &xvp_fops,
+	};
+
+	ret = misc_register(&xvp->miscdev);
+	if (ret < 0)
+		goto err_pm_disable;
+    // xrp_device_heartbeat_init(xvp);
+    
+    INIT_LIST_HEAD(&xvp->dma_buf_list);
+
+
+	return PTR_ERR(xvp);
+
+
+err_pm_disable:
+	pm_runtime_disable(xvp->dev);
+err_proc_remove:
+    xvp_remove_proc(xvp);
+err_free_id:
+	ida_simple_remove(&xvp_nodeid, nodeid);
+err_free_map:
+	xrp_free_address_map(&xvp->address_map);
+err_free_pool:
+	xrp_free_pool(xvp->pool);
+	if (xvp->comm_phys && !xvp->pmem) {
+		dma_free_attrs(xvp->dev, PAGE_SIZE, xvp->comm,
+			       phys_to_dma(xvp->dev, xvp->comm_phys), 0);
+	}
+err:
+	dev_err(&pdev->dev, "%s: ret = %ld\n", __func__, ret);
+	return ret;
+}
+
+typedef long xrp_init_function(struct platform_device *pdev,
+			       enum xrp_init_flags flags,
+			       const struct xrp_hw_ops *hw_ops, void *hw_arg,int mem_idx);
+
+xrp_init_function xrp_init;
+long xrp_init(struct platform_device *pdev, enum xrp_init_flags flags,
+	      const struct xrp_hw_ops *hw_ops, void *hw_arg,int mem_idx)
+{
+	return xrp_init_common(pdev, flags, hw_ops, hw_arg, mem_idx,xrp_init_regs_v0);
+}
+EXPORT_SYMBOL(xrp_init);
+
+xrp_init_function xrp_init_v1;
+long xrp_init_v1(struct platform_device *pdev, enum xrp_init_flags flags,
+		 const struct xrp_hw_ops *hw_ops, void *hw_arg,int mem_idx)
+{
+	return xrp_init_common(pdev, flags, hw_ops, hw_arg, mem_idx,xrp_init_regs_v1);
+}
+EXPORT_SYMBOL(xrp_init_v1);
+
+xrp_init_function xrp_init_cma;
+long xrp_init_cma(struct platform_device *pdev, enum xrp_init_flags flags,
+		  const struct xrp_hw_ops *hw_ops, void *hw_arg,int mem_idx)
+{
+	return xrp_init_common(pdev, flags, hw_ops, hw_arg, mem_idx,xrp_init_regs_cma);
+}
+EXPORT_SYMBOL(xrp_init_cma);
+
+int xrp_deinit(struct platform_device *pdev)
+{
+	struct xvp *xvp = platform_get_drvdata(pdev);
+
+	pm_runtime_disable(xvp->dev);
+	if (!pm_runtime_status_suspended(xvp->dev))
+		xrp_runtime_suspend(xvp->dev);
+    // xvp_clear_dsp(xvp);
+    xvp_remove_proc(xvp);
+	dev_dbg(xvp->dev,"%s:phase 1\n",__func__);
+	misc_deregister(&xvp->miscdev);
+	dev_dbg(xvp->dev,"%s:phase 2\n",__func__);
+	// release_firmware(xvp->firmware);
+	// dev_dbg(xvp->dev,"%s:phase 3\n",__func__);
+	xrp_free_pool(xvp->pool);
+	if (xvp->comm_phys && !xvp->pmem) {
+		dma_free_attrs(xvp->dev, PAGE_SIZE, xvp->comm,
+			       phys_to_dma(xvp->dev, xvp->comm_phys), 0);
+	}
+	dev_dbg(xvp->dev,"%s:phase 3\n",__func__);
+	xrp_free_address_map(&xvp->address_map);
+	dev_dbg(xvp->dev,"%s:phase 4\n",__func__);
+	if(!ida_is_empty(&xvp_nodeid))
+	{
+		ida_simple_remove(&xvp_nodeid, xvp->nodeid);
+		dev_dbg(xvp->dev,"%s:phase 5\n",__func__);
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(xrp_deinit);
+
+int xrp_deinit_hw(struct platform_device *pdev, void **hw_arg)
+{
+	if (hw_arg) {
+		struct xvp *xvp = platform_get_drvdata(pdev);
+		*hw_arg = xvp->hw_arg;
+	}
+	return xrp_deinit(pdev);
+}
+EXPORT_SYMBOL(xrp_deinit_hw);
+static void *get_hw_sync_data(void *hw_arg, size_t *sz)
+{
+	void *p = kzalloc(64, GFP_KERNEL);
+
+	*sz = 64;
+	return p;
+}
+
+static const struct xrp_hw_ops hw_ops = {
+	.get_hw_sync_data = get_hw_sync_data,
+};
+
+#ifdef CONFIG_OF
+static const struct of_device_id xrp_of_match[] = {
+	{
+		.compatible = "cdns,xrp",
+		.data = xrp_init,
+	}, {
+		.compatible = "cdns,xrp,v1",
+		.data = xrp_init_v1,
+	}, {
+		.compatible = "cdns,xrp,cma",
+		.data = xrp_init_cma,
+	}, {},
+};
+MODULE_DEVICE_TABLE(of, xrp_of_match);
+#endif
+
+#ifdef CONFIG_ACPI
+static const struct acpi_device_id xrp_acpi_match[] = {
+	{ "CXRP0001", 0 },
+	{ },
+};
+MODULE_DEVICE_TABLE(acpi, xrp_acpi_match);
+#endif
+
+static int xrp_probe(struct platform_device *pdev)
+{
+	long ret = -EINVAL;
+
+#ifdef CONFIG_OF
+	const struct of_device_id *match;
+
+	match = of_match_device(xrp_of_match, &pdev->dev);
+	if (match) {
+		xrp_init_function *init = match->data;
+
+		ret = init(pdev, 0, &hw_ops, NULL,0);
+		return IS_ERR_VALUE(ret) ? ret : 0;
+	} else {
+		pr_debug("%s: no OF device match found\n", __func__);
+	}
+#endif
+#ifdef CONFIG_ACPI
+	ret = xrp_init_v1(pdev, 0, &hw_ops, NULL,2);
+	if (!IS_ERR_VALUE(ret)) {
+		struct xrp_address_map_entry *entry;
+		struct xvp *xvp = ERR_PTR(ret);
+
+		ret = 0;
+		/*
+		 * On ACPI system DSP can currently only access
+		 * its own shared memory.
+		 */
+		entry = xrp_get_address_mapping(&xvp->address_map,
+						xvp->comm_phys);
+		if (entry) {
+			entry->src_addr = xvp->comm_phys;
+			entry->dst_addr = (u32)xvp->comm_phys;
+			entry->size = (u32)xvp->shared_size + PAGE_SIZE;
+		} else {
+			dev_err(xvp->dev,
+				"%s: couldn't find mapping for shared memory\n",
+				__func__);
+			ret = -EINVAL;
+		}
+	}
+#endif
+	return ret;
+}
+
+static int xrp_remove(struct platform_device *pdev)
+{
+	return xrp_deinit(pdev);
+}
+
+static const struct dev_pm_ops xrp_pm_ops = {
+	SET_RUNTIME_PM_OPS(xrp_runtime_suspend,
+			   xrp_runtime_resume, NULL)
+};
+
+static struct platform_driver xrp_driver = {
+	.probe   = xrp_probe,
+	.remove  = xrp_remove,
+	.driver  = {
+		.name = DRIVER_NAME,
+		.of_match_table = of_match_ptr(xrp_of_match),
+		.acpi_match_table = ACPI_PTR(xrp_acpi_match),
+		.pm = &xrp_pm_ops,
+	},
+};
+
+module_platform_driver(xrp_driver);
+
+MODULE_AUTHOR("T-HEAD");
+MODULE_DESCRIPTION("XRP: Linux device driver for Xtensa Remote Processing");
+MODULE_LICENSE("Dual MIT/GPL");

+ 68 - 0
driver/xrp-user/Makefile

@@ -0,0 +1,68 @@
+##
+ # Copyright (C) 2021 Alibaba Group Holding Limited
+ #
+ # This program is free software; you can redistribute it and/or modify
+ # it under the terms of the GNU General Public License version 2 as
+ # published by the Free Software Foundation.
+##
+
+
+# INCLUDES = -I../../driver/isp -I../../common
+
+TARGET = libdsp.so
+
+CFLAGS = -O2 -Wall -g -lm -lpthread
+CFLAGS:=-fPIC
+LDFLAGS:=-shared -fpic
+LDFLAGS+=--whole-archive 
+LDFLAGS += -Lxrp-host -lxrp_linux
+LDFLAGS += -Lxrp-common -lxrp-common
+LDFLAGS+=--no-whole-archive
+# LDFLAGS += -Lxrp-host -lxrp_linux
+# LDFLAGS += -Lxrp-common -lxrp-common
+# LIB_PATH += -Lxrp-host
+# LIB_PATH += -Lxrp-common 
+# LIBS += -lpthread
+# LIBS += -lxrp_linux
+# LIBS += -lxrp-common
+# USE_THREADS = 
+
+
+xrp_SRCS += dsp-ps/csi_dsp_core.c
+# xrp_SRCS += dsp-ps/dsp_ps_core.c
+xrp_SRCS += dsp-ps/csi_dsp_helper.c
+xrp_SRCS += dsp-ps/dsp_common.c
+
+INCLUDES = -I$(CURDIR) -Ihosted -Iinclude -Ithread-pthread -I../xrp-common -I../../xrp-kernel
+# object files will be generated from .c sourcefiles
+xrp_OBJS = $(notdir $(xrp_SRCS:.c=.o))
+
+all: $(TARGET)
+
+XRP_COMMON := xrp-common
+$(XRP_COMMON): DUMMY
+	make -C $(XRP_COMMON)
+
+XRP_LINUX:=xrp-host
+$(XRP_LINUX): DUMMY
+	make -C $(XRP_LINUX)
+
+DUMMY:
+
+
+$(xrp_OBJS): $(xrp_SRCS)
+	$(CC) -c $(CFLAGS) $(INCLUDES)  $(xrp_SRCS)
+
+
+$(TARGET): $(xrp_OBJS) $(XRP_COMMON) $(XRP_LINUX)
+	$(LD)  $(LDFLAGS) -o $(TARGET) $(xrp_OBJS) $(LIB_PATH) $(LIBS)
+
+clean:
+	rm -f *.o
+	rm -f *.so
+	rm -rf output
+
+install:
+
+.PHONY: clean all prepare common
+

+ 1363 - 0
driver/xrp-user/dsp-ps/csi_dsp_core.c

@@ -0,0 +1,1363 @@
+/*
+ * Copyright (c) 2021 Alibaba Group. All rights reserved.
+ * License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ */
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include "../include/xrp_api.h"
+#include "../include/dsp_ps_ns.h"
+#include "../include/csi_dsp_api.h"
+#include "csi_dsp_core.h"
+#include "dsp_common.h"
+// #include "../xrp-host/xrp_host_common.h"
+
+#define DEV_ID  0
+
+#define DSP_INVALID_ITEM   0xdead
+int csi_dsp_cmd_send(const struct xrp_queue *queue,int cmd_type,void * cmd_payload,
+                                    size_t payload_size,void *resp, size_t resp_size,struct xrp_buffer_group *buffer_group)
+{
+    enum xrp_status status;
+    size_t cmd_size= payload_size+4;
+    s_cmd_t *cmd=(s_cmd_t *)malloc(cmd_size);
+    DSP_PRINT(DEBUG,"dsp common cmd send %d\n",cmd_type);
+    if(!cmd)
+    {
+        DSP_PRINT(WARNING,"malloc fail\n",__func__);
+        return -1;
+    }
+    cmd->cmd=cmd_type;
+    if(payload_size>0)
+    {
+        memcpy(cmd->data,cmd_payload,payload_size);
+    }
+
+    xrp_run_command_sync(queue,cmd,cmd_size,resp,resp_size,buffer_group,&status);
+    if(status!=XRP_STATUS_SUCCESS)
+    {
+        DSP_PRINT(WARNING,"cmd fail\n",__func__);
+        free(cmd);
+        return -1;
+    }
+    free(cmd);
+    return 0;
+
+}
+
+
+/*********************************/
+static int dsp_register_report_item_to_dsp(struct csi_dsp_task_handler *task)
+{
+    int resp =0;
+    struct report_config_msg config;
+    if(!task || task->report_id<0 || !task->instance || !task->instance->comm_queue)
+    {
+        DSP_PRINT(ERROR,"param check fail\n");
+        return -1;
+    }
+    config.report_id=task->report_id;
+    memcpy(config.task,task->task_ns,TASK_NAME_LINE);
+    if(csi_dsp_cmd_send(task->instance->comm_queue,PS_CMD_REPORT_CONFIG,&config,sizeof(struct report_config_msg),&resp,sizeof(resp),NULL))
+    {
+        DSP_PRINT(ERROR,"register_report_item_to_dsp fail\n");
+        return -1;
+    }
+    return 0;
+}
+
+// int csi_dsp_register_report_fix_id(struct csi_dsp_task_handler *task,
+//                             int (*cb)(void*context,void*data),
+//                             void* context,
+//                             size_t data_size)
+// {
+//     if(task->report_id<0)
+//     {
+//         printf("report id is invalid\n");
+//         return -1;
+//     }
+//     if(xrp_add_report_item_with_id(task->instance->report_impl,
+// 								        cb,task->report_id,context,data_size)<0)
+//     {
+//         return -1;
+//     }
+//     if(dsp_register_report_item_to_dsp(task))
+//     {
+//         return -1;
+//     }
+//     printf("new reprot %d is created and register to DSP\n",task->report_id);
+//     return 0;
+
+// }
+
+
+int csi_dsp_delete_instance(void* dsp)
+{   
+    if(!dsp)
+        return 0;
+    // printf("%s,entry\n",__FUNCTION__);
+    struct csi_dsp_instance *instance = (struct csi_dsp_instance *)dsp;
+    csi_dsp_disable_heartbeat_check();
+    xrp_release_queue(instance->comm_queue);
+    xrp_release_device(instance->device);
+    free(dsp);
+    DSP_PRINT(INFO,"exit\n");
+    return 0;
+}
+void* csi_dsp_create_instance(int dsp_id)
+{
+    enum xrp_status status;
+	struct xrp_device *device;
+	struct csi_dsp_instance *instance = NULL;
+    struct xrp_queue * queue;
+    unsigned char ns_id[]=XRP_PS_NSID_COMMON_CMD;
+    
+    dsp_InitEnv();
+
+    instance=malloc(sizeof(*instance));
+    if(!instance)
+    {
+        DSP_PRINT(ERROR,"malloc fail\n");
+        return NULL;
+    }
+	device = xrp_open_device(dsp_id, &status);
+    if(status!=XRP_STATUS_SUCCESS)
+    {
+       
+        free(instance);
+        DSP_PRINT(ERROR,"open device\n");
+        return NULL;
+    }
+    instance->device=device;
+
+   /* unsigned char XRP_NSID[] = XRP_PS_NSID_INITIALIZER;
+   create a comon queue to handler the common message 
+   */
+	queue = xrp_create_ns_queue(device, ns_id, &status);
+    if(status!=XRP_STATUS_SUCCESS)
+    {
+        xrp_release_device(device);
+        free(instance);
+        DSP_PRINT(ERROR,"create ns queue faile\n");
+        return NULL;
+    }
+    instance->comm_queue=queue;
+    INIT_LIST_HEAD(&instance->task_list);
+    //csi_dsp_enable_heartbeat_check(instance,10);
+    DSP_PRINT(INFO,"dsp instance create successulf\n");
+    return instance;
+}
+
+
+int csi_dsp_create_reporter(void* dsp)
+{
+     struct csi_dsp_instance *instance = (struct csi_dsp_instance *)dsp;
+     struct xrp_report *reporter = xrp_create_reporter(instance->device,MAX_REPORT_SIZE+32);
+     if(reporter==NULL)
+     {
+         DSP_PRINT(ERROR,"create ns queue\n");
+         return -1;
+     }
+     instance->report_impl=reporter;
+     DSP_PRINT(INFO,"create reporter\n");
+     return 0;
+}
+
+int csi_dsp_destroy_reporter(void *dsp)
+{
+    struct csi_dsp_instance *instance = (struct csi_dsp_instance *)dsp;
+   if(0 == xrp_release_reporter(instance->device,instance->report_impl))
+   {
+       instance->report_impl=NULL;
+   }
+   else
+   {
+       DSP_PRINT(ERROR,"reporter destroy fail\n");
+       return -1;
+   }
+    DSP_PRINT(INFO,"release reporter\n");
+    return 0;
+}
+
+
+static void dsp_task_init(struct csi_dsp_task_handler * task)
+{
+    task->algo.algo_id = DSP_INVALID_ITEM;
+    task->algo.task_id = DSP_INVALID_ITEM;
+    task->fe.frontend_type = CSI_DSP_FE_TYPE_INVALID;
+    task->be.backend_type = CSI_DSP_BE_TYPE_INVALID;
+    task->report_id =-1;
+} 
+/* queue ns 应该通过DSP侧来分配保证唯一性,区分不同进程的task.*/
+void *csi_dsp_create_task(void* dsp,csi_dsp_task_mode_e task_type)
+{
+        struct csi_dsp_task_handler * task;
+        struct csi_dsp_task_create_resp resp;
+        struct xrp_queue *queue;
+        struct csi_dsp_task_create_req config_para;
+        enum xrp_status status;
+        struct csi_dsp_instance *instance = (struct csi_dsp_instance *)dsp;
+        dsp_handler_item_t *task_item =NULL;
+        if(!instance)
+        {
+            DSP_PRINT(ERROR,"param check fail\n");
+            return NULL;
+        }
+        task_item = malloc(sizeof(*task_item));
+        if(!task_item)
+        {
+            DSP_PRINT(ERROR,"malloc fail\n");
+            goto error1;
+        }
+        task= malloc(sizeof(*task));
+        if(!task)
+        {
+            DSP_PRINT(ERROR,"malloc fail\n");
+            goto error;
+        }
+        task_item->handler = task;
+        config_para.type=task_type;
+        if(csi_dsp_cmd_send(instance->comm_queue,PS_CMD_TASK_ALLOC,&config_para,sizeof(struct csi_dsp_task_create_req),&resp,sizeof(resp),NULL))
+        {
+            DSP_PRINT(ERROR,"PS_CMD_TASK_ALLOC fail\n");
+            goto error;
+        }
+        if(resp.status!=CSI_DSP_OK)
+        {
+            DSP_PRINT(ERROR,"task creat fail:%d\n",resp.status);
+            goto error;
+        }
+        task->queue = NULL;
+        if(task_type == CSI_DSP_TASK_SW_TO_SW || task_type == CSI_DSP_TASK_SW_TO_HW)
+        {
+
+            queue = xrp_create_ns_queue(instance->device, resp.task_ns, &status);
+            if(status!=XRP_STATUS_SUCCESS)
+            {
+                DSP_PRINT(ERROR,"queue creat fail\n");
+                goto error;
+            }
+            task->queue=queue;
+
+            csi_dsp_sw_task_manager_t *sw_task_ctx = malloc(sizeof(*sw_task_ctx));
+            if(sw_task_ctx ==NULL)
+            {
+                DSP_PRINT(ERROR,"malloc fail\n");
+                xrp_release_queue(queue);
+                goto error;
+            }
+            INIT_LIST_HEAD(&sw_task_ctx->event_list);
+            sw_task_ctx->event_num = 0;
+            pthread_mutex_init(&sw_task_ctx->mutex, NULL);
+            task->private = sw_task_ctx;
+            if(status != XRP_STATUS_SUCCESS)
+            {
+                DSP_PRINT(ERROR,"xrp_create_buffer_group fail\n");
+                free(sw_task_ctx);
+                xrp_release_queue(queue);
+                goto error;
+            }     
+        }
+        else{
+            // HW  task create report
+        }
+        task->buffers = xrp_create_buffer_group(&status);
+        memcpy(task->task_ns,resp.task_ns,TASK_NAME_LINE);
+        task->task_id=resp.task_id;
+        task->instance=instance;
+        task->mode=task_type;
+        list_add_tail(&task_item->head,&instance->task_list);
+        dsp_task_init(task);
+        // task->report_id=-1;
+        DSP_PRINT(INFO,"task(%d) ,ns(%x)create successful!\n",task->task_id,task->task_ns[0]);
+        return task;
+
+error:
+       free(task);
+error1:
+       free(task_item);
+       return NULL;
+}
+void csi_dsp_destroy_task(void *task_ctx)
+{
+    csi_dsp_status_e resp;
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+    if(task_ctx ==NULL)
+    {
+        return;
+    }
+    if(task->queue)
+        xrp_release_queue(task->queue);
+
+    if(task->report_id>=0)
+    {
+        xrp_remove_report_item(task->instance->report_impl,task->report_id);
+    }
+
+    if(task->buffers)
+    {
+        xrp_release_buffer_group(task->buffers);
+    }
+
+
+    struct csi_dsp_task_free_req config_para;
+
+    config_para.task_id = task->task_id;
+    memcpy(config_para.task_ns,task->task_ns,sizeof(config_para.task_ns));
+
+    if(csi_dsp_cmd_send(task->instance->comm_queue,PS_CMD_TASK_FREE,&config_para,sizeof(struct csi_dsp_task_free_req),&resp,sizeof(resp),NULL))
+    {
+         DSP_PRINT(ERROR,"send PS_CMD_TASK_FREE fail\n");
+    }
+
+    if(resp!=CSI_DSP_OK)
+    {
+         DSP_PRINT(ERROR,"TASK FREE Fail due to %d\n",resp);
+    }
+    DSP_PRINT(INFO,"task(%d) ,ns(%x) destroy successful!\n",task->task_id,task->task_ns[0]);
+    free(task);
+}
+
+int csi_dsp_task_config_frontend(void *task_ctx,struct csi_dsp_task_fe_para* config_para)
+{
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+    csi_dsp_status_e resp =0;
+    if(!task || !task->instance || !task->instance->comm_queue)
+    {
+        DSP_PRINT(ERROR,"param check fail\n");
+        return -1;
+    }
+    config_para->task_id= task->task_id ;
+    if(csi_dsp_cmd_send(task->instance->comm_queue,PS_CMD_FE_CONFIG,config_para,sizeof(struct csi_dsp_task_fe_para),&resp,sizeof(resp),NULL))
+    {
+        DSP_PRINT(ERROR,"config_frontend cmd send fail\n");
+        return -1;
+    }
+    if(resp != CSI_DSP_OK)
+    {
+        DSP_PRINT(ERROR,"PS_CMD_FE_CONFIG fail %d\n",resp);
+        return -1; 
+    }
+    memcpy(&task->fe,config_para,sizeof(task->fe));
+    DSP_PRINT(INFO,"task(%d) set frontend %d!\n",config_para->task_id,config_para->frontend_type);
+    return 0;
+}
+
+int csi_dsp_task_get_frontend(void *task_ctx,struct csi_dsp_task_fe_para *config_para)
+{
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+    csi_dsp_status_e resp =0;
+    if(!config_para|!task || !task->instance || !task->instance->comm_queue)
+    {
+        DSP_PRINT(ERROR,"param check fail\n");
+        return -1;
+    }
+    memcpy(config_para,&task->fe,sizeof(task->fe));
+    return 0;
+}
+int csi_dsp_task_config_backend(void *task_ctx,struct csi_dsp_task_be_para* config_para)
+{
+    csi_dsp_status_e resp =0;
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+    size_t sz;
+    if(!task || !task->instance || !task->instance->comm_queue)
+    {
+        DSP_PRINT(ERROR,"param check fail\n");
+        return -1;
+    }
+    config_para->task_id= task->task_id ;
+    if(config_para->backend_type == CSI_DSP_BE_TYPE_HOST)
+    {
+        sz= sizeof(struct csi_dsp_task_be_para)+sizeof(struct csi_dsp_buffer)*config_para->sw_param.num_buf;
+    }
+    else
+    {
+        sz= sizeof(struct csi_dsp_task_be_para);
+    }
+    if(csi_dsp_cmd_send(task->instance->comm_queue,PS_CMD_BE_CONFIG, config_para,sz,&resp,sizeof(resp),NULL))
+    {
+        DSP_PRINT(ERROR,"send cmd fail\n");
+        return -1;
+    }
+    if(resp != CSI_DSP_OK)
+    {
+        DSP_PRINT(ERROR,"resp ERROR: %d\n",resp);
+        return -1; 
+    }
+    memcpy(&task->be,config_para,sizeof(task->be));
+    DSP_PRINT(INFO,"task(%d) set backend %d!\n",task->task_id,config_para->backend_type);
+    return 0;
+}
+
+int csi_dsp_task_update_backend_buf(void *task_ctx,struct csi_dsp_task_be_para* config_para)
+{
+    csi_dsp_status_e resp =0;
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+    size_t sz;
+    if(!task || !task->instance || !task->instance->comm_queue)
+    {
+        DSP_PRINT(ERROR,"param check fail\n");
+        return -1;
+    }
+    if(config_para->backend_type !=CSI_DSP_BE_TYPE_HOST)
+    {
+        DSP_PRINT(ERROR,"unsport backend type\n");
+        return -1;
+    }
+    config_para->task_id= task->task_id ;
+    if(config_para->backend_type == CSI_DSP_BE_TYPE_HOST)
+    {
+        sz= sizeof(struct csi_dsp_task_be_para)+sizeof(struct csi_dsp_buffer)*config_para->sw_param.num_buf;
+    }
+    else
+    {
+        sz= sizeof(struct csi_dsp_task_be_para);
+    }
+    if(csi_dsp_cmd_send(task->instance->comm_queue,PS_CMD_BE_ASSGIN_BUF, config_para,sz,&resp,sizeof(resp),NULL))
+    {
+        DSP_PRINT(ERROR,"send cmd fail\n");
+        return -1;
+    }
+    if(resp != CSI_DSP_OK)
+    {
+        DSP_PRINT(ERROR,"resp ERROR: %d\n",resp);
+        return -1; 
+    }
+    DSP_PRINT(INFO,"task(%d) set backend %d!\n",task->task_id,config_para->backend_type);
+    return 0;
+}
+
+int csi_dsp_task_get_backend(void *task_ctx,struct csi_dsp_task_be_para* config_para)
+{
+    csi_dsp_status_e resp =0;
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+    if(!task || !task->instance || !task->instance->comm_queue)
+    {
+        DSP_PRINT(ERROR,"param check fail\n");
+        return -1;
+    }
+    memcpy(config_para,&task->be,sizeof(task->be));
+    return 0;
+}
+int csi_dsp_task_config_algo(void *task_ctx,struct csi_dsp_algo_config_par* config_para)
+{
+    csi_dsp_status_e resp =0;
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+    struct csi_dsp_algo_config_par config;
+    struct xrp_buffer *buffer = NULL;
+    struct xrp_buffer *algo_buffer = NULL;
+    struct xrp_buffer *algo_set_buffer = NULL;
+    enum xrp_status status;
+    void* buf_ptr;
+    struct xrp_buffer_group *buffer_group =NULL;
+    if(!task || !task->instance || !task->instance->comm_queue)
+    {
+        DSP_PRINT(ERROR,"param check fail\n");
+        return -1;
+    }
+    config.task_id= task->task_id ;
+    config.algo_id = config_para->algo_id;
+    config.algo_ptr = 0;
+    config.sett_length = config_para->sett_length;
+    config.sett_ptr = 0;
+    config.bufs_ptr = 0;
+    config.buf_num = config_para->buf_num;
+    config.algo_size = config_para->algo_size;
+    buffer_group = xrp_create_buffer_group(&status);
+    if(status != XRP_STATUS_SUCCESS)
+    {
+        DSP_PRINT(ERROR,"malloc buf group fail\n");
+        return -1;
+    }
+    if(config_para->sett_ptr && (config_para->sett_length !=0))
+    {
+
+        buffer = xrp_create_buffer(task->instance->device,config.sett_length,NULL,&status);
+        if(status != XRP_STATUS_SUCCESS)
+        {
+            DSP_PRINT(ERROR,"malloc buf fail\n");
+            goto Err3;
+        }
+        xrp_add_buffer_to_group(buffer_group,buffer,XRP_READ,&status);
+        xrp_buffer_get_info(buffer,XRP_BUFFER_PHY_ADDR,&config.sett_ptr,sizeof(config.sett_ptr),&status);
+        xrp_buffer_get_info(buffer,XRP_BUFFER_USER_ADDR,&buf_ptr,sizeof(buf_ptr),&status);
+        memcpy(buf_ptr,(void*)config_para->sett_ptr,config_para->sett_length);
+        DSP_PRINT(INFO," setting buf phy:%llx\n",config.sett_ptr);
+
+    }
+
+    if(config_para->bufs_ptr && (config_para->buf_num !=0))
+    {
+
+        algo_set_buffer = xrp_create_buffer(task->instance->device,config_para->buf_num*sizeof(struct csi_dsp_buffer),NULL,&status);
+        if(status != XRP_STATUS_SUCCESS)
+        {
+            DSP_PRINT(ERROR,"malloc buf fail\n");
+            goto Err3;
+        }
+        xrp_add_buffer_to_group(buffer_group,algo_set_buffer,XRP_READ,&status);
+        xrp_buffer_get_info(algo_set_buffer,XRP_BUFFER_PHY_ADDR,&config.bufs_ptr,sizeof(config.sett_ptr),&status);
+        xrp_buffer_get_info(algo_set_buffer,XRP_BUFFER_USER_ADDR,&buf_ptr,sizeof(buf_ptr),&status);
+        memcpy(buf_ptr,(void*)config_para->bufs_ptr,config_para->buf_num*sizeof(struct csi_dsp_buffer));
+        DSP_PRINT(INFO,"  algo_set_buffer phy:%llx\n",config.bufs_ptr);
+
+    }
+
+    if(config_para->algo_ptr && (config_para->algo_size !=0))
+    {
+
+        algo_buffer = xrp_create_buffer(task->instance->device,config_para->algo_size,NULL,&status);
+        if(status != XRP_STATUS_SUCCESS)
+        {
+            DSP_PRINT(ERROR,"malloc buf fail\n");
+            goto Err2;
+        }
+        xrp_add_buffer_to_group(buffer_group,algo_buffer,XRP_READ,&status);
+        xrp_buffer_get_info(algo_buffer,XRP_BUFFER_PHY_ADDR,&config.algo_ptr,sizeof(config.algo_ptr),&status);
+        xrp_buffer_get_info(algo_buffer,XRP_BUFFER_USER_ADDR,&buf_ptr,sizeof(buf_ptr),&status);
+        memcpy(buf_ptr,(void*)config_para->algo_ptr,config_para->algo_size);
+        DSP_PRINT(INFO,"algo buf phy:%llx\n",config_para->algo_ptr);
+
+    }
+
+    if(csi_dsp_cmd_send(task->instance->comm_queue,PS_CMD_ALGO_CONFIG, &config,sizeof(struct csi_dsp_algo_config_par),&resp,sizeof(resp),buffer_group))
+    {
+        DSP_PRINT(ERROR,"send cmd fail\n");
+        goto Err1;
+    }
+
+    if(resp != CSI_DSP_OK)
+    {
+        DSP_PRINT(ERROR,"resp fail %d\n",resp);
+        goto Err1;
+    }
+    memcpy(&task->algo,&config,sizeof(config));
+
+    if(buffer)
+    {
+        xrp_release_buffer(buffer);
+    }
+    if(algo_set_buffer)
+    {
+         xrp_release_buffer(algo_set_buffer);
+    }
+    if(algo_buffer)
+    {
+        xrp_release_buffer(algo_buffer);
+    }
+    xrp_release_buffer_group(buffer_group);
+
+    DSP_PRINT(INFO,"task %d sucessful!\n",task->task_id);
+    return 0;
+
+Err1:
+    if(algo_buffer) xrp_release_buffer(algo_buffer);
+Err2:
+    if(buffer) xrp_release_buffer(buffer);
+Err3:
+    xrp_release_buffer_group(buffer_group);
+    return -1;
+}
+
+int csi_dsp_task_load_algo(void *task_ctx, csi_dsp_algo_load_req_t* config_para)
+{
+    csi_dsp_algo_load_resp_t resp;
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+    if(!task || !task->instance || !task->instance->comm_queue)
+    {
+        DSP_PRINT(ERROR,"param check fail\n");
+        return -1;
+    }
+    config_para->task_id= task->task_id;
+    if(csi_dsp_cmd_send(task->instance->comm_queue,PS_CMD_ALGO_LOAD, config_para,sizeof(csi_dsp_algo_load_req_t),&resp,sizeof(resp),NULL))
+    {
+        DSP_PRINT(ERROR,"send cmd fail\n");
+        return -1;
+    }
+    if(resp.status != CSI_DSP_OK)
+    {
+        DSP_PRINT(ERROR,"resp fail %d\n",resp.status);
+        return -1; 
+    }
+    task->algo.algo_id=config_para->algo_id;
+    task->algo.algo_ptr = config_para->algo_ptr;
+    // task->algo.buf_num = resp.buf_desc_num;
+    // task->algo.sett_length = resp. 
+    DSP_PRINT(INFO,"task %d load algo sucessful!\n",task->task_id);
+    return 0;
+}
+
+int csi_dsp_task_acquire_algo(void *task_ctx,char*name)
+{
+    FILE * fp;
+    int   size;
+    int rev = 0;
+    char file[128];
+    struct xrp_buffer *buffer = NULL;
+    enum xrp_status status;
+    void* buf_ptr;
+    uint64_t buf_phy;
+    struct xrp_buffer_group *buffer_group =NULL;
+    csi_dsp_algo_load_resp_t resp;
+    csi_dsp_algo_load_req_t config_para;
+    if(task_ctx == NULL || name ==NULL || strlen(name)>100 )
+    {
+        DSP_PRINT(ERROR,"param check fail\n");
+        return -1;
+    }
+
+    sprintf(file,"/lib/firmware/%s.lib",name);
+    DSP_PRINT(DEBUG,"open file:%s\n",file);
+    fp = fopen(file, "rb");
+    
+    if(fp==NULL)
+    {
+        DSP_PRINT(ERROR,"open file fail\n");
+        return -1;
+    }
+    fseek(fp , 0, SEEK_END);
+    size = ftell(fp);
+    rewind(fp);
+
+    if(size ==0)
+    {
+        return -1;
+    }
+
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+    buffer_group = xrp_create_buffer_group(&status);
+    if(status != XRP_STATUS_SUCCESS)
+    {
+        DSP_PRINT(ERROR,"malloc buf group fail\n");
+        return -1;
+    }
+    buffer = xrp_create_buffer(task->instance->device,size,NULL,&status);
+    if(status != XRP_STATUS_SUCCESS)
+    {
+       DSP_PRINT(ERROR,"malloc buf fail\n");
+        return -1;
+    }
+    xrp_add_buffer_to_group(buffer_group,buffer,XRP_READ,&status);
+    xrp_buffer_get_info(buffer,XRP_BUFFER_PHY_ADDR,&buf_phy,sizeof(buf_phy),&status);
+    xrp_buffer_get_info(buffer,XRP_BUFFER_USER_ADDR,&buf_ptr,sizeof(buf_ptr),&status);
+    DSP_PRINT(DEBUG,"algo buf virtual:0x%p, phy:0x%lx\n", buf_ptr,buf_phy);
+
+    rev = fread(buf_ptr, 1, size, fp);
+    if(rev != size) 
+    {
+      DSP_PRINT(ERROR,"Loading file failed\n");
+      return -1;
+    }
+    fclose(fp);
+    config_para.task_id= task->task_id;
+    config_para.algo_id =-1;
+    config_para.algo_ptr = buf_phy;
+    if(csi_dsp_cmd_send(task->instance->comm_queue,PS_CMD_ALGO_LOAD, &config_para,sizeof(csi_dsp_algo_load_req_t),&resp,sizeof(resp),buffer_group))
+    {
+        DSP_PRINT(ERROR,"send cmd fail\n");
+        return -1;
+    }
+    if(resp.status != CSI_DSP_OK)
+    {
+        DSP_PRINT(ERROR,"resp fail %d\n",resp.status);
+        return -1; 
+    }
+
+    if(buffer)
+    {
+        // memset(buf_ptr,0xee,config_para->sett_length);
+        xrp_release_buffer(buffer);
+        xrp_release_buffer_group(buffer_group);
+    }
+    task->algo.algo_id=config_para.algo_id;
+    task->algo.algo_ptr = config_para.algo_ptr;
+    DSP_PRINT(INFO,"task %d acquire algo:%s sucessful!\n",task->task_id,name);
+    return 0;
+
+}
+int csi_dsp_task_start(void *task_ctx)
+{
+    csi_dsp_status_e resp;
+    struct csi_dsp_task_start_req req;
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+    req.task_id = task->task_id;
+    if(task== NULL)
+    {
+        DSP_PRINT(ERROR,"ERR Invalid task \n");
+        return -1;
+    }
+    if(csi_dsp_cmd_send(task->instance->comm_queue,PS_CMD_TASK_START,&req,sizeof(struct csi_dsp_task_start_req),&resp,sizeof(resp),NULL))
+    {
+        DSP_PRINT(ERROR,"csi_dsp_task_start fail \n",resp);
+        return -1;
+    }
+
+    if(resp != CSI_DSP_OK )
+    {
+        DSP_PRINT(ERROR,"csi_dsp_task_start resp due to %d\n",resp);
+        return -1;
+    }
+    DSP_PRINT(INFO,"task start sucessful!\n",task->task_id);
+    return 0;
+}
+
+int csi_dsp_task_stop(void *task_ctx)
+{
+    csi_dsp_status_e resp;
+    struct csi_dsp_task_start_req req;
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+
+    if(task== NULL)
+    {
+        DSP_PRINT(ERROR,"ERR Invalid task \n");
+        return -1;
+    }
+    req.task_id = task->task_id;
+
+    if(csi_dsp_cmd_send(task->instance->comm_queue,PS_CMD_TASK_STOP,&req,sizeof(req),&resp,sizeof(resp),NULL))
+    {
+        return -1;
+    }
+    if(resp != CSI_DSP_OK)
+    {
+        printf("csi_dsp_task_start fail due to %d\n",resp);
+    }
+    return 0;
+
+}
+
+static int csi_dsp_config_report_item_to_dsp(void *task_ctx,enum cmd_type flag)
+{
+    csi_dsp_status_e resp;
+    struct report_config_msg config;
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+    if(!task || task->report_id<0 || !task->instance || !task->instance->comm_queue)
+    {
+        DSP_PRINT(ERROR,"param check fail\n");
+        return -1;
+    }
+    config.report_id=task->report_id;
+    config.flag = flag;
+    memcpy(config.task,task->task_ns,TASK_NAME_LINE);
+    config.addr = 0xdeadbeef;
+    config.size = task->report_size; 
+    if(csi_dsp_cmd_send(task->instance->comm_queue,PS_CMD_REPORT_CONFIG,&config,sizeof(struct report_config_msg),&resp,sizeof(resp),NULL))
+    {
+        DSP_PRINT(ERROR,"send PS_CMD_REPORT_CONFIG fail\n");
+        return -1;
+    }
+    if(resp != CSI_DSP_OK)
+    {
+        DSP_PRINT(ERROR,"PS_CMD_REPORT_CONFIG fail due to %d\n",resp);
+        return -1;
+    }
+    return 0;
+}
+
+
+int csi_dsp_task_register_cb(void *task_ctx,
+                            int (*cb)(void*context,void*data),
+                            void* context,
+                            size_t data_size)
+{
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+    task->report_id = task->task_id;
+    if(task->report_id<0)
+    {
+       DSP_PRINT(WARNING,"report id is invalid\n");
+       return -1;
+    }
+    task->report_size = data_size;
+    if(xrp_add_report_item_with_id(task->instance->report_impl,
+								        cb,task->report_id,context,data_size)<0)
+    {
+        DSP_PRINT(WARNING,"report id is invalid\n");
+        return -1;
+    }
+    if(csi_dsp_config_report_item_to_dsp(task,CMD_SETUP))
+    {
+        DSP_PRINT(WARNING,"report id is invalid\n");
+        return -1;
+    }
+    task->cb = cb;
+    task->context = context;
+    DSP_PRINT(INFO,"new reprot %d is created and register to DSP\n",task->report_id);
+    return 0;
+}
+
+int csi_dsp_ps_task_unregister_cb(void *task_ctx)
+{
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+    if(task->report_id<0)
+    {
+        DSP_PRINT(WARNING,"report id is invalid\n");
+        return -1;
+    }
+    if(csi_dsp_config_report_item_to_dsp(task,CMD_RELEASE))
+    {
+        DSP_PRINT(WARNING,"report release fail\n");
+        return -1;
+    }
+
+    xrp_remove_report_item(task->instance->report_impl,task->report_id);
+    DSP_PRINT(INFO,"new reprot %d is unregister to DSP\n",task->report_id);
+    task->report_id =-1;
+   
+    return 0;
+    
+}
+
+struct csi_sw_task_req* csi_dsp_task_create_request(void *task_ctx)
+{
+    struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)task_ctx;
+    struct csi_sw_task_req*  req = NULL;
+    void* req_ptr,*event_ptr;
+    enum xrp_status status;
+    if(task->mode != CSI_DSP_TASK_SW_TO_SW)
+    {
+        DSP_PRINT(WARNING,"un-support for task type:%d\n",task->mode);
+        return NULL;
+    }
+    if(task->algo.algo_id == DSP_INVALID_ITEM)
+    {
+        DSP_PRINT(WARNING,"algo is not loaded:%d\n",task->algo.algo_id);
+        return NULL;
+    }
+    req = malloc(sizeof(*req));
+    if(req == NULL)
+    {
+        DSP_PRINT(WARNING,"memroy alloc fail\n");
+        return NULL;
+    }
+
+    req->priv = xrp_create_buffer_group(&status);
+    if(status != XRP_STATUS_SUCCESS)
+    {
+        DSP_PRINT(WARNING,"buffer group create fail\n");
+        free(req);
+        return NULL;
+    }
+    req->status = CSI_DSP_SW_REQ_IDLE;
+    req->algo_id = task->algo.algo_id;
+    req->task = task_ctx;
+    req->buffer_num =0;
+    req->request_id = rand();
+    req->sett_length =0;
+    req->sett_ptr = NULL;
+    DSP_PRINT(DEBUG,"new req %d is created in task %d\n",req->request_id,task->task_id);
+    return req;
+
+}
+
+
+int csi_dsp_task_release_request(struct csi_sw_task_req*  req)
+{
+    struct xrp_buffer_group *group;
+    enum xrp_status status;
+    int buf_idx,plane_idx;;
+    struct xrp_buffer *buffer;
+    int index;
+    size_t buf_num;
+    struct csi_dsp_task_handler * task =(struct csi_dsp_task_handler *) req->task;
+    if(req == NULL)
+    {
+        return 0;
+    }
+    group = (struct xrp_buffer_group *)req->priv;
+    if(group == NULL)
+    {
+        free(req);
+        DSP_PRINT(WARNING,"buffer group create fail\n");
+        return -1;
+    }
+    
+    for(buf_idx=0;buf_idx<req->buffer_num;buf_idx++)
+    {
+        if(req->buffers[buf_idx].type == CSI_DSP_BUF_TYPE_DMA_BUF_IMPORT ||
+            req->buffers[buf_idx].type == CSI_DSP_BUF_TYPE_DMA_BUF_EXPORT)
+        {
+            for(plane_idx =0 ;plane_idx<req->buffers[buf_idx].plane_count;plane_idx++)
+            {
+                 xrp_release_dma_buf(task->instance->device,req->buffers[buf_idx].planes[plane_idx].fd,&status);
+            }
+        }
+        else
+        {
+            for(plane_idx =0 ;plane_idx<req->buffers[buf_idx].plane_count;plane_idx++)
+            {
+                // printf("release buf %d plane %d\n",buf_idx,plane_idx);
+                buffer = xrp_get_buffer_from_group(group,req->buffers[buf_idx].planes[plane_idx].fd,&status);
+                xrp_unmap_buffer(buffer,(void *)req->buffers[buf_idx].planes[plane_idx].buf_vir,&status);
+                xrp_release_buffer(buffer);
+            }
+        }
+
+    }
+    /*free sett buf   */
+    xrp_buffer_group_get_info(group,XRP_BUFFER_GROUP_SIZE_SIZE_T, 0,&buf_num,sizeof(buf_num),&status);
+    if(status!=XRP_STATUS_SUCCESS)
+    {
+        DSP_PRINT(WARNING,"Get sett buffer release fail\n");
+        return -1;
+    }
+    uint64_t buf_phy;
+    for(index=0; index<buf_num; index++)
+    {
+        buffer = xrp_get_buffer_from_group(group,index,&status);
+        xrp_buffer_get_info(buffer,XRP_BUFFER_PHY_ADDR,&buf_phy,sizeof(buf_phy),&status);
+        if(buf_phy == req->sett_ptr)
+        {
+            // xrp_unmap_buffer(buffer,(void *)req->buffers[buf_idx].planes[plane_idx].buf_vir,&status);
+            xrp_release_buffer(buffer);
+            break;
+        }
+    }
+
+    xrp_release_buffer_group(group);
+    DSP_PRINT(DEBUG,"req %d is release successful!\n",req->request_id);
+    free(req);
+    return 0;
+}
+int csi_dsp_task_create_buffer(void * task_ctx,struct csi_dsp_buffer * buffer)
+{
+    struct csi_dsp_task_handler * task= (struct csi_dsp_task_handler *)task_ctx;
+    int i,j;
+    struct xrp_buffer * buf=NULL;
+    size_t buf_size;
+    int fail_release =0;
+    uint64_t phy_addr;
+    enum xrp_status status;
+     if(task == NULL || buffer==NULL)
+     {
+          DSP_PRINT(WARNING,"param check fail\n");
+         return -1;
+     }
+     if(task->buffers==NULL)
+     {
+         DSP_PRINT(WARNING,"Buffrs not init\n");
+         return -1;
+     }
+     switch(buffer->type)
+     {
+         case CSI_DSP_BUF_ALLOC_DRV:
+                for(i=0;i<buffer->plane_count;i++)
+                {
+                    buf = xrp_create_buffer(task->instance->device,buffer->planes[i].size,NULL,&status);
+                    if(status != XRP_STATUS_SUCCESS)
+                    {
+                         DSP_PRINT(WARNING,"create xrp buffer fail\n");
+                         goto err_1;
+                    }
+                    else
+                    {
+                        int flag = buffer->dir == CSI_DSP_BUFFER_IN ?XRP_READ:XRP_WRITE;
+                        buffer->planes[i].buf_vir = xrp_map_buffer(buf,0,buffer->planes[i].size,flag,&status);
+                        if(status != XRP_STATUS_SUCCESS)
+                        {
+
+                            xrp_release_buffer(buf);
+                            DSP_PRINT(WARNING,"Error Map Buffrs not fail\n");
+                            goto err_1;
+                        }
+                        // printf("%s,Debug V:%llx,P:%llx\n",__FUNCTION__,buf->ptr,buf->phy_addr);
+                        xrp_buffer_get_info(buf,XRP_BUFFER_PHY_ADDR,&buffer->planes[i].buf_phy,sizeof(phy_addr),&status);
+                        if(status != XRP_STATUS_SUCCESS)
+                        {
+                            
+                            xrp_unmap_buffer(buf,buffer->planes[i].buf_vir,&status);
+                            xrp_release_buffer(buf);
+                            DSP_PRINT(WARNING,"Error get phy addr fail\n");
+                            goto err_1;
+                        }
+                        buffer->planes[i].fd = xrp_add_buffer_to_group(task->buffers,buf,flag,&status);
+                        if(status !=XRP_STATUS_SUCCESS)
+                        {
+                            xrp_unmap_buffer(buf,buffer->planes[i].buf_vir,&status);
+                            xrp_release_buffer(buf);
+                            DSP_PRINT(WARNING,"add to buffer group fail\n");
+                            goto err_1;
+                        }                        
+                    }
+                    DSP_PRINT(DEBUG,"create buffer:Vaddr(0x%llx),Paddr(0x%llx)\n", buffer->planes[i].buf_vir,buffer->planes[i].buf_phy);
+                }
+                return 0;
+
+                err_1:
+                    for(j=0;j<i;j++)
+                    {
+                         buf = xrp_get_buffer_from_group(task->buffers, buffer->planes[j].fd,&status);
+                         xrp_unmap_buffer(buf,buffer->planes[j].buf_vir,&status);
+                         xrp_release_buffer(buf);
+                    }
+                    return -1;
+
+         case CSI_DSP_BUF_ALLOC_APP:
+                 return 0;
+         case  CSI_DSP_BUF_TYPE_DMA_BUF_EXPORT:
+                  DSP_PRINT(INFO,"ERR DMA buffer export not support\n");
+                 return 0; 
+         case CSI_DSP_BUF_TYPE_DMA_BUF_IMPORT:
+                    
+                for(i=0;i<buffer->plane_count;i++)
+                {
+                    int flag = buffer->dir == CSI_DSP_BUFFER_IN ?XRP_READ:XRP_WRITE;
+
+
+                    xrp_import_dma_buf(task->instance->device,buffer->planes[i].fd,flag,&buffer->planes[i].buf_phy,
+                                               &buffer->planes[i].buf_vir,&buffer->planes[i].size,&status);
+                    if(status !=XRP_STATUS_SUCCESS )
+                    {
+                        DSP_PRINT(WARNING,"dma buf import fail\n");
+                        goto err_2;
+                    }
+
+                }
+                break;
+                err_2:
+                    for(j=0;j<i;j++)
+                    {
+                            xrp_release_dma_buf(task->instance->device,buffer->planes[i].fd,&status);
+                    }
+                    return -1;
+         default:
+                DSP_PRINT(WARNING,"buffer type:%d not support\n",buffer->type);
+            return -1;
+     }
+     return 0;
+
+}
+
+int csi_dsp_task_free_buffer(void * task_ctx,struct csi_dsp_buffer * buffer)
+{
+    struct csi_dsp_task_handler * task= (struct csi_dsp_task_handler *)task_ctx;
+    int i,j;
+    struct xrp_buffer * buf=NULL;
+    size_t buf_size;
+    int fail_release =0;
+    uint64_t phy_addr;
+    enum xrp_status status;
+
+     if(task == NULL||task->buffers==NULL||buffer==NULL)
+     {
+         DSP_PRINT(WARNING,"param check fail\n")
+         return -1;
+     }
+
+
+     switch(buffer->type)
+     {
+         case CSI_DSP_BUF_ALLOC_DRV:
+                for(i=0;i<buffer->plane_count;i++)
+                {
+                   
+                         buf = xrp_get_buffer_from_group(task->buffers,buffer->planes[i].fd,&status);
+                         xrp_unmap_buffer(buf,buffer->planes[i].buf_vir,&status);
+                         xrp_release_buffer(buf);
+                }
+                break;
+
+         case CSI_DSP_BUF_ALLOC_APP:
+                break;
+         case CSI_DSP_BUF_TYPE_DMA_BUF_EXPORT:
+                DSP_PRINT(WARNING,"buffer type not support\n");
+                break;
+         case CSI_DSP_BUF_TYPE_DMA_BUF_IMPORT:
+                for(i=0;i<buffer->plane_count;i++)
+                {
+                    xrp_release_dma_buf(task->instance->device,buffer->planes[i].fd,&status);
+                    if(status != XRP_STATUS_SUCCESS)
+                    {
+                        DSP_PRINT(WARNING,"ERR DMA Buffrs(%d) Release fail\n",buffer->planes[i].fd);
+                        return -1;
+                    }                   
+                }
+                break;
+         default:
+            DSP_PRINT(WARNING,"buffer type:%d not support\n",buffer->type);
+            return -1;
+     }
+     return 0;
+
+}
+
+int csi_dsp_request_add_buffer(struct csi_sw_task_req* req,struct csi_dsp_buffer * buffer)
+{
+    struct csi_dsp_task_handler * task=NULL;
+    struct xrp_buffer * buf=NULL;
+    enum xrp_status status;
+    int i,j;
+    struct xrp_buffer_group *buf_gp ;
+    if(!req )
+    {
+        return -1;
+    }
+    buf_gp = (struct xrp_buffer_group *)req->priv;
+    task = req->task;
+    int flag = buffer->dir == CSI_DSP_BUFFER_IN ?XRP_READ:XRP_WRITE;
+    switch(buffer->type)
+    {
+         case CSI_DSP_BUF_ALLOC_DRV:
+                for(i=0;i<buffer->plane_count;i++)
+                {
+                    buf = xrp_create_buffer(task->instance->device,buffer->planes[i].size,NULL,&status);
+                    if(status != XRP_STATUS_SUCCESS)
+                    {
+                         DSP_PRINT(WARNING,"create buffer failed\n");
+                         goto err_1;
+                    }
+                    else
+                    {
+
+                        buffer->planes[i].buf_vir = xrp_map_buffer(buf,0,buffer->planes[i].size,flag,&status);
+                        if(status != XRP_STATUS_SUCCESS)
+                        {
+                            DSP_PRINT(WARNING,"Map Buffrs not init\n");
+                            xrp_release_buffer(buf);
+                            goto err_1;
+                        }
+                        xrp_buffer_get_info(buf,XRP_BUFFER_PHY_ADDR,&buffer->planes[i].buf_phy,sizeof(uint64_t),&status);
+                        if(status != XRP_STATUS_SUCCESS)
+                        {
+                            DSP_PRINT(WARNING,"xrp_buffer_get_info failed\n");
+                            xrp_unmap_buffer(buf,buffer->planes[i].buf_vir,&status);
+                            xrp_release_buffer(buf);
+                            goto err_1;
+                        }
+                        buffer->planes[i].fd = xrp_add_buffer_to_group(buf_gp,buf,flag,&status);
+                        if(status !=XRP_STATUS_SUCCESS)
+                        {
+                            DSP_PRINT(WARNING,"xrp_add_buffer_to_group failed\n");
+                            xrp_unmap_buffer(buf,buffer->planes[i].buf_vir,&status);
+                            xrp_release_buffer(buf);
+                            goto err_1;
+                        }                        
+                    }
+                   DSP_PRINT(DEBUG,"create buffer:Vaddr(0x%llx),Paddr(0x%llx)\n", buffer->planes[i].buf_vir,buffer->planes[i].buf_phy);
+                }
+                memcpy(&req->buffers[req->buffer_num++],buffer,sizeof(*buffer));
+                return 0;
+
+                err_1:
+                    for(j=0;j<i;j++)
+                    {
+                         buf = xrp_get_buffer_from_group(buf_gp,buffer->planes[j].fd,&status);
+                         xrp_unmap_buffer(buf,buffer->planes[j].buf_vir,&status);
+                         xrp_release_buffer(buf);
+                    }
+                return -1;
+         case  CSI_DSP_BUF_TYPE_DMA_BUF_EXPORT:
+                 DSP_PRINT(INFO,"ERR DMA buffer export not support\n");
+                 return -1; 
+         case CSI_DSP_BUF_TYPE_DMA_BUF_IMPORT:
+                    
+                for(i=0;i<buffer->plane_count;i++)
+                {
+                    xrp_import_dma_buf(task->instance->device,buffer->planes[i].fd,flag,&buffer->planes[i].buf_phy,
+                                               & buffer->planes[i].buf_vir,&buffer->planes[i].size,&status);
+                    if(status !=XRP_STATUS_SUCCESS )
+                    {
+                        DSP_PRINT(WARNING,"dma buf import fail\n");
+                        goto err_2;
+                    }
+
+                }
+                memcpy(&req->buffers[req->buffer_num++],buffer,sizeof(*buffer));
+                break;
+                err_2:
+                    for(j=0;j<i;j++)
+                    {
+                        xrp_release_dma_buf(task->instance->device,buffer->planes[i].fd,&status);
+                    }
+                    return -1;
+         case CSI_DSP_BUF_ALLOC_APP:
+                return 0;
+         default:
+            DSP_PRINT(WARNING,"buffer type not support\n");
+            return -1;
+     }
+    return 0;
+}
+
+int csi_dsp_request_set_property(struct csi_sw_task_req* req,void* property,size_t sz)
+{
+    if(!req || !property || sz==0)
+    {
+        return -1;
+    }
+    csi_dsp_status_e status;
+    struct csi_dsp_task_handler * task=req->task;
+    struct xrp_buffer * buf=NULL;
+    void *sett_virt_addr =NULL;
+    struct xrp_buffer_group *buf_gp ;
+
+    buf_gp = (struct xrp_buffer_group *)req->priv;
+    req->sett_length = sz;
+    buf = xrp_create_buffer(task->instance->device,req->sett_length,NULL,&status);
+    if(status != XRP_STATUS_SUCCESS)
+    {
+        DSP_PRINT(WARNING,"create buffer failed\n");
+        return -1;
+    }
+    else
+    {
+    
+        xrp_buffer_get_info(buf,XRP_BUFFER_USER_ADDR,&sett_virt_addr,sizeof(uint64_t),&status);
+        if(status != XRP_STATUS_SUCCESS)
+        {
+            DSP_PRINT(WARNING,"ERROR get virtual addr\n");
+            xrp_release_buffer(buf);
+            return -1;
+        }
+        xrp_buffer_get_info(buf,XRP_BUFFER_PHY_ADDR,&req->sett_ptr,sizeof(uint64_t),&status);
+        if(status != XRP_STATUS_SUCCESS)
+        {
+            DSP_PRINT(WARNING,"Get PHY_ADDR failed\n");
+            xrp_release_buffer(buf);
+            return -1;
+        }
+        xrp_add_buffer_to_group(buf_gp,buf,XRP_READ,&status);
+        if(status !=XRP_STATUS_SUCCESS)
+        {
+           DSP_PRINT(WARNING,"xrp_add_buffer_to_group failed\n");
+            xrp_release_buffer(buf);
+            return -1;
+        }                        
+    }
+    memcpy(sett_virt_addr,property,req->sett_length);
+    DSP_PRINT(DEBUG,"setting propert in %p succeful!\n",req->sett_ptr);   
+    return 0;
+}
+
+
+int csi_dsp_request_enqueue(struct csi_sw_task_req* req)
+{
+    struct csi_dsp_task_handler * task=NULL;
+    struct xrp_buffer * buf=NULL;
+    task_event_item_t *event_item;
+    csi_dsp_status_e status;
+    struct xrp_event *evt;
+    csi_dsp_sw_task_manager_t * sw_task_ctx;
+	enum xrp_status s;
+    int loop;
+    if(!req )
+    {
+        return -1;
+    }
+    task = (struct csi_dsp_task_handler *)req->task;
+
+    sw_task_ctx = (csi_dsp_sw_task_manager_t *)task->private;
+    event_item = malloc(sizeof(task_event_item_t));
+    if(event_item==NULL)
+    {
+        DSP_PRINT(WARNING,"malloc fail\n");
+		return -1;
+    }
+
+    for(loop =0;loop<req->buffer_num;loop++)
+    {
+        csi_dsp_buf_flush(task->instance->device,&req->buffers[loop]);
+    }
+
+	xrp_enqueue_command(task->queue, req, sizeof(struct csi_sw_task_req),
+			    &event_item->req_status, sizeof(event_item->req_status),
+			    req->priv, &evt, &s);
+	if (s != XRP_STATUS_SUCCESS) {
+		DSP_PRINT(WARNING,"enqueue task to dsp fail\n");
+		return -1;
+	}
+
+    req->status = CSI_DSP_SW_REQ_RUNNING;
+    event_item->event = evt;
+    event_item->req = req;
+    pthread_mutex_lock(&sw_task_ctx->mutex);
+    list_add_tail(&event_item->head,&sw_task_ctx->event_list);
+    sw_task_ctx->event_num++;
+    pthread_mutex_unlock(&sw_task_ctx->mutex);
+    DSP_PRINT(DEBUG,"Req %d is enqueue \n",req->request_id);
+    return 0;
+}
+
+struct csi_sw_task_req*  csi_dsp_request_dequeue(void *task_ctx)
+{
+    struct csi_dsp_task_handler * task=(struct csi_dsp_task_handler *)task_ctx;
+    csi_dsp_sw_task_manager_t * sw_task_ctx = (csi_dsp_sw_task_manager_t *)task->private;
+    struct csi_sw_task_req*  req=NULL;
+    int id=0;
+    task_event_item_t *item;
+    enum xrp_status status;
+    int loop;
+    pthread_mutex_lock(&sw_task_ctx->mutex);
+    struct xrp_event **evts = malloc(sw_task_ctx->event_num*sizeof(struct xrp_event*));
+    list_for_each_entry(item,&sw_task_ctx->event_list,head){
+            evts[id++]=item->event;
+    }
+    pthread_mutex_unlock(&sw_task_ctx->mutex);
+    DSP_PRINT(DEBUG,"Wait for Req event \n");
+    id= xrp_wait_any(evts,sw_task_ctx->event_num,&status);
+    if(id>=sw_task_ctx->event_num || status !=XRP_STATUS_SUCCESS)
+    {
+        DSP_PRINT(WARNING,"id invalid:%d\n",id);
+        return NULL;
+    }
+    list_for_each_entry(item,&sw_task_ctx->event_list,head){
+        if(item->event == evts[id])
+            break;
+    }
+    pthread_mutex_lock(&sw_task_ctx->mutex);
+    list_del(&item->head);
+    sw_task_ctx->event_num--;
+    pthread_mutex_unlock(&sw_task_ctx->mutex);
+    req = item->req;
+    xrp_release_event(item->event);
+    if(item->req_status !=CSI_DSP_OK)
+    {
+        DSP_PRINT(WARNING,"req fail with resp:%d\n",item->req_status);
+        req->status = CSI_DSP_SW_REQ_FAIL;
+    }
+    else{
+        req->status = CSI_DSP_SW_REQ_DONE;
+    }
+    free(evts);
+    free(item);
+
+    for(loop =0;loop<req->buffer_num;loop++)
+    {
+        csi_dsp_buf_flush(task->instance->device,&req->buffers[loop]);
+    }
+
+    DSP_PRINT(DEBUG,"Req %d is deuque \n",req->request_id);
+    return req;
+}
+
+
+int csi_dsp_test_config(void* dsp ,struct csi_dsp_ip_test_par* config_para,void* buf)
+{
+    struct csi_dsp_instance * instance = (struct csi_dsp_instance *)dsp;
+    if(!dsp || !buf || !config_para->result_buf_size)
+    {
+        DSP_PRINT(WARNING,"param check fail\n");
+        return -1;
+    }
+
+    if(csi_dsp_cmd_send(instance->comm_queue,PS_CMD_DSP_IP_TEST, config_para,sizeof(struct csi_dsp_ip_test_par),buf,config_para->result_buf_size,NULL))
+    {
+        DSP_PRINT(WARNING," send cmd fail\n");
+        return -1;
+    }
+
+    return 0;
+}

+ 127 - 0
driver/xrp-user/dsp-ps/csi_dsp_core.h

@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2021 Alibaba Group. All rights reserved.
+ * License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ */
+/*!
+ * \file 
+ * \brief This section defines CSI DSP API.
+ *
+
+ */
+
+#ifndef _CSI_DSP_CORE_H
+#define _CSI_DSP_CORE_H
+
+#include <string.h>
+#include "xrp_api.h"
+#include "csi_dsp_task_defs.h"
+#include "csi_dsp_post_process_defs.h"
+#include "dsp_ps_ns.h"
+#include "list.h"
+#include <pthread.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+
+struct csi_dsp_logger{
+
+    struct xrp_queue *comm_queue;
+    struct log_ops{
+        int (*create)(int mode);
+        int(*enable)();
+        int (*disable)();
+    };
+};
+
+struct csi_dsp_monitor{
+    
+    struct xrp_queue *comm_queue;
+    struct mon_ops{
+        int(*enable)();
+        int (*disable)();
+    };
+};
+
+
+
+typedef struct dsp_handler_item{
+    struct list_head head;
+    void* handler;
+}dsp_handler_item_t;
+
+struct csi_dsp_instance{
+    int  id;
+    struct xrp_device *device;
+    struct xrp_queue *comm_queue;
+    struct csi_dsp_logger *logger_impl;
+    struct csi_dsp_monitor *monitor_impl;
+    struct xrp_report *report_impl;
+
+    struct list_head task_list;
+
+};
+
+struct csi_dsp_task_handler{
+    int  task_id;  
+    char task_ns[TASK_NAME_LINE];
+    
+    csi_dsp_task_mode_e mode;
+    struct csi_dsp_instance *instance;
+    struct xrp_queue  *queue;
+    struct csi_dsp_task_fe_para fe;
+
+    struct csi_dsp_task_be_para be;
+
+    struct csi_dsp_algo_config_par algo;
+
+    struct xrp_buffer_group *buffers;    //store task level buf info
+    int  priority;
+    int  report_id;
+    uint32_t  report_size;
+    int (*cb)(void*context,void*data);
+    void *context;
+    void *private;
+
+};
+
+typedef struct task_event_item{
+    struct list_head head;
+    struct xrp_event * event;
+    struct csi_sw_task_req* req;
+    csi_dsp_status_e req_status;
+}task_event_item_t;
+
+typedef struct csi_dsp_sw_task_manager{
+
+    struct list_head event_list;
+    int event_num;
+    pthread_mutex_t mutex;
+}csi_dsp_sw_task_manager_t;
+
+int csi_dsp_test_config(void* dsp ,struct csi_dsp_ip_test_par* config_para,void* buf);
+int csi_dsp_cmd_send(const struct xrp_queue *queue,int cmd_type,void * cmd_payload,
+                                    size_t payload_size,void *resp, size_t resp_size,struct xrp_buffer_group *buffer_group);
+int csi_dsp_enable_heartbeat_check(struct csi_dsp_instance *dsp ,int secs);
+
+int csi_dsp_disable_heartbeat_check();
+int csi_dsp_buf_flush( struct xrp_device *device,struct csi_dsp_buffer *buffers);
+#ifdef __cplusplus
+}
+#endif
+
+#endif

+ 159 - 0
driver/xrp-user/dsp-ps/csi_dsp_helper.c

@@ -0,0 +1,159 @@
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+
+#include "../include/xrp_api.h"
+#include "../include/dsp_ps_ns.h"
+#include "../include/csi_dsp_api.h"
+#include "csi_dsp_core.h"
+#include "csi_dsp_task_defs.h"
+#include "dsp_common.h"
+// #include "../xrp-host/xrp_host_common.h"
+struct csi_dsp_instance *instance = NULL;
+void csi_dsp_heartbeak_polling()
+{
+     dsp_handler_item_t *task_item =NULL;
+     struct itimerval val,oval;
+     struct csi_dsp_task_handler *task;
+    //  static counter =0;
+
+    DSP_PRINT(INFO,"heartbeat checking\n");
+     if(instance == NULL)
+     {
+         DSP_PRINT(WARNING,"dsp instance is NULL\n");
+         return;
+     }
+    // counter++;
+     /*close timer*/
+     val.it_value.tv_sec = 0;
+     val.it_value.tv_usec =0;
+     val.it_interval.tv_sec = 0;
+     val.it_interval.tv_usec =0;
+     setitimer(ITIMER_REAL,&val,&oval);
+
+     if(csi_dsp_cmd_send(instance->comm_queue,PS_CMD_HEART_BEAT_REQ,NULL,0,NULL,0,NULL))
+     {
+            DSP_PRINT(WARNING,"PS_CMD_TASK_ALLOC fail\n");
+            s_cmd_t cmd = 
+            {
+                .cmd=CSI_DSP_REPORT_HEARTBEAT_ERR,
+            };
+            list_for_each_entry(task_item,&instance->task_list,head)
+            {
+                task = task_item->handler;
+                if(task->mode & CSI_DSP_TASK_HW)
+                {
+                    if(task->cb)
+                        task->cb(task->context,&cmd);
+                }
+            }
+     }
+    /*restore  timer*/
+     setitimer(ITIMER_REAL,&oval,NULL);
+     return;
+}
+
+
+int csi_dsp_enable_heartbeat_check(struct csi_dsp_instance *dsp ,int secs)
+{
+    struct itimerval val,oval;
+    signal(SIGALRM,csi_dsp_heartbeak_polling);
+    val.it_value.tv_sec = secs;
+    val.it_value.tv_usec =0;
+    val.it_interval.tv_sec = secs;
+    val.it_interval.tv_usec =0;
+    instance = dsp;
+    DSP_PRINT(DEBUG,"period:%d sec hearbeat working\n",secs);
+    return setitimer(ITIMER_REAL,&val,&oval);
+
+}
+
+int csi_dsp_disable_heartbeat_check()
+{
+    struct itimerval val;
+    val.it_value.tv_sec = 0;
+    val.it_value.tv_usec =0;
+    val.it_interval.tv_sec = 0;
+    val.it_interval.tv_usec =0;
+    instance = NULL;
+   DSP_PRINT(INFO,"sec hearbeat disable\n");
+    return setitimer(ITIMER_REAL,&val,NULL);
+
+}
+void isp_algo_result_handler(void *context,void *data)
+{
+    s_cmd_t *msg=(s_cmd_t *)data;
+    printf("report recived:%x\n",msg->cmd);
+    switch(msg->cmd)
+    {
+        case CSI_DSP_REPORT_ISP_ERR:
+                printf("ISP error:%d\n",msg->data[0]);
+            break;
+        case CSI_DSP_REPORT_RY_ERR:
+                printf("Post ISP error\n",msg->data[0]);
+            break;
+        case CSI_DSP_REPORT_ALGO_ERR:
+                printf("algo err\n");
+            break;
+        case CSI_DSP_REPORT_VI_PRE_ERR:
+            break;
+        case  CSI_DSP_REPORT_RESULT:
+            break;
+        case CSI_DSP_REPORT_HEARTBEAT_ERR:
+                 printf("heartbeat not detect\n");
+            break;
+        default:
+            break;
+           
+    }
+
+}
+
+
+int csi_dsp_buf_flush( struct xrp_device *device,struct csi_dsp_buffer *buffers)
+{
+    int loop;
+    enum xrp_status status;
+    int flag = buffers->dir == CSI_DSP_BUFFER_IN ?XRP_READ:XRP_WRITE;
+    if(buffers->type == CSI_DSP_BUF_TYPE_DMA_BUF_IMPORT ||
+          buffers->type == CSI_DSP_BUF_TYPE_DMA_BUF_IMPORT  )
+    {
+        for(loop=0;loop<buffers->plane_count;loop++)
+        {
+            xrp_flush_dma_buf(device, buffers->planes[loop].fd,flag,&status);
+        }
+        
+    }
+
+}
+
+// void hw_task_result_handler(void *context,void *data)
+// {
+//     s_cmd_t *msg=(s_cmd_t *)data;
+//     struct csi_dsp_task_handler * task = (struct csi_dsp_task_handler *)context;
+//     printf("report recived:%x\n",msg->cmd);
+//     switch(msg->cmd)
+//     {
+//         case VI_SYS_REPORT_ISP_ERR:
+//                 printf("ISP error:%d\n",msg->data[0]);
+//                 break;
+//         case VI_SYS_REPORT_RY_ERR:
+//                 printf("Post ISP error\n",msg->data[0]);
+//                 break;
+//         case VI_SYS_REPORT_ALGO_ERR:
+//                 printf("algo err\n");
+//                 break;
+//         case VI_SYS_REPORT_RESULT:
+//             if(task->cb)
+//             {
+//                 task->cb(task->context,)
+//             }
+//             break;
+//         default:
+//             break;      
+//     }
+// }

+ 46 - 0
driver/xrp-user/dsp-ps/dsp_common.c

@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2022 Alibaba Group. All rights reserved.
+ * License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ */
+
+#include "dsp_common.h"
+
+int log_level = CSI_DSP_LOG_INFO;
+int pid = 0;
+
+
+static int getLogLevel()
+{
+    pid = getpid();
+    char *env = getenv("LIGHT_DSP_LOG_LEVEL");
+   
+    if (env == NULL)
+        return CSI_DSP_LOG_ERROR;
+    else
+    {
+        int level = atoi(env);
+        if (level >= CSI_DSP_LOG_MAX || level < CSI_DSP_LOG_QUIET)
+            return CSI_DSP_LOG_ERROR;
+        else
+            return level;
+    }
+}
+
+void dsp_InitEnv()
+{
+    log_level = getLogLevel();
+
+}

+ 353 - 0
driver/xrp-user/dsp-ps/list.h

@@ -0,0 +1,353 @@
+/*
+ * Copyright © 2010 Intel Corporation
+ * Copyright © 2010 Francisco Jerez <currojerez@riseup.net>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+/* Modified by Ben Skeggs <bskeggs@redhat.com> to match kernel list APIs */
+
+#ifndef _XORG_LIST_H_
+#define _XORG_LIST_H_
+
+/**
+ * @file Classic doubly-link circular list implementation.
+ * For real usage examples of the linked list, see the file test/list.c
+ *
+ * Example:
+ * We need to keep a list of struct foo in the parent struct bar, i.e. what
+ * we want is something like this.
+ *
+ *     struct bar {
+ *          ...
+ *          struct foo *list_of_foos; -----> struct foo {}, struct foo {}, struct foo{}
+ *          ...
+ *     }
+ *
+ * We need one list head in bar and a list element in all list_of_foos (both are of
+ * data type 'struct list_head').
+ *
+ *     struct bar {
+ *          ...
+ *          struct list_head list_of_foos;
+ *          ...
+ *     }
+ *
+ *     struct foo {
+ *          ...
+ *          struct list_head entry;
+ *          ...
+ *     }
+ *
+ * Now we initialize the list head:
+ *
+ *     struct bar bar;
+ *     ...
+ *     INIT_LIST_HEAD(&bar.list_of_foos);
+ *
+ * Then we create the first element and add it to this list:
+ *
+ *     struct foo *foo = malloc(...);
+ *     ....
+ *     list_add(&foo->entry, &bar.list_of_foos);
+ *
+ * Repeat the above for each element you want to add to the list. Deleting
+ * works with the element itself.
+ *      list_del(&foo->entry);
+ *      free(foo);
+ *
+ * Note: calling list_del(&bar.list_of_foos) will set bar.list_of_foos to an empty
+ * list again.
+ *
+ * Looping through the list requires a 'struct foo' as iterator and the
+ * name of the field the subnodes use.
+ *
+ * struct foo *iterator;
+ * list_for_each_entry(iterator, &bar.list_of_foos, entry) {
+ *      if (iterator->something == ...)
+ *             ...
+ * }
+ *
+ * Note: You must not call list_del() on the iterator if you continue the
+ * loop. You need to run the safe for-each loop instead:
+ *
+ * struct foo *iterator, *next;
+ * list_for_each_entry_safe(iterator, next, &bar.list_of_foos, entry) {
+ *      if (...)
+ *              list_del(&iterator->entry);
+ * }
+ *
+ */
+
+/**
+ * The linkage struct for list nodes. This struct must be part of your
+ * to-be-linked struct. struct list_head is required for both the head of the
+ * list and for each list node.
+ *
+ * Position and name of the struct list_head field is irrelevant.
+ * There are no requirements that elements of a list are of the same type.
+ * There are no requirements for a list head, any struct list_head can be a list
+ * head.
+ */
+struct list_head {
+    struct list_head *next, *prev;
+};
+
+/**
+ * Initialize the list as an empty list.
+ *
+ * Example:
+ * INIT_LIST_HEAD(&bar->list_of_foos);
+ *
+ * @param The list to initialized.
+ */
+#define LIST_HEAD_INIT(name) { &(name), &(name) }
+
+#define LIST_HEAD(name) \
+	struct list_head name = LIST_HEAD_INIT(name)
+
+static inline void
+INIT_LIST_HEAD(struct list_head *list)
+{
+    list->next = list->prev = list;
+}
+
+static inline void
+__list_add(struct list_head *entry,
+                struct list_head *prev, struct list_head *next)
+{
+    next->prev = entry;
+    entry->next = next;
+    entry->prev = prev;
+    prev->next = entry;
+}
+
+/**
+ * Insert a new element after the given list head. The new element does not
+ * need to be initialised as empty list.
+ * The list changes from:
+ *      head → some element → ...
+ * to
+ *      head → new element → older element → ...
+ *
+ * Example:
+ * struct foo *newfoo = malloc(...);
+ * list_add(&newfoo->entry, &bar->list_of_foos);
+ *
+ * @param entry The new element to prepend to the list.
+ * @param head The existing list.
+ */
+static inline void
+list_add(struct list_head *entry, struct list_head *head)
+{
+    __list_add(entry, head, head->next);
+}
+
+/**
+ * Append a new element to the end of the list given with this list head.
+ *
+ * The list changes from:
+ *      head → some element → ... → lastelement
+ * to
+ *      head → some element → ... → lastelement → new element
+ *
+ * Example:
+ * struct foo *newfoo = malloc(...);
+ * list_add_tail(&newfoo->entry, &bar->list_of_foos);
+ *
+ * @param entry The new element to prepend to the list.
+ * @param head The existing list.
+ */
+static inline void
+list_add_tail(struct list_head *entry, struct list_head *head)
+{
+    __list_add(entry, head->prev, head);
+}
+
+static inline void
+__list_del(struct list_head *prev, struct list_head *next)
+{
+    next->prev = prev;
+    prev->next = next;
+}
+
+/**
+ * Remove the element from the list it is in. Using this function will reset
+ * the pointers to/from this element so it is removed from the list. It does
+ * NOT free the element itself or manipulate it otherwise.
+ *
+ * Using list_del on a pure list head (like in the example at the top of
+ * this file) will NOT remove the first element from
+ * the list but rather reset the list as empty list.
+ *
+ * Example:
+ * list_del(&foo->entry);
+ *
+ * @param entry The element to remove.
+ */
+static inline void
+list_del(struct list_head *entry)
+{
+    __list_del(entry->prev, entry->next);
+}
+
+static inline void
+list_del_init(struct list_head *entry)
+{
+    __list_del(entry->prev, entry->next);
+    INIT_LIST_HEAD(entry);
+}
+
+static inline void list_move_tail(struct list_head *list,
+				  struct list_head *head)
+{
+	__list_del(list->prev, list->next);
+	list_add_tail(list, head);
+}
+
+/**
+ * Check if the list is empty.
+ *
+ * Example:
+ * list_empty(&bar->list_of_foos);
+ *
+ * @return True if the list contains one or more elements or False otherwise.
+ */
+static inline int
+list_empty(struct list_head *head)
+{
+    return head->next == head;
+}
+
+/**
+ * Returns a pointer to the container of this list element.
+ *
+ * Example:
+ * struct foo* f;
+ * f = container_of(&foo->entry, struct foo, entry);
+ * assert(f == foo);
+ *
+ * @param ptr Pointer to the struct list_head.
+ * @param type Data type of the list element.
+ * @param member Member name of the struct list_head field in the list element.
+ * @return A pointer to the data struct containing the list head.
+ */
+#ifndef container_of
+#define container_of(ptr, type, member) \
+    (type *)((char *)(ptr) - (char *) &((type *)0)->member)
+#endif
+
+/**
+ * Alias of container_of
+ */
+#define list_entry(ptr, type, member) \
+    container_of(ptr, type, member)
+
+/**
+ * Retrieve the first list entry for the given list pointer.
+ *
+ * Example:
+ * struct foo *first;
+ * first = list_first_entry(&bar->list_of_foos, struct foo, list_of_foos);
+ *
+ * @param ptr The list head
+ * @param type Data type of the list element to retrieve
+ * @param member Member name of the struct list_head field in the list element.
+ * @return A pointer to the first list element.
+ */
+#define list_first_entry(ptr, type, member) \
+    list_entry((ptr)->next, type, member)
+
+/**
+ * Retrieve the last list entry for the given listpointer.
+ *
+ * Example:
+ * struct foo *first;
+ * first = list_last_entry(&bar->list_of_foos, struct foo, list_of_foos);
+ *
+ * @param ptr The list head
+ * @param type Data type of the list element to retrieve
+ * @param member Member name of the struct list_head field in the list element.
+ * @return A pointer to the last list element.
+ */
+#define list_last_entry(ptr, type, member) \
+    list_entry((ptr)->prev, type, member)
+
+#define __container_of(ptr, sample, member)				\
+    (void *)container_of((ptr), typeof(*(sample)), member)
+
+/**
+ * Loop through the list given by head and set pos to struct in the list.
+ *
+ * Example:
+ * struct foo *iterator;
+ * list_for_each_entry(iterator, &bar->list_of_foos, entry) {
+ *      [modify iterator]
+ * }
+ *
+ * This macro is not safe for node deletion. Use list_for_each_entry_safe
+ * instead.
+ *
+ * @param pos Iterator variable of the type of the list elements.
+ * @param head List head
+ * @param member Member name of the struct list_head in the list elements.
+ *
+ */
+#define list_for_each_entry(pos, head, member)				\
+    for (pos = __container_of((head)->next, pos, member);		\
+	 &pos->member != (head);					\
+	 pos = __container_of(pos->member.next, pos, member))
+
+/**
+ * Loop through the list, keeping a backup pointer to the element. This
+ * macro allows for the deletion of a list element while looping through the
+ * list.
+ *
+ * See list_for_each_entry for more details.
+ */
+#define list_for_each_entry_safe(pos, tmp, head, member)		\
+    for (pos = __container_of((head)->next, pos, member),		\
+	 tmp = __container_of(pos->member.next, pos, member);		\
+	 &pos->member != (head);					\
+	 pos = tmp, tmp = __container_of(pos->member.next, tmp, member))
+
+
+#define list_for_each_entry_reverse(pos, head, member)			\
+	for (pos = __container_of((head)->prev, pos, member);		\
+	     &pos->member != (head);					\
+	     pos = __container_of(pos->member.prev, pos, member))
+
+#define list_for_each_entry_continue(pos, head, member)			\
+	for (pos = __container_of(pos->member.next, pos, member);	\
+	     &pos->member != (head);					\
+	     pos = __container_of(pos->member.next, pos, member))
+
+#define list_for_each_entry_continue_reverse(pos, head, member)		\
+	for (pos = __container_of(pos->member.prev, pos, member);	\
+	     &pos->member != (head);					\
+	     pos = __container_of(pos->member.prev, pos, member))
+
+#define list_for_each_entry_from(pos, head, member)			\
+	for (;								\
+	     &pos->member != (head);					\
+	     pos = __container_of(pos->member.next, pos, member))
+
+#endif

+ 232 - 0
driver/xrp-user/include/csi_dsp_api.h

@@ -0,0 +1,232 @@
+/*
+ * Copyright (c) 2021 Alibaba Group. All rights reserved.
+ * License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ */
+/*!
+ * \file 
+ * \brief This section defines CSI DSP API.
+ *
+ * General  properties:
+ * 1. API Handler DSP TASK CREATE
+ * 2. API Handler DSP ALGO config
+ * 3. API
+ */
+
+#ifndef _CSI_DSP_API_H
+#define _CSI_DSP_API_H
+
+#include <string.h>
+#include <stdint.h>
+#include "csi_dsp_task_defs.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/*************  CPU  interafce*********************************/
+
+/**
+ * @description:  * Open DSP device by index.
+
+ * @param {int} dsp_id dsp index to create
+ * @return {*} pointer to the opened device or NULL in case of error
+ */
+void *csi_dsp_create_instance(int dsp_id);
+
+/**
+ * @description: Close DSP device by index.
+ * @param {void} *dsp ,dsp index to close
+ * @return {int} return 0 when delete success, not 0 in case of error 
+ */
+int csi_dsp_delete_instance(void *dsp);
+
+/**
+ * @description: create an task on an instance 
+ * Task have a dependece Algo
+ * for CSI_DSP_TASK_HW (CSI_DSP_TASK_SW_TO_HW|CSI_DSP_TASK_SW_TO_SW)
+ * both csi_dsp_task_config_frontend and csi_dsp_task_config_backend are needed to call
+ * for CSI_DSP_TASK_SW_TO_SW use task req to handle seperate process req on this task 
+ * @param {void *} point to an dsp instance
+ * @param {csi_dsp_task_mode_e} task_type 
+ * @return {*}pointer to the createrf task or NULL in case of error
+ */
+void *csi_dsp_create_task(void * instance,csi_dsp_task_mode_e task_type);
+
+/**
+ * @description: create a report handler on an instance
+ * @param {void*} point to an dsp instance
+ * @return {int} return 0 when create success, not 0 in case of error 
+ */
+int csi_dsp_create_reporter(void* dsp);
+/**
+ * @description:  destroy a report handler on an instance
+ * @param {void}  point to an dsp instance
+ * @return {int}  return 0 when create success, not 0 in case of error 
+ */
+int csi_dsp_destroy_reporter(void *dsp);
+/**
+ * @description: destroy a task handler
+ * @param {void} *task, point to an task handler
+ * @return {int} return 0 when credestroy success, not 0 in case of error 
+ */
+void csi_dsp_destroy_task(void *task);
+
+/**
+ * @description: config a task's frontend ,for SW Task 
+ * @param {void} *task
+ * @param {csi_dsp_task_fe_para} *config_para
+ * @return {*}
+ */
+int csi_dsp_task_config_frontend(void *task,struct csi_dsp_task_fe_para *config_para);
+
+/**
+ * @description: 
+ * @param {void} *task
+ * @param {csi_dsp_task_fe_para} *config_para
+ * @return {*}
+ */
+int csi_dsp_task_get_frontend(void *task,struct csi_dsp_task_fe_para *config_para);
+/**
+ * @description: 
+ * @param {void} *task
+ * @param {csi_dsp_task_be_para} *config_para
+ * @return {*}
+ */
+int csi_dsp_task_config_backend(void *task,struct csi_dsp_task_be_para *config_para);
+/**
+ * @description: 
+ * @param {void} *task
+ * @param {csi_dsp_task_be_para} *config_para
+ * @return {*}
+ */
+int csi_dsp_task_get_backend(void *task,struct csi_dsp_task_be_para *config_para);
+/**
+ * @description: 
+ * @param {void} *task
+ * @param {csi_dsp_algo_config_par} *config_para
+ * @return {*}
+ */
+int csi_dsp_task_config_algo(void *task,struct csi_dsp_algo_config_par *config_para);
+/**
+ * @description: 
+ * @param {void} *task_ctx
+ * @param {csi_dsp_algo_load_req_t*} config_para
+ * @return {*}
+ */
+int csi_dsp_task_load_algo(void *task_ctx, csi_dsp_algo_load_req_t* config_para);
+/**
+ * @description: 
+ * @param {void} *task_ctx
+ * @return {*}
+ */
+int csi_dsp_task_acquire_algo(void *task_ctx,char*name);
+/**
+ * @description: 
+ * @param {void} *task
+ * @return {*}
+ */
+int csi_dsp_task_start(void *task);
+/**
+ * @description: 
+ * @param {void} *task
+ * @return {*}
+ */
+int csi_dsp_task_stop(void *task);
+/**
+ * @description: 
+ * @param {void} *task
+ * @param {  } int
+ * @param {void*} context
+ * @param {size_t} data_size
+ * @return {*}
+ */
+int csi_dsp_task_register_cb(void *task,
+                            int (*cb)(void*context,void*data),
+                            void* context,
+                            size_t data_size);
+/**
+ * @description: 
+ * @param {void} *task
+ * @return {*}
+ */
+int csi_dsp_ps_task_unregister_cb(void *task);
+
+/**
+ * @description: 
+ * @param {void} *task
+ * @return {*}
+ */
+struct csi_sw_task_req* csi_dsp_task_create_request(void *task);
+
+/**
+ * @description: 
+ * @param {void *} task_ctx
+ * @param {csi_dsp_buffer *} buffer
+ * @return {*}
+ */
+int csi_dsp_task_create_buffer(void * task_ctx,struct csi_dsp_buffer * buffer);
+/**
+ * @description: 
+ * @param {void *} task_ctx
+ * @param {csi_dsp_buffer *} buffer
+ * @return {*}
+ */
+int csi_dsp_task_free_buffer(void * task_ctx,struct csi_dsp_buffer * buffer);
+/**
+ * @description: 
+ * @param {csi_sw_task_req*} req
+ * @param {csi_dsp_buffer *} buffer
+ * @return {*}
+ */
+int csi_dsp_request_add_buffer(struct csi_sw_task_req* req,struct csi_dsp_buffer * buffer);
+
+/**
+ * @description: 
+ * @param {csi_sw_task_req*} req
+ * @param {void*} property
+ * @param {size_t} sz
+ * @return {*}
+ */
+int csi_dsp_request_set_property(struct csi_sw_task_req* req,void* property,size_t sz);
+
+/**
+ * @description: 
+ * @param {csi_sw_task_req*} req
+ * @return {*}
+ */
+int csi_dsp_request_enqueue(struct csi_sw_task_req* req);
+/**
+ * @description: 
+ * @param {void} *task
+ * @return {*}
+ */
+struct csi_sw_task_req*  csi_dsp_request_dequeue(void *task);
+
+/**
+ * @description: 
+ * @param {csi_sw_task_req*} req
+ * @return {*}
+ */
+int csi_dsp_task_release_request(struct csi_sw_task_req* req);
+
+
+int csi_dsp_task_update_backend_buf(void *task_ctx,struct csi_dsp_task_be_para* config_para);
+int csi_dsp_test_config(void* dsp ,struct csi_dsp_ip_test_par* config_para,void* buf);
+#ifdef __cplusplus
+}
+#endif
+
+#endif

+ 144 - 0
driver/xrp-user/include/csi_dsp_post_process_defs.h

@@ -0,0 +1,144 @@
+/*
+ * Copyright (c) 2021 Alibaba Group. All rights reserved.
+ * License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ */
+/*!
+ * \file 
+ * \brief This section defines DSP shared strcut for CPU&DSP&APP.
+ *
+ * General  properties:
+ * 1. Post porcess define data and strcut, visiable for APP
+ * 2. user define data shared bedtween DSP ans host
+ */
+
+#ifndef _CSI_DSP_POST_DEFS_H
+#define _CSI_DSP_POST_DEFS_H
+
+#include <string.h>
+#include <stdint.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#define CSI_DSP_MAX_BUFFER   8
+typedef uint8_t dsp_id_t;
+
+
+
+typedef enum csi_dsp_img_fmt{
+	CSI_DSP_IMG_FMT_RAW8 =0,
+	CSI_DSP_IMG_FMT_RAW10_UNALGIN,
+	CSI_DSP_IMG_FMT_RAW10_ALGIN,
+	CSI_DSP_IMG_FMT_RAW12_UNALGIN,
+	CSI_DSP_IMG_FMT_RAW12_ALGIN,
+	CSI_DSP_IMG_FMT_RAW16_UNALGIN,
+	CSI_DSP_IMG_FMT_RAW16_ALGIN,
+	CSI_DSP_IMG_FMT_NV12,
+	CSI_DSP_IMG_FMT_NV21,
+	CSI_DSP_IMG_FMT_I420,         	/* 420 3P Y/U/V */
+	CSI_DSP_IMG_FMT_YV12,         	/* 420 3P Y/V/U */
+	CSI_DSP_IMG_FMT_YUY2,         	/* 422 1P YUYV  */
+	CSI_DSP_IMG_FMT_YVYU,         	/* 422 1P YVYU  */
+	CSI_DSP_IMG_FMT_YV16,         	/* 422 3P Y/V/U */
+	CSI_DSP_IMG_FMT_Y,         	/* Y only  		*/
+	CSI_DSP_IMG_FMT_420_CHROME,  	/* u or v only	*/
+	CSI_DSP_IMG_FMT_422_CHROME,   	/* u or v only	*/
+	CSI_DSP_IMG_FMT_420_UV_IL,   	/* uv interleave*/
+	CSI_DSP_IMG_FMT_422_UV_IL,   	/* uv interleave*/
+	CSI_DSP_IMG_FMT_INVALID,
+
+
+} csi_dsp_img_fmt_e;
+
+enum buffer_property{
+    CSI_DSP_BUFFER_IN,
+    CSI_DSP_BUFFER_OUT,
+    CSI_DSP_BUFFER_IN_OUT,
+
+};
+
+struct csi_dsp_plane {
+
+	int      fd;
+    uint32_t stride;         /* if buffer type is image */
+	uint32_t size;
+	uint64_t buf_phy;            
+    uint64_t buf_vir;
+};
+
+typedef enum csi_dsp_buf_type {
+	CSI_DSP_BUF_TYPE_DMA_BUF_IMPORT,		// memory allocated via dma-buf from extern
+    CSI_DSP_BUF_TYPE_DMA_BUF_EXPORT,     // memory allocated via dma-buf from internal
+	CSI_DSP_BUF_ALLOC_APP,	// memory allocated via APP malloc
+    CSI_DSP_BUF_ALLOC_DRV,  // memory allocated via DSP Drvier
+    CSI_DSP_BUF_ALLOC_FM,   // memory will auto acquire by DSP FM
+} csi_dsp_buf_type_e;
+
+struct csi_dsp_buffer {
+	dsp_id_t buf_id;
+    enum buffer_property dir;   
+    csi_dsp_buf_type_e type;
+	uint8_t format;
+	uint8_t plane_count;
+	uint32_t width;
+	uint32_t height;
+	struct csi_dsp_plane planes[3];
+};
+ struct csi_dsp_algo_config_par{
+	int16_t  algo_id;
+    int       task_id;
+    uint64_t  algo_ptr;
+    uint64_t  sett_ptr;
+    uint32_t  sett_length;
+    uint64_t  bufs_ptr;
+    uint32_t  buf_num;
+    uint32_t  algo_size;
+  
+};
+typedef enum csi_dsp_sw_req_status {
+	CSI_DSP_SW_REQ_IDLE,
+	CSI_DSP_SW_REQ_RUNNING,
+    CSI_DSP_SW_REQ_FAIL,
+    CSI_DSP_SW_REQ_DONE,
+} csi_dsp_sw_req_status_e;
+
+struct csi_sw_task_req{
+
+    uint16_t  algo_id;
+    uint16_t  request_id;
+    uint16_t  buffer_num; 
+    csi_dsp_sw_req_status_e  status;
+    uint32_t  sett_length;
+    uint64_t  sett_ptr;
+    struct csi_dsp_buffer buffers[CSI_DSP_MAX_BUFFER];
+    void *task;
+    void* priv;
+};
+
+
+typedef enum csi_dsp_algo_lib_id{
+	CSI_DSP_ALGO_LIB_COPY,
+	CSI_DSP_ALGO_LIB_0,
+	CSI_DSP_ALGO_LIB_1,
+
+}csi_dsp_algo_lib_id_e;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

+ 229 - 0
driver/xrp-user/include/csi_dsp_task_defs.h

@@ -0,0 +1,229 @@
+/*
+ * Copyright (c) 2021 Alibaba Group. All rights reserved.
+ * License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ */
+/*!
+ * \file 
+ * \brief This section defines DSP shared strcut for CPU&DSP&APP.
+ *
+ * General  properties:
+ * 1. Post porcess define data and strcut, visiable for APP
+ * 2. user define data shared bedtween DSP ans host
+ */
+
+#ifndef _CSI_DSP_TASK_DEFS_H
+#define _CSI_DSP_TASK_DEFS_H
+
+#include <string.h>
+#include <stdint.h>
+#include "csi_dsp_post_process_defs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define  MAX_REPORT_SIZE  256
+
+#define  CSI_DSP_HW_TASK_EXTRA_BUF_START_INDEX  2
+typedef struct {
+	uint16_t id;
+	uint16_t hor;
+	uint16_t ver;
+	uint16_t data_fmt;
+	uint16_t line_in_entry;
+	uint16_t line_stride;
+	uint32_t buffer_size;
+	uint64_t buffer_addr;
+}sisp_config_par;
+
+typedef   sisp_config_par spost_isp_config_par;
+// typedef   sisp_config_par svipre_config_par;
+typedef  struct vipre_config_par{
+    uint8_t  id;
+	uint8_t  act_channel;
+	uint8_t  data_fmt;
+	uint8_t  buffer_num;
+	uint16_t line_num;
+	uint16_t hor;
+	uint16_t ver;
+	uint16_t line_stride;
+	uint32_t buffer_size;
+	uint64_t buffer_addr[12];
+}vipre_config_par_t;
+
+typedef struct {
+	uint16_t algo_id;
+	float gamma;  // float鍙傛暟
+	float coef1;
+	float coef2;
+	float coef3;
+	float coef4;
+	short beta;			// short鍨嬪弬鏁�
+	short beta1;
+	short beta2;
+	short beta3;
+	short beta4;
+}salgo_config_par;
+
+
+typedef enum{
+  CSI_DSP_REPORT_NORMAL,
+  CSI_DSP_REPORT_RESULT,
+  CSI_DSP_REPORT_RESULT_WITH_EXRA_PARAM,
+  CSI_DSP_REPORT_ALGO_ERR,
+  CSI_DSP_REPORT_PS_ERR,
+  CSI_DSP_REPORT_ISP_ERR,
+  CSI_DSP_REPORT_RY_ERR,
+  CSI_DSP_REPORT_VI_PRE_ERR,
+  CSI_DSP_REPORT_NO_BUF,
+  CSI_DSP_REPORT_HEARTBEAT_ERR,
+  CSI_DSP_HW_FRAME_DROP,
+  CSI_DSP_REPORT_EXRA_PARAM,
+}csi_dsp_report_e;
+
+typedef struct dsp_frame{
+  uint64_t p_frame_buff[3];
+  uint32_t frame_buff_size[3];
+  int32_t  frame_width;
+  int32_t  frame_height;
+  int32_t  frame_pitch;
+  uint8_t  pixel_res;
+  uint8_t  num_channels;
+  int8_t   fmt;
+}dsp_frame_t;
+
+
+
+typedef enum csi_dsp_task_mode{
+    CSI_DSP_TASK_SW_TO_SW =0x1<<0,  /*SW Queue to handle in / data/exception  */
+    CSI_DSP_TASK_SW_TO_HW =0x1<<1,  /*SW Queue to handle in and exception / Report handlere exception,HW handl out*/
+    CSI_DSP_TASK_HW_TO_SW =0x1<<2,  /* HW send handle in, Report handler  out and exception*/
+    CSI_DSP_TASK_HW_TO_HW =0x01<<3, /* Hw handler in&out Report handler exception*/
+    CSI_DSP_TASK_SW = (CSI_DSP_TASK_SW_TO_HW|CSI_DSP_TASK_SW_TO_SW),
+    CSI_DSP_TASK_HW = (CSI_DSP_TASK_HW_TO_SW|CSI_DSP_TASK_HW_TO_HW),
+}csi_dsp_task_mode_e;
+
+//#define  CSI_DSP_TASK_SW  (CSI_DSP_TASK_SW_TO_HW|CSI_DSP_TASK_SW_TO_SW)
+//#define  CSI_DSP_TASK_HW  (CSI_DSP_TASK_HW_TO_SW|CSI_DSP_TASK_HW_TO_HW)
+
+typedef enum csi_dsp_status{
+    CSI_DSP_ERR_ILLEGAL_PARAM = -100,
+    CSI_DSP_TASK_NOT_VALID,
+    CSI_DSP_TASK_ALLOC_FAIL,
+    CSI_DSP_TASK_ADD_TO_SCHEDULER_FAIL,
+    CSI_DSP_TASK_ALREADY_RUNNING,
+    CSI_DSP_TASK_START_FAIL,
+    CSI_DSP_REPORTER_NOT_INIT,
+    CSI_DSP_FE_NOT_VALID,
+    CSI_DSP_FE_CONFIG_FAIL,
+    CSI_DSP_BE_CONFIG_FAIL,
+    CSI_DSP_BE_NOT_VALID,
+    CSI_DSP_ALGO_INVALID,
+    CSI_DSP_ALGO_ERR,
+    CSI_DSP_FE_ERR,
+    CSI_DSP_BE_ERR,
+    CSI_DSP_BUF_TYPE_ERR,
+    CSI_DSP_ALGO_LOAD_FAIL,
+    CSI_DSP_MALLO_FAIL,
+    CSI_DSP_ALGO_BUF_FAIL,
+    CSI_DSP_FAIL,
+    CSI_DSP_OK = 0,
+}csi_dsp_status_e;
+
+struct csi_dsp_task_create_req{
+    csi_dsp_task_mode_e type;
+    int priority;
+};
+
+
+
+struct csi_dsp_task_comm_resp{
+    csi_dsp_status_e status;
+};
+enum csi_dsp_fe_type{
+    CSI_DSP_FE_TYPE_CPU,
+    CSI_DSP_FE_TYPE_ISP,
+    CSI_DSP_FE_TYPE_VIPRE,
+    CSI_DSP_FE_TYPE_INVALID,
+};
+
+enum csi_dsp_be_type{
+    CSI_DSP_BE_TYPE_HOST,
+    CSI_DSP_BE_TYPE_POST_ISP,
+    CSI_DSP_BE_TYPE_INVALID,
+};
+
+enum csi_dsp_task_cfg{
+    CSI_DSP_TASK_IDLE,
+    CSI_DSP_TASK_START,
+    CSI_DSP_TASK_STOP,
+
+};
+
+struct csi_dsp_task_fe_para{
+    enum csi_dsp_fe_type frontend_type;
+    int task_id;
+    union{
+            sisp_config_par isp_param;
+            vipre_config_par_t vipre_param;
+    };
+};
+typedef struct _sw_be_config_par{
+    int num_buf;
+    struct csi_dsp_buffer bufs[1];
+
+}sw_be_config_par;
+
+struct csi_dsp_task_be_para{
+    enum csi_dsp_be_type backend_type;
+    int task_id;
+    union{
+            sisp_config_par post_isp_param;
+            sw_be_config_par sw_param;
+    };
+
+};
+
+typedef struct csi_dsp_report_item{
+    csi_dsp_report_e type;
+    union{
+        char data[MAX_REPORT_SIZE];
+        struct csi_dsp_buffer buf;
+    };
+}csi_dsp_report_item_t;
+
+typedef struct csi_dsp_algo_load_req{
+	uint16_t  algo_id;
+    int task_id;
+    uint64_t  algo_ptr;
+}csi_dsp_algo_load_req_t;
+
+typedef struct csi_dsp_algo_load_resp{
+	csi_dsp_status_e status;
+	uint16_t  algo_id;
+	uint16_t  buf_desc_num;
+	uint16_t  info_prop_des_num;
+	uint16_t  set_prop_des_num;
+}csi_dsp_algo_load_resp_t;
+
+
+void isp_algo_result_handler(void *context,void *data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

+ 91 - 0
driver/xrp-user/include/dsp_common.h

@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2022 Alibaba Group. All rights reserved.
+ * License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ */
+
+#ifndef _DSP_COMMON_H_
+#define _DSP_COMMON_H_
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <memory.h>
+
+
+#define DSP_MIN(a, b) ((a) < (b) ? (a) : (b))
+#define DSP_MAX(a, b) ((a) > (b) ? (a) : (b))
+#define DSP_ALIGN_UP(num, bits) (((num) + (1 << (bits)) - 1) & ~((1 << (bits)) - 1))
+
+#define DSP_ZERO_MEMORY(data) \
+    { \
+        memset(data, 0, sizeof(*(data))); \
+    }
+
+#define DSP_MEMCPY(dst, src, size) \
+    { \
+        memcpy(dst, src, size); \
+    }
+
+#define DSP_SAFE_FREE(buf) \
+    { \
+        if (buf != NULL) \
+        { \
+            free(buf); \
+            buf = NULL; \
+        } \
+    }
+
+#define DSP_PRINT(level, ...) \
+    { \
+        if (log_level >= CSI_DSP_LOG_##level) \
+        { \
+            printf("CSI_DSP[%d] %s,(%s,%d): ", pid, #level,__FUNCTION__,__LINE__);  \
+            printf(__VA_ARGS__); \
+        } \
+    }
+
+#define DSP_PRINT_RETURN(retcode, level, ...) \
+    { \
+        DSP_PRINT(level, __VA_ARGS__) \
+        return retcode; \
+    }
+
+#define DSP_CHECK_CONDITION(cond, retcode, ...) \
+    if (cond) \
+    { \
+        DSP_PRINT(ERROR, __VA_ARGS__) \
+        return retcode; \
+    }
+
+
+
+typedef enum log_level
+{
+    CSI_DSP_LOG_QUIET = 0,
+    CSI_DSP_LOG_ERROR,
+    CSI_DSP_LOG_WARNING,
+    CSI_DSP_LOG_INFO,
+    CSI_DSP_LOG_DEBUG,
+    CSI_DSP_LOG_TRACE,
+    CSI_DSP_LOG_MAX
+} csi_dsp_log_level;
+
+extern int log_level;
+extern int pid;
+
+void dsp_InitEnv();
+
+#endif 

+ 144 - 0
driver/xrp-user/include/dsp_ps_ns.h

@@ -0,0 +1,144 @@
+/*
+ * Copyright (c) 2021 Alibaba Group. All rights reserved.
+ * License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ */
+/*!
+ * \file 
+ * \brief This section defines DSP and host shared data and strcut.
+ *
+ * General  properties:
+ * 1. Define the common shared struct for both DSP and Host
+ * 2. The shared strcut only visible internal, for those open to APP shou be define in dsp_post_process_defs
+ */
+
+#ifndef _DSP_PS_NS_H
+#define _DSP_PS_NS_H
+
+#include <stdint.h>
+
+#include "xrp_api.h"
+#include "csi_dsp_task_defs.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+// enum {
+//   PS_CMD_IDLE = 0,
+//   PS_CMD_INLINE_START =PS_CMD_IDLE,
+//   PS_CMD_LOOPBACK_TEST,
+//   PS_CMD_ISP_CONFIG,
+//   PS_CMD_RY_CONFIG,
+//   PS_CMD_ISP_ALGO_CONFIG,
+//   PS_CMD_QUERY_DRAM_SIZE,
+//   PS_CMD_SET_IO_BUFFER,
+//   PS_CMD_WITH_BUFFER_START,
+// };
+
+#define TASK_NAME_LINE  XRP_NAMESPACE_ID_SIZE
+#define XRP_PS_NSID_COMMON_CMD \
+    {0xf9, 0x3c, 0x09, 0x61, 0x9d, 0x3f, 0x45, 0x29, \
+    0xbd, 0xe9, 0x7a, 0x4b, 0x18, 0x91, 0xdb, 0x15}
+
+
+#define XRP_PS_NSID_ISP_ALGO \
+    {0xf9, 0x3c, 0x09, 0x61, 0x9d, 0x3f, 0x45, 0x29, \
+    0xbd, 0xe9, 0x7a, 0x4b, 0x18, 0x91, 0xdb, 0x14}
+
+typedef struct {
+	uint32_t  cmd;
+	uint32_t  data[1];
+}s_cmd_t;
+typedef enum {  
+  PS_CMD_IDLE = 0,
+  PS_CMD_INLINE_START =PS_CMD_IDLE,
+  PS_CMD_TASK_ALLOC,
+  PS_CMD_TASK_FREE,
+  PS_CMD_LOOPBACK_TEST,
+  PS_CMD_REPORT_CONFIG,
+  PS_CMD_LOG_CONFIG,
+  PS_CMD_HEART_BEAT_REQ,
+  PS_CMD_LOAD_MINITOR_REQ,
+  PS_CMD_FE_CONFIG,
+  PS_CMD_BE_CONFIG,
+
+  PS_CMD_ALGO_CONFIG,
+  PS_CMD_TASK_START,
+
+  PS_CMD_TASK_STOP,
+
+  PS_CMD_DATA_MOVE,
+
+  PS_CMD_DSP_IP_TEST,
+  PS_CMD_BE_ASSGIN_BUF,
+  PS_CMD_ALGO_LOAD,
+}ECOMMON_CMD;
+
+enum cmd_type{
+    CMD_SETUP,
+    CMD_RELEASE,
+    CMD_INVALID,
+};
+
+struct report_config_msg{
+  enum cmd_type flag;
+  int32_t  report_id;
+  char task[TASK_NAME_LINE];
+  uint32_t  size;
+  uint64_t  addr;
+};
+
+struct data_move_msg{
+  uint64_t  src_addr;
+  uint64_t  dst_addr;
+  uint32_t  size;
+};
+
+struct csi_dsp_task_start_req{
+    int  task_id;
+    char task_ns[TASK_NAME_LINE];
+};
+
+struct csi_dsp_task_create_resp{
+
+    csi_dsp_status_e status;
+    char task_ns[TASK_NAME_LINE];
+    int  task_id;
+    
+};
+
+struct csi_dsp_task_free_req{
+    int  task_id;
+    char task_ns[TASK_NAME_LINE];
+};
+
+struct csi_dsp_ip_test_par{
+	char case_name[32];
+    char case_goup[32];
+    int  result_buf_size;
+};
+
+//  struct csi_dsp_algo_config_par{
+// 	uint16_t algo_id;
+//     char* algo;
+//     union
+//     {
+//         float  gam_coef[4];
+//         short  beta_coef[4];
+//     };
+// };
+#ifdef __cplusplus
+}
+#endif
+#endif

+ 612 - 0
driver/xrp-user/include/xrp_api.h

@@ -0,0 +1,612 @@
+/*
+ * Copyright (c) 2016 - 2017 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*!
+ * \file xrp_api.h
+ * \brief This section defines XRP API.
+ *
+ * General API properties:
+ * - All status pointers can be NULL.
+ * - Reference counting is not meant to work across host/DSP boundary, i.e.
+ *   DSP may not retain the host buffer.
+ * - A buffer allocated for one device can be passed as command parameter to
+ *   a different device; implementation should do reasonable thing, e.g. use
+ *   the original data if possible or transparently migrate it to suitable
+ *   memory.
+ * - A group of API calls may be host side only, DSP side only, or usable on
+ *   both sides. When it's usable on both sides there may be additional
+ *   restrictions on the DSP side.
+ */
+
+#ifndef _XRP_API_H
+#define _XRP_API_H
+
+#include <stddef.h>
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * User API.
+ */
+
+struct xrp_device;
+struct xrp_queue;
+struct xrp_buffer;
+struct xrp_buffer_group;
+struct xrp_event;
+
+struct xrp_report;
+/*!
+ * Status codes of XRP calls.
+ */
+enum xrp_status {
+	/*! Call completed successfully. */
+	XRP_STATUS_SUCCESS,
+	/*! Call failed. */
+	XRP_STATUS_FAILURE,
+	/*! Call has not completed. */
+	XRP_STATUS_PENDING,
+};
+enum xrp_access_flags {
+	XRP_READ		= 0x1,
+	XRP_WRITE		= 0x2,
+	XRP_READ_WRITE		= 0x3,
+};
+
+/*!
+ * Types of information that may be queried for a buffer object.
+ */
+enum xrp_buffer_info {
+	/*! Size of the buffer. */
+	XRP_BUFFER_SIZE_SIZE_T,
+	/*! Host pointer of the buffer. */
+	XRP_BUFFER_HOST_POINTER_PTR,
+
+    XRP_BUFFER_PHY_ADDR,
+
+    XRP_BUFFER_USER_ADDR,
+};
+
+/*!
+ * Types of information that may be queried for a buffer group object.
+ */
+enum xrp_buffer_group_info {
+	/*! Access flags associated with a buffer. Requires buffer index. */
+	XRP_BUFFER_GROUP_BUFFER_FLAGS_ENUM,
+	/*! Number of buffers in the buffer group. Buffer index is ignored. */
+	XRP_BUFFER_GROUP_SIZE_SIZE_T,
+};
+
+#define XRP_NAMESPACE_ID_SIZE	16
+
+/*!
+ * \defgroup device_api Device API
+ * These calls are available on the host side and on the DSP side with the
+ * following restriction:
+ * - only device 0 may be opened.
+ * @{
+ */
+
+/*!
+ * Open device by index.
+ * A device is reference counted and is opened with reference count of 1.
+ * Devices are numbered sequentially starting at 0, they can be probed with
+ * simple loop.
+ * \param idx: device index to open
+ * \param[out] status: operation status
+ * \return pointer to the opened device or NULL in case of error
+ */
+struct xrp_device *xrp_open_device(int idx, enum xrp_status *status);
+
+/*!
+ * Increment device reference count.
+ */
+void xrp_retain_device(struct xrp_device *device);
+
+/*!
+ * Decrement device reference count (and free associated resources once the
+ * counter gets down to zero).
+ */
+void xrp_release_device(struct xrp_device *device);
+
+/*!
+ * @}
+ */
+
+/*!
+ * \defgroup buffer_api Buffer API
+ * These calls are available on the host side and on the DSP side with the
+ * following restriction:
+ * - buffers may not be created on the DSP side.
+ * @{
+ */
+
+/*!
+ * Create memory buffer and allocate device-specific storage (host_ptr == NULL)
+ * or use host buffer (host_ptr != NULL, treated as virtual address in the
+ * current process).
+ * A buffer is reference counted and is created with reference count of 1.
+ * \param[out] status: operation status
+ */
+struct xrp_buffer *xrp_create_buffer(struct xrp_device *device,
+				     size_t size, void *host_ptr,
+				     enum xrp_status *status);
+
+/*!
+ * Increment buffer reference count.
+ */
+void xrp_retain_buffer(struct xrp_buffer *buffer);
+
+/*!
+ * Decrement buffer reference count (and free the storage if it was allocated
+ * once the counter gets down to zero).
+ */
+void xrp_release_buffer(struct xrp_buffer *buffer);
+
+/*!
+ * Map subbuffer of the buffer. Buffer may be mapped multiple times.
+ *
+ * \param map_flags: access to the mapping requested by the mapper. Access
+ * to buffers on DSP side is subject to restrictions set by the host side.
+ * \param[out] status: operation status
+ */
+void *xrp_map_buffer(struct xrp_buffer *buffer, size_t offset, size_t size,
+		     enum xrp_access_flags map_flags, enum xrp_status *status);
+
+/*!
+ * Unmap previously mapped buffer.
+ * \param[out] status: operation status
+ */
+void xrp_unmap_buffer(struct xrp_buffer *buffer, void *p,
+		      enum xrp_status *status);
+
+/*!
+ * Get information about the buffer object.
+ *
+ * \param info: information type to retrieve.
+ * \param[out] out: pointer to return information to.
+ * \param out_sz: size of out buffer.
+ * \param[out] status: operation status
+ */
+void xrp_buffer_get_info(struct xrp_buffer *buffer, enum xrp_buffer_info info,
+			 void *out, size_t out_sz, enum xrp_status *status);
+
+/*!
+ * @}
+ */
+
+/*!
+ * \defgroup buffer_group_api Buffer Group API
+ * These calls are available on the host side and on the DSP side with the
+ * following restrictions:
+ * - buffer groups may not be created on the DSP side;
+ * - existing buffer groups may not be modified on the DSP side.
+ * @{
+ */
+
+/*!
+ * Create a group of shared buffers. Group is reference counted and is
+ * created with reference count of 1.
+ * \param[out] status: operation status
+ */
+struct xrp_buffer_group *xrp_create_buffer_group(enum xrp_status *status);
+
+/*!
+ * Increment buffer group reference count.
+ */
+void xrp_retain_buffer_group(struct xrp_buffer_group *group);
+
+/*!
+ * Decrement group reference count (and free it once the counter gets down
+ * to zero).
+ */
+void xrp_release_buffer_group(struct xrp_buffer_group *group);
+
+/*!
+ * Add buffer to the group and get its index.
+ * This adds a reference to the buffer.
+ *
+ * \param access_flags: granted access. User of the buffer on the DSP side
+ * will be able to map it only for this type of access.
+ * \param[out] status: operation status
+ */
+size_t xrp_add_buffer_to_group(struct xrp_buffer_group *group,
+			       struct xrp_buffer *buffer,
+			       enum xrp_access_flags access_flags,
+			       enum xrp_status *status);
+
+/*!
+ * Put new buffer to the existing index in the group.
+ * When operation succeeds it releases the buffer previously contained at
+ * that index and adds a reference to the new buffer.
+ *
+ * \param access_flags: granted access. User of the buffer on the DSP side
+ * will be able to map it only for this type of access.
+ * \param[out] status: operation status
+ */
+void xrp_set_buffer_in_group(struct xrp_buffer_group *group,
+			     size_t index,
+			     struct xrp_buffer *buffer,
+			     enum xrp_access_flags access_flags,
+			     enum xrp_status *status);
+
+/*!
+ * Get buffer from the group by its index.
+ * Buffer must be freed with release_buffer.
+ * \param[out] status: operation status
+ */
+struct xrp_buffer *xrp_get_buffer_from_group(struct xrp_buffer_group *group,
+					     size_t idx,
+					     enum xrp_status *status);
+
+/*!
+ * Get information about the buffer group object.
+ *
+ * \param info: information type to retrieve.
+ * \param idx: buffer index (if applicable).
+ * \param[out] out: pointer to return information to.
+ * \param out_sz: size of out buffer.
+ * \param[out] status: operation status
+ */
+void xrp_buffer_group_get_info(struct xrp_buffer_group *group,
+			       enum xrp_buffer_group_info info, size_t idx,
+			       void *out, size_t out_sz,
+			       enum xrp_status *status);
+
+/*!
+ * @}
+ */
+
+/*!
+ * \defgroup queue_api Queue API
+ * These calls are available only on the host side.
+ * @{
+ */
+
+/*!
+ * Create queue to the default namespace of the device.
+ * Queue is an ordered device communication channel. Queue is reference
+ * counted and is created with reference count of 1.
+ * \param[out] status: operation status
+ */
+struct xrp_queue *xrp_create_queue(struct xrp_device *device,
+				   enum xrp_status *status);
+
+/*!
+ * Create queue to the specified namespace of the device.
+ * Queue is an ordered device communication channel. Queue is reference
+ * counted and is created with reference count of 1.
+ * \param[out] status: operation status
+ */
+struct xrp_queue *xrp_create_ns_queue(struct xrp_device *device,
+				      const void *nsid,
+				      enum xrp_status *status);
+
+/*!
+ * Create queue to the specified namespace of the device with specific
+ * priority.
+ * Queue is an ordered device communication channel. Queue is reference
+ * counted and is created with reference count of 1.
+ * \param[out] status: operation status
+ */
+struct xrp_queue *xrp_create_nsp_queue(struct xrp_device *device,
+				       const void *nsid,
+				       int priority,
+				       enum xrp_status *status);
+
+/*!
+ * Increment queue reference count.
+ */
+void xrp_retain_queue(struct xrp_queue *queue);
+
+/*!
+ * Decrement queue reference count (and free it once the counter gets down
+ * to zero).
+ */
+void xrp_release_queue(struct xrp_queue *queue);
+
+/*!
+ * @}
+ */
+
+/*!
+ * \defgroup event_api Event API
+ * These calls are available only on the host side.
+ * @{
+ */
+
+/*!
+ * Increment event reference count.
+ */
+void xrp_retain_event(struct xrp_event *event);
+
+/*!
+ * Decrement event reference count (and free it once the counter gets down
+ * to zero).
+ */
+void xrp_release_event(struct xrp_event *event);
+
+
+/*!
+ * Get status of the event/associated command.
+ * The function may be called at any time, it sets *status to
+ * XRP_STATUS_PENDING if the command has not been executed yet, or to the
+ * command execution status. See status description of xrp_run_command_sync()
+ * for the description of command execution status.
+ * \param[out] status: operation status
+ */
+void xrp_event_status(struct xrp_event *event, enum xrp_status *status);
+
+/*!
+ * @}
+ */
+
+/*!
+ * \defgroup communication_api Communication API
+ * These calls are available only on the host side.
+ * @{
+ */
+
+/*
+ * Even more internal API related to command passing between cores.
+ * These are tightly coupled to the host-DSP communication model and
+ * are likely to be changed/enhanced as the model evolves.
+ */
+
+/*!
+ * Synchronously send command from host to DSP.
+ *
+ * When this is invoked on the host it synchronously runs a command on DSP,
+ * passing a group of shared buffers and two additional (small) buffers
+ * with opaque command description (in_data) and results (out_data).
+ *
+ * in_data is used at the function call and is not referenced afterwards.
+ * out_data is updated with the value returned by DSP before the function
+ * returns.
+ *
+ * Optimal processing is guaranteed for in_data and out_data buffers not
+ * exceeding 16 bytes in size. Larger buffers may require additional data
+ * copying depending on the implementation.
+ *
+ * status is the result of command execution. Command execution is
+ * successful if the command was delivered to the DSP and the response was
+ * delivered back. Otherwise the command execution has failed. IOW execution
+ * success means that the out_data contains command-specific response received
+ * from the DSP, execution failure means that out_data does not contain useful
+ * information.
+ *
+ * \param[out] status: operation status
+ */
+void xrp_run_command_sync(struct xrp_queue *queue,
+			  const void *in_data, size_t in_data_size,
+			  void *out_data, size_t out_data_size,
+			  struct xrp_buffer_group *buffer_group,
+			  enum xrp_status *status);
+
+/*!
+ * Asynchronously send command from host to DSP.
+ *
+ * When this is invoked on the host it queues a command to DSP,
+ * passing a group of shared buffers and two additional (small) buffers
+ * with opaque command description (in_data) and results (out_data).
+ *
+ * in_data is used at the function call and is not referenced afterwards.
+ * out_data must stay valid after this function call until command completion,
+ * at which point it is updated with the value returned by DSP.
+ *
+ * Optimal processing is guaranteed for in_data and out_data buffers not
+ * exceeding 16 bytes in size. Larger buffers may require additional data
+ * copying depending on the implementation.
+ *
+ * If event is non-NULL then a pointer to an event corresponding to the
+ * queued command is returned. This event can be waited for with xrp_wait,
+ * it is signaled when the command execution is complete.
+ * The returned event object is reference counted and is created with
+ * reference count of 1.
+ *
+ * status is the result of command enqueuing. Command enqueuing is
+ * successful if the command was enqueued on the host side and an associated
+ * event has been returned (if requested). Otherwise the command enqueuing has
+ * failed. IOW enqueuing success means that if event is non-NULL then *event
+ * contains valid event, enqueuing failure means that *event does not contain
+ * useful information.
+ *
+ * \param[out] status: operation status
+ */
+void xrp_enqueue_command(struct xrp_queue *queue,
+			 const void *in_data, size_t in_data_size,
+			 void *out_data, size_t out_data_size,
+			 struct xrp_buffer_group *buffer_group,
+			 struct xrp_event **event,
+			 enum xrp_status *status);
+
+/*!
+ * Wait for the event.
+ * Waiting for already signaled event completes immediately.
+ * Successful completion of this function does not alter the event state,
+ * i.e. the event remains signaled.
+ * status is the result of waiting, not the result of the command execution.
+ * Use xrp_event_status() to get the command execution status.
+ * \param[out] status: operation status
+ */
+void xrp_wait(struct xrp_event *event, enum xrp_status *status);
+
+/*!
+ * Wait for any event in the group.
+ * Waiting for a group with already signaled event completes immediately.
+ * Successful completion of this function does not alter the event state,
+ * i.e. signaled events remain signaled.
+ * status is the result of waiting, not the result of the command execution.
+ * Use xrp_event_status() with individual events to get the corresponding
+ * command execution status.
+ *
+ * \param[in] event: an array of pointers to events to wait for
+ * \param[i] n_events: number of events in the events array
+ * \param[out] status: operation status
+ * \return index of a completed event in the event array
+ */
+size_t xrp_wait_any(struct xrp_event **event, size_t n_events,
+		    enum xrp_status *status);
+
+int xrp_add_report_item_with_id(struct xrp_report *report,
+								int (*cb)(void*context,void*data),
+								int report_id,
+								void* context,
+								size_t data_size);
+
+int xrp_add_report_item(struct xrp_report *report,
+								int (*cb)(void*context,void*data),
+								void* context,
+								size_t data_size);
+
+void xrp_remove_report_item(struct xrp_report *report,int report_id);
+
+struct xrp_report *xrp_create_reporter(struct xrp_device *device,size_t size);
+
+int xrp_release_reporter(struct xrp_device *device,struct xrp_report *report);
+
+void xrp_import_dma_buf(struct xrp_device *device, int fd,enum xrp_access_flags flag ,uint64_t *phy_addr,
+                                uint64_t *user_addr,size_t* size,enum xrp_status *status);
+
+void xrp_release_dma_buf(struct xrp_device *device, int fd,enum xrp_status *status);
+
+void xrp_flush_dma_buf(struct xrp_device *device, int fd,enum xrp_access_flags flag ,enum xrp_status *status);
+/*!
+ * @}
+ */
+
+/*!
+ * \defgroup dsp_specific_api DSP-specific Interface (Library-Style)
+ * These calls are available only on the DSP side.
+ * @{
+ */
+
+/*!
+ * Check if there's a command from the host in the hardware queue.
+ * Returns XRP_STATUS_PENDING if the queue is empty or XRP_STATUS_SUCCESS
+ * if there is a command ready for processing.
+ *
+ * The check is quick and may be issued in any context.
+ */
+enum xrp_status xrp_device_poll(struct xrp_device *device);
+
+/*!
+ * Check if there's a command from the host in the hardware queue and invoke
+ * command handler if there's one.
+ * Returns XRP_STATUS_PENDING if the queue is empty, or the status returned by
+ * the command handler.
+ */
+enum xrp_status xrp_device_dispatch(struct xrp_device *device);
+
+/*!
+ * Function type for command handler.
+ *
+ * This callback is called on the DSP side to process queued command.
+ * in_data, out_data and buffer_group correspond to the same parameters of the
+ * host side API calls.
+ *
+ * On return from this function buffer group and individual buffer reference
+ * counters shall be restored to their entry values. out_data buffer shall be
+ * updated with command return value.
+ * Neither in_data nor out_data may be referenced after this function returns.
+ *
+ * Return value shall describe whether xrp_command_handler itself was
+ * successful or not, not the command it was requested to run.
+ * I.e. if the command was not recognized or its handler could not be called
+ * due to insufficient memory, that's XRP_STATUS_FAILURE returned in status.
+ * The host will also receive XRP_STATUS_FAILURE as a completion status.
+ * If the command was run that's XRP_STATUS_SUCCESS regardless of the
+ * command-specific status, which should be returned in out_data.
+ *
+ * \param handler_context: context that was passed to the
+ *                         xrp_device_register_namespace
+ */
+typedef enum xrp_status
+(xrp_command_handler)(void *handler_context,
+		      const void *in_data, size_t in_data_size,
+		      void *out_data, size_t out_data_size,
+		      struct xrp_buffer_group *buffer_group);
+
+/*!
+ * Register namespace handler.
+ *
+ * There may be only one handler for a namespace, second attempt to register
+ * a handler for the same namespace will fail.
+ *
+ * \param device: device for which namespace handler is registered
+ * \param nsid: namespace identifier, XRP_NAMESPACE_ID_SIZE bytes long
+ * \param handler: pointer to the handler function
+ * \param handler_context: first argument that will be passed to the handler
+ *                         function
+ * \param[out] status: operation status
+ */
+void xrp_device_register_namespace(struct xrp_device *device,
+				   const void *nsid,
+				   xrp_command_handler *handler,
+				   void *handler_context,
+				   enum xrp_status *status);
+
+/*!
+ * Unregister namespace handler.
+ *
+ * Only registered namespace handler may be unregistered.
+ *
+ * \param device: device for which namespace handler is registered
+ * \param nsid: namespace identifier, XRP_NAMESPACE_ID_SIZE bytes long
+ * \param[out] status: operation status
+ */
+void xrp_device_unregister_namespace(struct xrp_device *device,
+				     const void *nsid,
+				     enum xrp_status *status);
+
+/*!
+ * Enable or disable shared memory cache management.
+ * Note that this call does not change memory caching attributes, it only
+ * enables flushing and invalidating used regions of shared memory in the
+ * XRP code.
+ *
+ * \param device: device for which shared memory cache management state is
+ *                changed
+ * \param enable: whether cache management shall be enabled (non-zero) or
+ *                disabled (0)
+ */
+void xrp_device_enable_cache(struct xrp_device *device, int enable);
+
+/*!
+ * @}
+ */
+
+/*!
+ * Helper function that terminates fast simulation.
+ */
+void xrp_exit(void);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

+ 0 - 0
driver/xrp-user/xrp-common/.deps/.dirstamp


+ 50 - 0
driver/xrp-user/xrp-common/.deps/libxrp_host_single_a-xrp_ns.Po

@@ -0,0 +1,50 @@
+../xrp-common/libxrp_host_single_a-xrp_ns.o: ../xrp-common/xrp_ns.c \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/inttypes.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/yvals.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdlib.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdlib.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/alloca.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/string.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/string.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h \
+  ../xrp-common/xrp_debug.h ../xrp-common/xrp_ns.h ../xrp_api.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/inttypes.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/yvals.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdlib.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdlib.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/alloca.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/string.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/string.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h:
+
+../xrp-common/xrp_debug.h:
+
+../xrp-common/xrp_ns.h:
+
+../xrp_api.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h:

+ 50 - 0
driver/xrp-user/xrp-common/.deps/xrp_ns.Po

@@ -0,0 +1,50 @@
+xrp_ns.o: xrp_ns.c \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/inttypes.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/yvals.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdlib.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdlib.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/alloca.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/string.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/string.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h \
+  xrp_debug.h xrp_ns.h ../xrp_api.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/inttypes.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/yvals.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdlib.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdlib.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/alloca.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/string.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/string.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h:
+
+xrp_debug.h:
+
+xrp_ns.h:
+
+../xrp_api.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h:

+ 37 - 0
driver/xrp-user/xrp-common/.deps/xrp_rb_file.Po

@@ -0,0 +1,37 @@
+xrp_rb_file.o: xrp_rb_file.c \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/string.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/string.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h \
+  xrp_rb_file.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h \
+  xrp_types.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h \
+  ../xrp-kernel/xrp_ring_buffer.h
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/string.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/string.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h:
+
+xrp_rb_file.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h:
+
+xrp_types.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h:
+
+../xrp-kernel/xrp_ring_buffer.h:

+ 0 - 0
driver/xrp-user/xrp-common/.dirstamp


+ 39 - 0
driver/xrp-user/xrp-common/Makefile

@@ -0,0 +1,39 @@
+##
+ # Copyright (C) 2021 Alibaba Group Holding Limited
+ #
+ # This program is free software; you can redistribute it and/or modify
+ # it under the terms of the GNU General Public License version 2 as
+ # published by the Free Software Foundation.
+##
+
+
+TARGET = libxrp-common.a
+
+CFLAGS = -O0 -Wall -g -lm
+CFLAGS += -fPIC
+
+
+xrp_SRCS += xrp_rb_file.c
+xrp_SRCS += xrp_ns.c
+
+INCLUDES = -I$(CURDIR)  -I../include  -I../../xrp-kernel
+# object files will be generated from .c sourcefiles
+xrp_OBJS   = $(notdir $(xrp_SRCS:.c=.o))
+
+all: $(TARGET)
+
+$(xrp_OBJS): $(xrp_SRCS)
+	$(CC) -c $(CFLAGS) $(INCLUDES)  $(xrp_SRCS)
+
+
+$(TARGET): $(xrp_OBJS)
+	$(AR)  -rc $(TARGET) $(xrp_OBJS)
+
+clean:
+	rm -f *.o *.a
+	rm -rf output
+
+install:
+
+.PHONY: clean all prepare common
+

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+
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+
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+	@$(NORMAL_INSTALL)
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+	list2=; for p in $$list; do \
+	  if test -f $$p; then \
+	    list2="$$list2 $$p"; \
+	  else :; fi; \
+	done; \
+	test -z "$$list2" || { \
+	  echo " $(MKDIR_P) '$(DESTDIR)$(libdir)'"; \
+	  $(MKDIR_P) "$(DESTDIR)$(libdir)" || exit 1; \
+	  echo " $(INSTALL_DATA) $$list2 '$(DESTDIR)$(libdir)'"; \
+	  $(INSTALL_DATA) $$list2 "$(DESTDIR)$(libdir)" || exit $$?; }
+	@$(POST_INSTALL)
+	@list='$(lib_LIBRARIES)'; test -n "$(libdir)" || list=; \
+	for p in $$list; do \
+	  if test -f $$p; then \
+	    $(am__strip_dir) \
+	    echo " ( cd '$(DESTDIR)$(libdir)' && $(RANLIB) $$f )"; \
+	    ( cd "$(DESTDIR)$(libdir)" && $(RANLIB) $$f ) || exit $$?; \
+	  else :; fi; \
+	done
+
+uninstall-libLIBRARIES:
+	@$(NORMAL_UNINSTALL)
+	@list='$(lib_LIBRARIES)'; test -n "$(libdir)" || list=; \
+	files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
+	dir='$(DESTDIR)$(libdir)'; $(am__uninstall_files_from_dir)
+
+clean-libLIBRARIES:
+	-test -z "$(lib_LIBRARIES)" || rm -f $(lib_LIBRARIES)
+
+libxrp-common.a: $(libxrp_common_a_OBJECTS) $(libxrp_common_a_DEPENDENCIES) $(EXTRA_libxrp_common_a_DEPENDENCIES) 
+	$(AM_V_at)-rm -f libxrp-common.a
+	$(AM_V_AR)$(libxrp_common_a_AR) libxrp-common.a $(libxrp_common_a_OBJECTS) $(libxrp_common_a_LIBADD)
+	$(AM_V_at)$(RANLIB) libxrp-common.a
+
+mostlyclean-compile:
+	-rm -f *.$(OBJEXT)
+
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+
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xrp_ns.Po@am__quote@ # am--include-marker
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xrp_rb_file.Po@am__quote@ # am--include-marker
+
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+	      "$$@" $$unique; \
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+	      $$unique; \
+	  fi; \
+	fi
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+
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+	test -z "$(CTAGS_ARGS)$$unique" \
+	  || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
+	     $$unique
+
+GTAGS:
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+	  && $(am__cd) $(top_srcdir) \
+	  && gtags -i $(GTAGS_ARGS) "$$here"
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+	esac; \
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+	  if test -f "$$i"; then \
+	    echo "$(subdir)/$$i"; \
+	  else \
+	    echo "$$sdir/$$i"; \
+	  fi; \
+	done >> $(top_builddir)/cscope.files
+
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+	  */*) $(MKDIR_P) `echo "$$dist_files" | \
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+			   sort -u` ;; \
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+	fi
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+	@echo "it deletes files that may require special tools to rebuild."
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+distclean: distclean-am
+		-rm -f ./$(DEPDIR)/xrp_ns.Po
+	-rm -f ./$(DEPDIR)/xrp_rb_file.Po
+	-rm -f Makefile
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+	distclean-tags
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+		-rm -f ./$(DEPDIR)/xrp_ns.Po
+	-rm -f ./$(DEPDIR)/xrp_rb_file.Po
+	-rm -f Makefile
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+	distclean distclean-compile distclean-generic distclean-tags \
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+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:

+ 38 - 0
driver/xrp-user/xrp-common/xrp_debug.h

@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2016 - 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _XRP_DEBUG_H
+#define _XRP_DEBUG_H
+
+#ifdef DEBUG
+#include <stdio.h>
+#define pr_debug printf
+#else
+static inline int pr_debug(const char *p, ...)
+{
+	(void)p;
+	return 0;
+}
+#endif
+
+#endif

+ 201 - 0
driver/xrp-user/xrp-common/xrp_ns.c

@@ -0,0 +1,201 @@
+/*
+ * Copyright (c) 2016 - 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <inttypes.h>
+#include <stdlib.h>
+#include <string.h>
+#include "xrp_debug.h"
+#include "xrp_ns.h"
+
+static int compare_cmd_ns(const void *nsid, struct xrp_cmd_ns *cmd_ns)
+{
+	return memcmp(nsid, cmd_ns->id, sizeof(cmd_ns->id));
+}
+
+int xrp_cmd_ns_match(const void *nsid, struct xrp_cmd_ns *cmd_ns)
+{
+	return cmd_ns && compare_cmd_ns(nsid, cmd_ns) == 0;
+}
+
+#ifdef DEBUG
+static void dump_nsid(const void *p)
+{
+	const uint8_t *id = p;
+
+	printf("%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x",
+	       id[0], id[1], id[2], id[3],
+	       id[4], id[5],
+	       id[6], id[7],
+	       id[8], id[9],
+	       id[10], id[11], id[12], id[13], id[14], id[15]);
+}
+
+static void dump_cmd_ns(const struct xrp_cmd_ns *cmd_ns)
+{
+	if (cmd_ns) {
+		dump_nsid(cmd_ns->id);
+		printf(" -> %p(%p)", cmd_ns->handler, cmd_ns->handler_context);
+	} else {
+		printf("NULL");
+	}
+}
+
+static void dump_cmd_ns_map(const struct xrp_cmd_ns_map *ns_map)
+{
+	size_t i;
+
+	printf("n_cmd_ns: %zu, size_cmd_ns: %zu\n",
+	       ns_map->n_cmd_ns, ns_map->size_cmd_ns);
+	for (i = 0; i < ns_map->n_cmd_ns; ++i) {
+		printf("  ");
+		dump_cmd_ns(ns_map->cmd_ns + i);
+		printf("\n");
+	}
+}
+#else
+static void dump_nsid(const void *p)
+{
+	(void)p;
+}
+
+static void dump_cmd_ns(const struct xrp_cmd_ns *cmd_ns)
+{
+	(void)cmd_ns;
+}
+
+static void dump_cmd_ns_map(const struct xrp_cmd_ns_map *ns_map)
+{
+	(void)ns_map;
+}
+#endif
+
+static int cmd_ns_present(struct xrp_cmd_ns_map *ns_map,
+			  struct xrp_cmd_ns *cmd_ns)
+{
+	return cmd_ns >= ns_map->cmd_ns &&
+		cmd_ns < ns_map->cmd_ns + ns_map->n_cmd_ns;
+}
+
+struct xrp_cmd_ns *xrp_find_cmd_ns(struct xrp_cmd_ns_map *ns_map,
+				   const void *id)
+{
+	size_t a = 0;
+	size_t b = ns_map->n_cmd_ns;
+	struct xrp_cmd_ns *p;
+
+	pr_debug("%s: ", __func__);
+	dump_nsid(id);
+	pr_debug("\n");
+	while (b - a > 1) {
+		size_t c = (a + b) / 2;
+
+		pr_debug("a: %zu, b:%zu, c: %zu\n", a, b, c);
+		p = ns_map->cmd_ns + c;
+		if (compare_cmd_ns(id, p) < 0)
+			b = c;
+		else
+			a = c;
+		pr_debug("...a: %zu, b:%zu\n", a, b);
+	}
+	p = ns_map->cmd_ns + a;
+	if (a < b && compare_cmd_ns(id, p) > 0)
+		++p;
+	if (cmd_ns_present(ns_map, p)) {
+		pr_debug("%s: found: ", __func__);
+		dump_cmd_ns(p);
+		pr_debug("\n");
+	} else {
+		pr_debug("%s: not found\n", __func__);
+	}
+
+	return p;
+}
+
+static struct xrp_cmd_ns *insert_cmd_ns(struct xrp_cmd_ns_map *ns_map,
+					struct xrp_cmd_ns *cmd_ns)
+{
+	size_t i = cmd_ns - ns_map->cmd_ns;
+
+	if (ns_map->n_cmd_ns == ns_map->size_cmd_ns) {
+		size_t new_size = (ns_map->size_cmd_ns + 1) * 2;
+		void *new_cmd_ns = realloc(ns_map->cmd_ns,
+					   new_size * sizeof(*ns_map->cmd_ns));
+
+		if (!new_cmd_ns)
+			return NULL;
+		ns_map->cmd_ns = new_cmd_ns;
+		ns_map->size_cmd_ns = new_size;
+		cmd_ns = ns_map->cmd_ns + i;
+	}
+	memmove(cmd_ns + 1, cmd_ns,
+		sizeof(*cmd_ns) * (ns_map->n_cmd_ns - i));
+	++ns_map->n_cmd_ns;
+	return cmd_ns;
+}
+
+static void remove_cmd_ns(struct xrp_cmd_ns_map *ns_map,
+			  struct xrp_cmd_ns *cmd_ns)
+{
+	size_t i = cmd_ns - ns_map->cmd_ns;
+
+	memmove(cmd_ns, cmd_ns + 1,
+		sizeof(*cmd_ns) * (ns_map->n_cmd_ns - i - 1));
+	--ns_map->n_cmd_ns;
+}
+
+int xrp_register_namespace(struct xrp_cmd_ns_map *ns_map,
+			   const void *nsid,
+			   xrp_command_handler *handler,
+			   void *handler_context)
+{
+	struct xrp_cmd_ns *cmd_ns = xrp_find_cmd_ns(ns_map, nsid);
+
+	if (cmd_ns_present(ns_map, cmd_ns) && xrp_cmd_ns_match(nsid, cmd_ns)) {
+		return 0;
+	} else {
+		cmd_ns = insert_cmd_ns(ns_map, cmd_ns);
+		if (cmd_ns) {
+			memcpy(cmd_ns->id, nsid, sizeof(cmd_ns->id));
+			cmd_ns->handler = handler;
+			cmd_ns->handler_context = handler_context;
+			dump_cmd_ns_map(ns_map);
+			return 1;
+		} else {
+			return 0;
+		}
+	}
+}
+
+int xrp_unregister_namespace(struct xrp_cmd_ns_map *ns_map,
+			     const void *nsid)
+{
+	struct xrp_cmd_ns *cmd_ns = xrp_find_cmd_ns(ns_map, nsid);
+
+	if (cmd_ns_present(ns_map, cmd_ns) && xrp_cmd_ns_match(nsid, cmd_ns)) {
+		remove_cmd_ns(ns_map, cmd_ns);
+		dump_cmd_ns_map(ns_map);
+		return 1;
+	} else {
+		return 0;
+	}
+}

+ 52 - 0
driver/xrp-user/xrp-common/xrp_ns.h

@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2016 - 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _XRP_NS_H
+#define _XRP_NS_H
+
+#include <xrp_api.h>
+
+struct xrp_cmd_ns {
+	char id[XRP_NAMESPACE_ID_SIZE];
+	xrp_command_handler *handler;
+	void *handler_context;
+};
+
+struct xrp_cmd_ns_map {
+	size_t n_cmd_ns;
+	size_t size_cmd_ns;
+	struct xrp_cmd_ns *cmd_ns;
+};
+
+int xrp_register_namespace(struct xrp_cmd_ns_map *ns_map,
+			   const void *nsid,
+			   xrp_command_handler *handler,
+			   void *handler_context);
+int xrp_unregister_namespace(struct xrp_cmd_ns_map *ns_map,
+			     const void *nsid);
+
+int xrp_cmd_ns_match(const void *nsid, struct xrp_cmd_ns *cmd_ns);
+struct xrp_cmd_ns *xrp_find_cmd_ns(struct xrp_cmd_ns_map *ns_map,
+				   const void *id);
+
+#endif

+ 71 - 0
driver/xrp-user/xrp-common/xrp_rb_file.c

@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <string.h>
+#include "xrp_rb_file.h"
+
+static size_t xrp_rb_write_some(void *cookie, const void *buf, size_t size)
+{
+	volatile struct xrp_ring_buffer *rb = cookie;
+	uint32_t read = rb->read;
+	uint32_t write = rb->write;
+	size_t tail;
+
+	if (read > write) {
+		tail = read - 1 - write;
+	} else if (read) {
+		tail = rb->size - write;
+	} else {
+		tail = rb->size - 1 - write;
+	}
+
+	if (size < tail)
+		tail = size;
+
+	memcpy((char *)rb->data + write, buf, tail);
+
+	write += tail;
+	if (write == rb->size)
+		write = 0;
+	rb->write = write;
+
+	return tail;
+}
+
+size_t xrp_rb_write(void *cookie, const void *buf, size_t size)
+{
+	size_t write_total = 0;
+	const char *p = buf;
+
+	while (size) {
+		size_t write = xrp_rb_write_some(cookie, p, size);
+
+		if (write == 0)
+			break;
+
+		p += write;
+		size -= write;
+		write_total += write;
+	}
+	return write_total;
+}

+ 33 - 0
driver/xrp-user/xrp-common/xrp_rb_file.h

@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef XRP_RB_FILE_H
+#define XRP_RB_FILE_H
+
+#include <stddef.h>
+#include <xrp_types.h>
+#include <xrp_ring_buffer.h>
+
+size_t xrp_rb_write(void *cookie, const void *buf, size_t size);
+
+#endif

+ 39 - 0
driver/xrp-user/xrp-common/xrp_types.h

@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef XRP_TYPES_H
+#define XRP_TYPES_H
+
+#include <stdint.h>
+
+#ifndef HAVE___U8
+typedef uint8_t __u8;
+#endif
+#ifndef HAVE___U32
+typedef uint32_t __u32;
+#endif
+#ifndef HAVE___U64
+typedef uint64_t __u64;
+#endif
+
+#endif

+ 228 - 0
driver/xrp-user/xrp-host/.deps/libxrp_host_hosted_a-xrp_host_common.Po

@@ -0,0 +1,228 @@
+libxrp_host_hosted_a-xrp_host_common.o: xrp_host_common.c \
+ /usr/include/stdc-predef.h \
+ /usr/lib/gcc/x86_64-linux-gnu/7/include/stdint.h /usr/include/stdint.h \
+ /usr/include/x86_64-linux-gnu/bits/libc-header-start.h \
+ /usr/include/features.h /usr/include/x86_64-linux-gnu/sys/cdefs.h \
+ /usr/include/x86_64-linux-gnu/bits/wordsize.h \
+ /usr/include/x86_64-linux-gnu/bits/long-double.h \
+ /usr/include/x86_64-linux-gnu/gnu/stubs.h \
+ /usr/include/x86_64-linux-gnu/gnu/stubs-64.h \
+ /usr/include/x86_64-linux-gnu/bits/types.h \
+ /usr/include/x86_64-linux-gnu/bits/typesizes.h \
+ /usr/include/x86_64-linux-gnu/bits/wchar.h \
+ /usr/include/x86_64-linux-gnu/bits/stdint-intn.h \
+ /usr/include/x86_64-linux-gnu/bits/stdint-uintn.h /usr/include/stdio.h \
+ /usr/lib/gcc/x86_64-linux-gnu/7/include/stddef.h \
+ /usr/include/x86_64-linux-gnu/bits/types/__FILE.h \
+ /usr/include/x86_64-linux-gnu/bits/types/FILE.h \
+ /usr/include/x86_64-linux-gnu/bits/libio.h \
+ /usr/include/x86_64-linux-gnu/bits/_G_config.h \
+ /usr/include/x86_64-linux-gnu/bits/types/__mbstate_t.h \
+ /usr/lib/gcc/x86_64-linux-gnu/7/include/stdarg.h \
+ /usr/include/x86_64-linux-gnu/bits/stdio_lim.h \
+ /usr/include/x86_64-linux-gnu/bits/sys_errlist.h \
+ /usr/include/x86_64-linux-gnu/bits/stdio.h \
+ /usr/include/x86_64-linux-gnu/bits/stdio2.h /usr/include/string.h \
+ /usr/include/x86_64-linux-gnu/bits/types/locale_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/__locale_t.h \
+ /usr/include/strings.h \
+ /usr/include/x86_64-linux-gnu/bits/strings_fortified.h \
+ /usr/include/x86_64-linux-gnu/bits/string_fortified.h ../xrp_api.h \
+ xrp_host_common.h /usr/include/stdlib.h \
+ /usr/include/x86_64-linux-gnu/bits/waitflags.h \
+ /usr/include/x86_64-linux-gnu/bits/waitstatus.h \
+ /usr/include/x86_64-linux-gnu/bits/floatn.h \
+ /usr/include/x86_64-linux-gnu/bits/floatn-common.h \
+ /usr/include/x86_64-linux-gnu/sys/types.h \
+ /usr/include/x86_64-linux-gnu/bits/types/clock_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/clockid_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/time_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/timer_t.h /usr/include/endian.h \
+ /usr/include/x86_64-linux-gnu/bits/endian.h \
+ /usr/include/x86_64-linux-gnu/bits/byteswap.h \
+ /usr/include/x86_64-linux-gnu/bits/byteswap-16.h \
+ /usr/include/x86_64-linux-gnu/bits/uintn-identity.h \
+ /usr/include/x86_64-linux-gnu/sys/select.h \
+ /usr/include/x86_64-linux-gnu/bits/select.h \
+ /usr/include/x86_64-linux-gnu/bits/types/sigset_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/__sigset_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/struct_timeval.h \
+ /usr/include/x86_64-linux-gnu/bits/types/struct_timespec.h \
+ /usr/include/x86_64-linux-gnu/bits/select2.h \
+ /usr/include/x86_64-linux-gnu/sys/sysmacros.h \
+ /usr/include/x86_64-linux-gnu/bits/sysmacros.h \
+ /usr/include/x86_64-linux-gnu/bits/pthreadtypes.h \
+ /usr/include/x86_64-linux-gnu/bits/thread-shared-types.h \
+ /usr/include/x86_64-linux-gnu/bits/pthreadtypes-arch.h \
+ /usr/include/alloca.h \
+ /usr/include/x86_64-linux-gnu/bits/stdlib-bsearch.h \
+ /usr/include/x86_64-linux-gnu/bits/stdlib-float.h \
+ /usr/include/x86_64-linux-gnu/bits/stdlib.h xrp_atomic.h \
+ thread-pthread/xrp_thread_impl.h /usr/include/pthread.h \
+ /usr/include/sched.h /usr/include/x86_64-linux-gnu/bits/sched.h \
+ /usr/include/x86_64-linux-gnu/bits/cpu-set.h /usr/include/time.h \
+ /usr/include/x86_64-linux-gnu/bits/time.h \
+ /usr/include/x86_64-linux-gnu/bits/types/struct_tm.h \
+ /usr/include/x86_64-linux-gnu/bits/types/struct_itimerspec.h \
+ /usr/include/x86_64-linux-gnu/bits/setjmp.h hosted/xrp_host_impl.h \
+ thread-pthread/xrp_queue_impl.h xrp_threaded_queue.h
+
+/usr/include/stdc-predef.h:
+
+/usr/lib/gcc/x86_64-linux-gnu/7/include/stdint.h:
+
+/usr/include/stdint.h:
+
+/usr/include/x86_64-linux-gnu/bits/libc-header-start.h:
+
+/usr/include/features.h:
+
+/usr/include/x86_64-linux-gnu/sys/cdefs.h:
+
+/usr/include/x86_64-linux-gnu/bits/wordsize.h:
+
+/usr/include/x86_64-linux-gnu/bits/long-double.h:
+
+/usr/include/x86_64-linux-gnu/gnu/stubs.h:
+
+/usr/include/x86_64-linux-gnu/gnu/stubs-64.h:
+
+/usr/include/x86_64-linux-gnu/bits/types.h:
+
+/usr/include/x86_64-linux-gnu/bits/typesizes.h:
+
+/usr/include/x86_64-linux-gnu/bits/wchar.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdint-intn.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdint-uintn.h:
+
+/usr/include/stdio.h:
+
+/usr/lib/gcc/x86_64-linux-gnu/7/include/stddef.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/__FILE.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/FILE.h:
+
+/usr/include/x86_64-linux-gnu/bits/libio.h:
+
+/usr/include/x86_64-linux-gnu/bits/_G_config.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/__mbstate_t.h:
+
+/usr/lib/gcc/x86_64-linux-gnu/7/include/stdarg.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdio_lim.h:
+
+/usr/include/x86_64-linux-gnu/bits/sys_errlist.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdio.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdio2.h:
+
+/usr/include/string.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/locale_t.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/__locale_t.h:
+
+/usr/include/strings.h:
+
+/usr/include/x86_64-linux-gnu/bits/strings_fortified.h:
+
+/usr/include/x86_64-linux-gnu/bits/string_fortified.h:
+
+../xrp_api.h:
+
+xrp_host_common.h:
+
+/usr/include/stdlib.h:
+
+/usr/include/x86_64-linux-gnu/bits/waitflags.h:
+
+/usr/include/x86_64-linux-gnu/bits/waitstatus.h:
+
+/usr/include/x86_64-linux-gnu/bits/floatn.h:
+
+/usr/include/x86_64-linux-gnu/bits/floatn-common.h:
+
+/usr/include/x86_64-linux-gnu/sys/types.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/clock_t.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/clockid_t.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/time_t.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/timer_t.h:
+
+/usr/include/endian.h:
+
+/usr/include/x86_64-linux-gnu/bits/endian.h:
+
+/usr/include/x86_64-linux-gnu/bits/byteswap.h:
+
+/usr/include/x86_64-linux-gnu/bits/byteswap-16.h:
+
+/usr/include/x86_64-linux-gnu/bits/uintn-identity.h:
+
+/usr/include/x86_64-linux-gnu/sys/select.h:
+
+/usr/include/x86_64-linux-gnu/bits/select.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/sigset_t.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/__sigset_t.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/struct_timeval.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/struct_timespec.h:
+
+/usr/include/x86_64-linux-gnu/bits/select2.h:
+
+/usr/include/x86_64-linux-gnu/sys/sysmacros.h:
+
+/usr/include/x86_64-linux-gnu/bits/sysmacros.h:
+
+/usr/include/x86_64-linux-gnu/bits/pthreadtypes.h:
+
+/usr/include/x86_64-linux-gnu/bits/thread-shared-types.h:
+
+/usr/include/x86_64-linux-gnu/bits/pthreadtypes-arch.h:
+
+/usr/include/alloca.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdlib-bsearch.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdlib-float.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdlib.h:
+
+xrp_atomic.h:
+
+thread-pthread/xrp_thread_impl.h:
+
+/usr/include/pthread.h:
+
+/usr/include/sched.h:
+
+/usr/include/x86_64-linux-gnu/bits/sched.h:
+
+/usr/include/x86_64-linux-gnu/bits/cpu-set.h:
+
+/usr/include/time.h:
+
+/usr/include/x86_64-linux-gnu/bits/time.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/struct_tm.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/struct_itimerspec.h:
+
+/usr/include/x86_64-linux-gnu/bits/setjmp.h:
+
+hosted/xrp_host_impl.h:
+
+thread-pthread/xrp_queue_impl.h:
+
+xrp_threaded_queue.h:

+ 1 - 0
driver/xrp-user/xrp-host/.deps/libxrp_host_hosted_a-xrp_sync_queue.Po

@@ -0,0 +1 @@
+# dummy

+ 211 - 0
driver/xrp-user/xrp-host/.deps/libxrp_host_hosted_a-xrp_threaded_queue.Po

@@ -0,0 +1,211 @@
+libxrp_host_hosted_a-xrp_threaded_queue.o: xrp_threaded_queue.c \
+ /usr/include/stdc-predef.h /usr/include/stdio.h \
+ /usr/include/x86_64-linux-gnu/bits/libc-header-start.h \
+ /usr/include/features.h /usr/include/x86_64-linux-gnu/sys/cdefs.h \
+ /usr/include/x86_64-linux-gnu/bits/wordsize.h \
+ /usr/include/x86_64-linux-gnu/bits/long-double.h \
+ /usr/include/x86_64-linux-gnu/gnu/stubs.h \
+ /usr/include/x86_64-linux-gnu/gnu/stubs-64.h \
+ /usr/lib/gcc/x86_64-linux-gnu/7/include/stddef.h \
+ /usr/include/x86_64-linux-gnu/bits/types.h \
+ /usr/include/x86_64-linux-gnu/bits/typesizes.h \
+ /usr/include/x86_64-linux-gnu/bits/types/__FILE.h \
+ /usr/include/x86_64-linux-gnu/bits/types/FILE.h \
+ /usr/include/x86_64-linux-gnu/bits/libio.h \
+ /usr/include/x86_64-linux-gnu/bits/_G_config.h \
+ /usr/include/x86_64-linux-gnu/bits/types/__mbstate_t.h \
+ /usr/lib/gcc/x86_64-linux-gnu/7/include/stdarg.h \
+ /usr/include/x86_64-linux-gnu/bits/stdio_lim.h \
+ /usr/include/x86_64-linux-gnu/bits/sys_errlist.h \
+ /usr/include/x86_64-linux-gnu/bits/stdio.h \
+ /usr/include/x86_64-linux-gnu/bits/stdio2.h ../xrp-common/xrp_debug.h \
+ xrp_host_common.h /usr/include/stdlib.h \
+ /usr/include/x86_64-linux-gnu/bits/waitflags.h \
+ /usr/include/x86_64-linux-gnu/bits/waitstatus.h \
+ /usr/include/x86_64-linux-gnu/bits/floatn.h \
+ /usr/include/x86_64-linux-gnu/bits/floatn-common.h \
+ /usr/include/x86_64-linux-gnu/sys/types.h \
+ /usr/include/x86_64-linux-gnu/bits/types/clock_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/clockid_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/time_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/timer_t.h \
+ /usr/include/x86_64-linux-gnu/bits/stdint-intn.h /usr/include/endian.h \
+ /usr/include/x86_64-linux-gnu/bits/endian.h \
+ /usr/include/x86_64-linux-gnu/bits/byteswap.h \
+ /usr/include/x86_64-linux-gnu/bits/byteswap-16.h \
+ /usr/include/x86_64-linux-gnu/bits/uintn-identity.h \
+ /usr/include/x86_64-linux-gnu/sys/select.h \
+ /usr/include/x86_64-linux-gnu/bits/select.h \
+ /usr/include/x86_64-linux-gnu/bits/types/sigset_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/__sigset_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/struct_timeval.h \
+ /usr/include/x86_64-linux-gnu/bits/types/struct_timespec.h \
+ /usr/include/x86_64-linux-gnu/bits/select2.h \
+ /usr/include/x86_64-linux-gnu/sys/sysmacros.h \
+ /usr/include/x86_64-linux-gnu/bits/sysmacros.h \
+ /usr/include/x86_64-linux-gnu/bits/pthreadtypes.h \
+ /usr/include/x86_64-linux-gnu/bits/thread-shared-types.h \
+ /usr/include/x86_64-linux-gnu/bits/pthreadtypes-arch.h \
+ /usr/include/alloca.h \
+ /usr/include/x86_64-linux-gnu/bits/stdlib-bsearch.h \
+ /usr/include/x86_64-linux-gnu/bits/stdlib-float.h \
+ /usr/include/x86_64-linux-gnu/bits/stdlib.h xrp_atomic.h \
+ thread-pthread/xrp_thread_impl.h /usr/include/pthread.h \
+ /usr/include/sched.h /usr/include/x86_64-linux-gnu/bits/sched.h \
+ /usr/include/x86_64-linux-gnu/bits/cpu-set.h /usr/include/time.h \
+ /usr/include/x86_64-linux-gnu/bits/time.h \
+ /usr/include/x86_64-linux-gnu/bits/types/struct_tm.h \
+ /usr/include/x86_64-linux-gnu/bits/types/struct_itimerspec.h \
+ /usr/include/x86_64-linux-gnu/bits/types/locale_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/__locale_t.h \
+ /usr/include/x86_64-linux-gnu/bits/setjmp.h hosted/xrp_host_impl.h \
+ ../xrp_api.h thread-pthread/xrp_queue_impl.h xrp_threaded_queue.h \
+ xrp_threaded_queue.h
+
+/usr/include/stdc-predef.h:
+
+/usr/include/stdio.h:
+
+/usr/include/x86_64-linux-gnu/bits/libc-header-start.h:
+
+/usr/include/features.h:
+
+/usr/include/x86_64-linux-gnu/sys/cdefs.h:
+
+/usr/include/x86_64-linux-gnu/bits/wordsize.h:
+
+/usr/include/x86_64-linux-gnu/bits/long-double.h:
+
+/usr/include/x86_64-linux-gnu/gnu/stubs.h:
+
+/usr/include/x86_64-linux-gnu/gnu/stubs-64.h:
+
+/usr/lib/gcc/x86_64-linux-gnu/7/include/stddef.h:
+
+/usr/include/x86_64-linux-gnu/bits/types.h:
+
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+/usr/include/x86_64-linux-gnu/bits/types/FILE.h:
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+/usr/include/x86_64-linux-gnu/bits/libio.h:
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+/usr/include/x86_64-linux-gnu/bits/_G_config.h:
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+/usr/include/x86_64-linux-gnu/bits/stdio_lim.h:
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+/usr/include/x86_64-linux-gnu/bits/sys_errlist.h:
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+/usr/include/x86_64-linux-gnu/bits/stdio.h:
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+/usr/include/x86_64-linux-gnu/bits/stdio2.h:
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+../xrp-common/xrp_debug.h:
+
+xrp_host_common.h:
+
+/usr/include/stdlib.h:
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+/usr/include/x86_64-linux-gnu/bits/waitflags.h:
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+/usr/include/x86_64-linux-gnu/bits/types/clockid_t.h:
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+/usr/include/x86_64-linux-gnu/bits/types/time_t.h:
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+/usr/include/x86_64-linux-gnu/bits/types/timer_t.h:
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+/usr/include/x86_64-linux-gnu/bits/stdint-intn.h:
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+/usr/include/x86_64-linux-gnu/bits/endian.h:
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+/usr/include/x86_64-linux-gnu/bits/select.h:
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+/usr/include/x86_64-linux-gnu/bits/types/__sigset_t.h:
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+/usr/include/x86_64-linux-gnu/bits/types/struct_timeval.h:
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+/usr/include/x86_64-linux-gnu/sys/sysmacros.h:
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+/usr/include/x86_64-linux-gnu/bits/sysmacros.h:
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+/usr/include/x86_64-linux-gnu/bits/pthreadtypes.h:
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+/usr/include/x86_64-linux-gnu/bits/thread-shared-types.h:
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+/usr/include/x86_64-linux-gnu/bits/pthreadtypes-arch.h:
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+/usr/include/alloca.h:
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+/usr/include/x86_64-linux-gnu/bits/stdlib-bsearch.h:
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+/usr/include/x86_64-linux-gnu/bits/stdlib-float.h:
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+/usr/include/x86_64-linux-gnu/bits/stdlib.h:
+
+xrp_atomic.h:
+
+thread-pthread/xrp_thread_impl.h:
+
+/usr/include/pthread.h:
+
+/usr/include/sched.h:
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+/usr/include/x86_64-linux-gnu/bits/sched.h:
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+/usr/include/x86_64-linux-gnu/bits/cpu-set.h:
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+/usr/include/time.h:
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+/usr/include/x86_64-linux-gnu/bits/time.h:
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+/usr/include/x86_64-linux-gnu/bits/types/struct_tm.h:
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+/usr/include/x86_64-linux-gnu/bits/types/struct_itimerspec.h:
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+/usr/include/x86_64-linux-gnu/bits/types/__locale_t.h:
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+/usr/include/x86_64-linux-gnu/bits/setjmp.h:
+
+hosted/xrp_host_impl.h:
+
+../xrp_api.h:
+
+thread-pthread/xrp_queue_impl.h:
+
+xrp_threaded_queue.h:
+
+xrp_threaded_queue.h:

+ 204 - 0
driver/xrp-user/xrp-host/.deps/libxrp_host_single_a-xrp_host_common.Po

@@ -0,0 +1,204 @@
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+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/yvals.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdio.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdio.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/mbstatet.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/string.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/string.h \
+  ../xrp_api.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h \
+  xrp_host_common.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdlib.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdlib.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/alloca.h \
+  xrp_atomic.h thread-xos/xrp_thread_impl.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_types.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/config/core.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-versions.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-types.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-matmap.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/tie.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-certified.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-compat.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/corebits.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_core.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_interrupt.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_timer.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_externalregisters.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_coprocessors.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/intctrl.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros-compat.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_common.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/system.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_params.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/sys/reent.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/wchar.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwcstod.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwstr.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/fenv.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/ymath.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/ymath.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_errors.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_regaccess.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_log.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_thread.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_cond.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_event.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_mutex.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_msgq.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_semaphore.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_blockmem.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_barrier.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_timer.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_stopwatch.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_syslog.h \
+  single/xrp_host_impl.h ../xrp_api.h thread-xos/xrp_thread_impl.h \
+  thread-xos/xrp_queue_impl.h xrp_threaded_queue.h \
+  thread-xos/xrp_thread_impl.h
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/yvals.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdio.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdio.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/mbstatet.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/string.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/string.h:
+
+../xrp_api.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h:
+
+xrp_host_common.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdlib.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdlib.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/alloca.h:
+
+xrp_atomic.h:
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+thread-xos/xrp_thread_impl.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_types.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/config/core.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-versions.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-types.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-matmap.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/tie.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-certified.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-compat.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/corebits.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_core.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_interrupt.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_timer.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_externalregisters.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_coprocessors.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/intctrl.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros-compat.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_common.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/system.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_params.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/sys/reent.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/wchar.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwcstod.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwstr.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/fenv.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/ymath.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/ymath.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_errors.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_regaccess.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_log.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_thread.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_cond.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_event.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_mutex.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_msgq.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_semaphore.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_blockmem.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_barrier.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_timer.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_stopwatch.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_syslog.h:
+
+single/xrp_host_impl.h:
+
+../xrp_api.h:
+
+thread-xos/xrp_thread_impl.h:
+
+thread-xos/xrp_queue_impl.h:
+
+xrp_threaded_queue.h:
+
+thread-xos/xrp_thread_impl.h:

+ 1 - 0
driver/xrp-user/xrp-host/.deps/libxrp_host_single_a-xrp_sync_queue.Po

@@ -0,0 +1 @@
+# dummy

+ 196 - 0
driver/xrp-user/xrp-host/.deps/libxrp_host_single_a-xrp_threaded_queue.Po

@@ -0,0 +1,196 @@
+libxrp_host_single_a-xrp_threaded_queue.o: xrp_threaded_queue.c \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdio.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdio.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/mbstatet.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h \
+  ../xrp-common/xrp_debug.h xrp_host_common.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdlib.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdlib.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/alloca.h \
+  xrp_atomic.h thread-xos/xrp_thread_impl.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_types.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/config/core.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-versions.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-types.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-matmap.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/tie.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-certified.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-compat.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/corebits.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_core.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_interrupt.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_timer.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_externalregisters.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_coprocessors.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/intctrl.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros-compat.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_common.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/system.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_params.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/sys/reent.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/wchar.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwcstod.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwstr.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/fenv.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/ymath.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/ymath.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_errors.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_regaccess.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_log.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_thread.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_cond.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_event.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_mutex.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_msgq.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_semaphore.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_blockmem.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_barrier.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_timer.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_stopwatch.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_syslog.h \
+  single/xrp_host_impl.h ../xrp_api.h thread-xos/xrp_thread_impl.h \
+  thread-xos/xrp_queue_impl.h xrp_threaded_queue.h \
+  thread-xos/xrp_thread_impl.h xrp_threaded_queue.h
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdio.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdio.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/mbstatet.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h:
+
+../xrp-common/xrp_debug.h:
+
+xrp_host_common.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdlib.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdlib.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/alloca.h:
+
+xrp_atomic.h:
+
+thread-xos/xrp_thread_impl.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_types.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/config/core.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-versions.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-types.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-matmap.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/tie.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-certified.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-compat.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/corebits.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_core.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_interrupt.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_timer.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_externalregisters.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_coprocessors.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/intctrl.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros-compat.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_common.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/system.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_params.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/sys/reent.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/wchar.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwcstod.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwstr.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/fenv.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/ymath.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/ymath.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_errors.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_regaccess.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_log.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_thread.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_cond.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_event.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_semaphore.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_barrier.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_timer.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_stopwatch.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_syslog.h:
+
+single/xrp_host_impl.h:
+
+../xrp_api.h:
+
+thread-xos/xrp_thread_impl.h:
+
+thread-xos/xrp_queue_impl.h:
+
+xrp_threaded_queue.h:
+
+thread-xos/xrp_thread_impl.h:
+
+xrp_threaded_queue.h:

+ 204 - 0
driver/xrp-user/xrp-host/.deps/libxrp_host_standalone_a-xrp_host_common.Po

@@ -0,0 +1,204 @@
+libxrp_host_standalone_a-xrp_host_common.o: xrp_host_common.c \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/yvals.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdio.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdio.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/mbstatet.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/string.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/string.h \
+  ../xrp_api.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h \
+  xrp_host_common.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdlib.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdlib.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/alloca.h \
+  xrp_atomic.h thread-xos/xrp_thread_impl.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_types.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/config/core.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-versions.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-types.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-matmap.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/tie.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-certified.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-compat.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/corebits.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_core.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_interrupt.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_timer.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_externalregisters.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_coprocessors.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/intctrl.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros-compat.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_common.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/system.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_params.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/sys/reent.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/wchar.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwcstod.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwstr.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/fenv.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/ymath.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/ymath.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_errors.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_regaccess.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_log.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_thread.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_cond.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_event.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_mutex.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_msgq.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_semaphore.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_blockmem.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_barrier.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_timer.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_stopwatch.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_syslog.h \
+  standalone/xrp_host_impl.h ../xrp_api.h thread-xos/xrp_thread_impl.h \
+  thread-xos/xrp_queue_impl.h xrp_threaded_queue.h \
+  thread-xos/xrp_thread_impl.h
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/yvals.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdio.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdio.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/mbstatet.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/string.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/string.h:
+
+../xrp_api.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h:
+
+xrp_host_common.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdlib.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdlib.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/alloca.h:
+
+xrp_atomic.h:
+
+thread-xos/xrp_thread_impl.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_types.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/config/core.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-versions.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-types.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-matmap.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/tie.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-certified.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-compat.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/corebits.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_core.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_interrupt.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_timer.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_externalregisters.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_coprocessors.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/intctrl.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros-compat.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_common.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/system.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_params.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/sys/reent.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/wchar.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwcstod.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwstr.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/fenv.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/ymath.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/ymath.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_errors.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_regaccess.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_log.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_thread.h:
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+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_cond.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_event.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_mutex.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_msgq.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_semaphore.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_blockmem.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_barrier.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_timer.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_stopwatch.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_syslog.h:
+
+standalone/xrp_host_impl.h:
+
+../xrp_api.h:
+
+thread-xos/xrp_thread_impl.h:
+
+thread-xos/xrp_queue_impl.h:
+
+xrp_threaded_queue.h:
+
+thread-xos/xrp_thread_impl.h:

+ 1 - 0
driver/xrp-user/xrp-host/.deps/libxrp_host_standalone_a-xrp_sync_queue.Po

@@ -0,0 +1 @@
+# dummy

+ 196 - 0
driver/xrp-user/xrp-host/.deps/libxrp_host_standalone_a-xrp_threaded_queue.Po

@@ -0,0 +1,196 @@
+libxrp_host_standalone_a-xrp_threaded_queue.o: xrp_threaded_queue.c \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdio.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdio.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/mbstatet.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h \
+  ../xrp-common/xrp_debug.h xrp_host_common.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdlib.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdlib.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/alloca.h \
+  xrp_atomic.h thread-xos/xrp_thread_impl.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_types.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/config/core.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-versions.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-types.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-matmap.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/tie.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-certified.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-compat.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/corebits.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_core.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_interrupt.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_timer.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_externalregisters.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_coprocessors.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/intctrl.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros-compat.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_common.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/system.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_params.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/sys/reent.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/wchar.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwcstod.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwstr.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/fenv.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/ymath.h \
+  /home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/ymath.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_errors.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_regaccess.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_log.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_thread.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_cond.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_event.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_mutex.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_msgq.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_semaphore.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_blockmem.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_barrier.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_timer.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_stopwatch.h \
+  /home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_syslog.h \
+  standalone/xrp_host_impl.h ../xrp_api.h thread-xos/xrp_thread_impl.h \
+  thread-xos/xrp_queue_impl.h xrp_threaded_queue.h \
+  thread-xos/xrp_thread_impl.h xrp_threaded_queue.h
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdio.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdio.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/yvals.h:
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+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-isa.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/lib/xcc/include/stdarg.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/mbstatet.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_scmpr.h:
+
+../xrp-common/xrp_debug.h:
+
+xrp_host_common.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdlib.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stdlib.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/alloca.h:
+
+xrp_atomic.h:
+
+thread-xos/xrp_thread_impl.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_types.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stdint.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/config/core.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-versions.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xtensa-types.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/core-matmap.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/tie.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-certified.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/stddef.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/stddef.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/hal-compat.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/corebits.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_core.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_interrupt.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_timer.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_externalregisters.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/tie/xt_coprocessors.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/intctrl.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/core-macros-compat.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_common.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/arch/include/xtensa/config/system.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_params.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/sys/reent.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/wchar.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwcstod.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/xwstr.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/fenv.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/ymath.h:
+
+/home/jianghm/xtensa/XtDevTools/install/builds/RI-2020.4-linux/q7_check/xtensa-elf/include/c99/ymath.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_errors.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_regaccess.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_log.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_thread.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_cond.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_event.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_mutex.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_msgq.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_semaphore.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_blockmem.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_barrier.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_timer.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_stopwatch.h:
+
+/home/jianghm/xtensa/XtDevTools/install/tools/RI-2020.4-linux/XtensaTools/xtensa-elf/include/xtensa/xos_syslog.h:
+
+standalone/xrp_host_impl.h:
+
+../xrp_api.h:
+
+thread-xos/xrp_thread_impl.h:
+
+thread-xos/xrp_queue_impl.h:
+
+xrp_threaded_queue.h:
+
+thread-xos/xrp_thread_impl.h:
+
+xrp_threaded_queue.h:

+ 52 - 0
driver/xrp-user/xrp-host/Makefile

@@ -0,0 +1,52 @@
+##
+ # Copyright (C) 2021 Alibaba Group Holding Limited
+ #
+ # This program is free software; you can redistribute it and/or modify
+ # it under the terms of the GNU General Public License version 2 as
+ # published by the Free Software Foundation.
+##
+
+
+# INCLUDES = -I../../driver/isp -I../../common
+
+TARGET = libxrp_linux.a
+
+CFLAGS = -O0 -Wall -g -lm -lpthread
+CFLAGS += -fPIC
+
+# USE_THREADS = 
+
+# ifdef USE_THREADS
+queue_sources = xrp_threaded_queue.c
+INCLUDE +=-Ithread-pthread 
+# else
+# queue_sources = xrp_sync_queue.c
+# endif
+
+xrp_SRCS += $(queue_sources)
+xrp_SRCS += xrp_host_common.c
+xrp_SRCS += hosted/xrp_linux.c
+xrp_SRCS += xrp_report.c
+
+INCLUDES = -I$(CURDIR) -Ihosted -I../include -Ithread-pthread -I../xrp-common -I../../xrp-kernel
+# object files will be generated from .c sourcefiles
+xrp_OBJS = $(notdir $(xrp_SRCS:.c=.o))
+
+all: $(TARGET)
+
+
+$(xrp_OBJS): $(xrp_SRCS)
+	$(CC) -c $(CFLAGS) $(INCLUDES)  $(xrp_SRCS)
+
+
+$(TARGET): $(xrp_OBJS)
+	$(AR)  -rc $(TARGET) $(xrp_OBJS)
+
+clean:
+	rm -f *.o *.a
+	rm -rf output
+
+install:
+
+.PHONY: clean all prepare common
+

+ 69 - 0
driver/xrp-user/xrp-host/Makefile.am

@@ -0,0 +1,69 @@
+#
+# Copyright (c) 2017 - 2018 Cadence Design Systems Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+#
+
+AM_CPPFLAGS = -I$(srcdir)/.. -I$(srcdir) -I$(srcdir)/../xrp-common \
+	      -I$(srcdir)/thread-@THREADS_IMPL@
+AM_CFLAGS = -W -Wall $(THREADS_CFLAGS)
+
+include_HEADERS = ../xrp_api.h
+lib_LIBRARIES =
+
+if BUILD_STANDALONE
+lib_LIBRARIES += libxrp-host-standalone.a
+endif
+if BUILD_HOSTED
+lib_LIBRARIES += libxrp-host-hosted.a
+endif
+if BUILD_SINGLE
+lib_LIBRARIES += libxrp-host-single.a
+endif
+
+if USE_THREADS
+queue_sources = xrp_threaded_queue.c
+else
+queue_sources = xrp_sync_queue.c
+endif
+
+libxrp_host_standalone_a_CPPFLAGS = $(AM_CPPFLAGS) \
+				    $(LIBFDT_CPPFLAGS) \
+				    -I$(srcdir)/standalone \
+				    -I$(srcdir)/../xrp-kernel
+libxrp_host_standalone_a_SOURCES = xrp_host_common.c \
+				   $(queue_sources) \
+				   standalone/xrp_host.c \
+				   standalone/xrp_@HOST_OS@.c \
+				   ../xrp-kernel/xrp_alloc.c
+
+libxrp_host_hosted_a_CPPFLAGS = $(AM_CPPFLAGS) \
+				-I$(srcdir)/hosted \
+				-I$(srcdir)/../xrp-kernel
+libxrp_host_hosted_a_SOURCES = xrp_host_common.c \
+			       $(queue_sources) \
+			       hosted/xrp_@HOST_OS@.c
+
+libxrp_host_single_a_CPPFLAGS = $(AM_CPPFLAGS) \
+				-I$(srcdir)/single
+libxrp_host_single_a_SOURCES = xrp_host_common.c \
+			       $(queue_sources) \
+			       single/xrp_single.c \
+			       ../xrp-common/xrp_ns.c

+ 0 - 0
driver/xrp-user/xrp-host/hosted/.deps/.dirstamp


+ 1 - 0
driver/xrp-user/xrp-host/hosted/.deps/libxrp_host_hosted_a-xrp_elf.Po

@@ -0,0 +1 @@
+# dummy

+ 298 - 0
driver/xrp-user/xrp-host/hosted/.deps/libxrp_host_hosted_a-xrp_linux.Po

@@ -0,0 +1,298 @@
+hosted/libxrp_host_hosted_a-xrp_linux.o: hosted/xrp_linux.c \
+ /usr/include/stdc-predef.h /usr/include/fcntl.h /usr/include/features.h \
+ /usr/include/x86_64-linux-gnu/sys/cdefs.h \
+ /usr/include/x86_64-linux-gnu/bits/wordsize.h \
+ /usr/include/x86_64-linux-gnu/bits/long-double.h \
+ /usr/include/x86_64-linux-gnu/gnu/stubs.h \
+ /usr/include/x86_64-linux-gnu/gnu/stubs-64.h \
+ /usr/include/x86_64-linux-gnu/bits/types.h \
+ /usr/include/x86_64-linux-gnu/bits/typesizes.h \
+ /usr/include/x86_64-linux-gnu/bits/fcntl.h \
+ /usr/include/x86_64-linux-gnu/bits/fcntl-linux.h \
+ /usr/include/x86_64-linux-gnu/bits/types/struct_timespec.h \
+ /usr/include/x86_64-linux-gnu/bits/stat.h \
+ /usr/include/x86_64-linux-gnu/bits/fcntl2.h \
+ /usr/lib/gcc/x86_64-linux-gnu/7/include/stdint.h /usr/include/stdint.h \
+ /usr/include/x86_64-linux-gnu/bits/libc-header-start.h \
+ /usr/include/x86_64-linux-gnu/bits/wchar.h \
+ /usr/include/x86_64-linux-gnu/bits/stdint-intn.h \
+ /usr/include/x86_64-linux-gnu/bits/stdint-uintn.h /usr/include/stdio.h \
+ /usr/lib/gcc/x86_64-linux-gnu/7/include/stddef.h \
+ /usr/include/x86_64-linux-gnu/bits/types/__FILE.h \
+ /usr/include/x86_64-linux-gnu/bits/types/FILE.h \
+ /usr/include/x86_64-linux-gnu/bits/libio.h \
+ /usr/include/x86_64-linux-gnu/bits/_G_config.h \
+ /usr/include/x86_64-linux-gnu/bits/types/__mbstate_t.h \
+ /usr/lib/gcc/x86_64-linux-gnu/7/include/stdarg.h \
+ /usr/include/x86_64-linux-gnu/bits/stdio_lim.h \
+ /usr/include/x86_64-linux-gnu/bits/sys_errlist.h \
+ /usr/include/x86_64-linux-gnu/bits/stdio.h \
+ /usr/include/x86_64-linux-gnu/bits/stdio2.h /usr/include/stdlib.h \
+ /usr/include/x86_64-linux-gnu/bits/waitflags.h \
+ /usr/include/x86_64-linux-gnu/bits/waitstatus.h \
+ /usr/include/x86_64-linux-gnu/bits/floatn.h \
+ /usr/include/x86_64-linux-gnu/bits/floatn-common.h \
+ /usr/include/x86_64-linux-gnu/sys/types.h \
+ /usr/include/x86_64-linux-gnu/bits/types/clock_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/clockid_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/time_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/timer_t.h /usr/include/endian.h \
+ /usr/include/x86_64-linux-gnu/bits/endian.h \
+ /usr/include/x86_64-linux-gnu/bits/byteswap.h \
+ /usr/include/x86_64-linux-gnu/bits/byteswap-16.h \
+ /usr/include/x86_64-linux-gnu/bits/uintn-identity.h \
+ /usr/include/x86_64-linux-gnu/sys/select.h \
+ /usr/include/x86_64-linux-gnu/bits/select.h \
+ /usr/include/x86_64-linux-gnu/bits/types/sigset_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/__sigset_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/struct_timeval.h \
+ /usr/include/x86_64-linux-gnu/bits/select2.h \
+ /usr/include/x86_64-linux-gnu/sys/sysmacros.h \
+ /usr/include/x86_64-linux-gnu/bits/sysmacros.h \
+ /usr/include/x86_64-linux-gnu/bits/pthreadtypes.h \
+ /usr/include/x86_64-linux-gnu/bits/thread-shared-types.h \
+ /usr/include/x86_64-linux-gnu/bits/pthreadtypes-arch.h \
+ /usr/include/alloca.h \
+ /usr/include/x86_64-linux-gnu/bits/stdlib-bsearch.h \
+ /usr/include/x86_64-linux-gnu/bits/stdlib-float.h \
+ /usr/include/x86_64-linux-gnu/bits/stdlib.h /usr/include/string.h \
+ /usr/include/x86_64-linux-gnu/bits/types/locale_t.h \
+ /usr/include/x86_64-linux-gnu/bits/types/__locale_t.h \
+ /usr/include/strings.h \
+ /usr/include/x86_64-linux-gnu/bits/strings_fortified.h \
+ /usr/include/x86_64-linux-gnu/bits/string_fortified.h \
+ /usr/include/x86_64-linux-gnu/sys/ioctl.h \
+ /usr/include/x86_64-linux-gnu/bits/ioctls.h \
+ /usr/include/x86_64-linux-gnu/asm/ioctls.h \
+ /usr/include/asm-generic/ioctls.h /usr/include/linux/ioctl.h \
+ /usr/include/x86_64-linux-gnu/asm/ioctl.h \
+ /usr/include/asm-generic/ioctl.h \
+ /usr/include/x86_64-linux-gnu/bits/ioctl-types.h \
+ /usr/include/x86_64-linux-gnu/sys/ttydefaults.h \
+ /usr/include/x86_64-linux-gnu/sys/stat.h /usr/include/unistd.h \
+ /usr/include/x86_64-linux-gnu/bits/posix_opt.h \
+ /usr/include/x86_64-linux-gnu/bits/environments.h \
+ /usr/include/x86_64-linux-gnu/bits/confname.h \
+ /usr/include/x86_64-linux-gnu/bits/getopt_posix.h \
+ /usr/include/x86_64-linux-gnu/bits/getopt_core.h \
+ /usr/include/x86_64-linux-gnu/bits/unistd.h ../xrp-common/xrp_types.h \
+ xrp_host_common.h xrp_atomic.h thread-pthread/xrp_thread_impl.h \
+ /usr/include/pthread.h /usr/include/sched.h \
+ /usr/include/x86_64-linux-gnu/bits/sched.h \
+ /usr/include/x86_64-linux-gnu/bits/cpu-set.h /usr/include/time.h \
+ /usr/include/x86_64-linux-gnu/bits/time.h \
+ /usr/include/x86_64-linux-gnu/bits/types/struct_tm.h \
+ /usr/include/x86_64-linux-gnu/bits/types/struct_itimerspec.h \
+ /usr/include/x86_64-linux-gnu/bits/setjmp.h hosted/xrp_host_impl.h \
+ ../xrp_api.h thread-pthread/xrp_queue_impl.h xrp_threaded_queue.h \
+ hosted/xrp_host_impl.h ../xrp-kernel/xrp_kernel_defs.h
+
+/usr/include/stdc-predef.h:
+
+/usr/include/fcntl.h:
+
+/usr/include/features.h:
+
+/usr/include/x86_64-linux-gnu/sys/cdefs.h:
+
+/usr/include/x86_64-linux-gnu/bits/wordsize.h:
+
+/usr/include/x86_64-linux-gnu/bits/long-double.h:
+
+/usr/include/x86_64-linux-gnu/gnu/stubs.h:
+
+/usr/include/x86_64-linux-gnu/gnu/stubs-64.h:
+
+/usr/include/x86_64-linux-gnu/bits/types.h:
+
+/usr/include/x86_64-linux-gnu/bits/typesizes.h:
+
+/usr/include/x86_64-linux-gnu/bits/fcntl.h:
+
+/usr/include/x86_64-linux-gnu/bits/fcntl-linux.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/struct_timespec.h:
+
+/usr/include/x86_64-linux-gnu/bits/stat.h:
+
+/usr/include/x86_64-linux-gnu/bits/fcntl2.h:
+
+/usr/lib/gcc/x86_64-linux-gnu/7/include/stdint.h:
+
+/usr/include/stdint.h:
+
+/usr/include/x86_64-linux-gnu/bits/libc-header-start.h:
+
+/usr/include/x86_64-linux-gnu/bits/wchar.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdint-intn.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdint-uintn.h:
+
+/usr/include/stdio.h:
+
+/usr/lib/gcc/x86_64-linux-gnu/7/include/stddef.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/__FILE.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/FILE.h:
+
+/usr/include/x86_64-linux-gnu/bits/libio.h:
+
+/usr/include/x86_64-linux-gnu/bits/_G_config.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/__mbstate_t.h:
+
+/usr/lib/gcc/x86_64-linux-gnu/7/include/stdarg.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdio_lim.h:
+
+/usr/include/x86_64-linux-gnu/bits/sys_errlist.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdio.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdio2.h:
+
+/usr/include/stdlib.h:
+
+/usr/include/x86_64-linux-gnu/bits/waitflags.h:
+
+/usr/include/x86_64-linux-gnu/bits/waitstatus.h:
+
+/usr/include/x86_64-linux-gnu/bits/floatn.h:
+
+/usr/include/x86_64-linux-gnu/bits/floatn-common.h:
+
+/usr/include/x86_64-linux-gnu/sys/types.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/clock_t.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/clockid_t.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/time_t.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/timer_t.h:
+
+/usr/include/endian.h:
+
+/usr/include/x86_64-linux-gnu/bits/endian.h:
+
+/usr/include/x86_64-linux-gnu/bits/byteswap.h:
+
+/usr/include/x86_64-linux-gnu/bits/byteswap-16.h:
+
+/usr/include/x86_64-linux-gnu/bits/uintn-identity.h:
+
+/usr/include/x86_64-linux-gnu/sys/select.h:
+
+/usr/include/x86_64-linux-gnu/bits/select.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/sigset_t.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/__sigset_t.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/struct_timeval.h:
+
+/usr/include/x86_64-linux-gnu/bits/select2.h:
+
+/usr/include/x86_64-linux-gnu/sys/sysmacros.h:
+
+/usr/include/x86_64-linux-gnu/bits/sysmacros.h:
+
+/usr/include/x86_64-linux-gnu/bits/pthreadtypes.h:
+
+/usr/include/x86_64-linux-gnu/bits/thread-shared-types.h:
+
+/usr/include/x86_64-linux-gnu/bits/pthreadtypes-arch.h:
+
+/usr/include/alloca.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdlib-bsearch.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdlib-float.h:
+
+/usr/include/x86_64-linux-gnu/bits/stdlib.h:
+
+/usr/include/string.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/locale_t.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/__locale_t.h:
+
+/usr/include/strings.h:
+
+/usr/include/x86_64-linux-gnu/bits/strings_fortified.h:
+
+/usr/include/x86_64-linux-gnu/bits/string_fortified.h:
+
+/usr/include/x86_64-linux-gnu/sys/ioctl.h:
+
+/usr/include/x86_64-linux-gnu/bits/ioctls.h:
+
+/usr/include/x86_64-linux-gnu/asm/ioctls.h:
+
+/usr/include/asm-generic/ioctls.h:
+
+/usr/include/linux/ioctl.h:
+
+/usr/include/x86_64-linux-gnu/asm/ioctl.h:
+
+/usr/include/asm-generic/ioctl.h:
+
+/usr/include/x86_64-linux-gnu/bits/ioctl-types.h:
+
+/usr/include/x86_64-linux-gnu/sys/ttydefaults.h:
+
+/usr/include/x86_64-linux-gnu/sys/stat.h:
+
+/usr/include/unistd.h:
+
+/usr/include/x86_64-linux-gnu/bits/posix_opt.h:
+
+/usr/include/x86_64-linux-gnu/bits/environments.h:
+
+/usr/include/x86_64-linux-gnu/bits/confname.h:
+
+/usr/include/x86_64-linux-gnu/bits/getopt_posix.h:
+
+/usr/include/x86_64-linux-gnu/bits/getopt_core.h:
+
+/usr/include/x86_64-linux-gnu/bits/unistd.h:
+
+../xrp-common/xrp_types.h:
+
+xrp_host_common.h:
+
+xrp_atomic.h:
+
+thread-pthread/xrp_thread_impl.h:
+
+/usr/include/pthread.h:
+
+/usr/include/sched.h:
+
+/usr/include/x86_64-linux-gnu/bits/sched.h:
+
+/usr/include/x86_64-linux-gnu/bits/cpu-set.h:
+
+/usr/include/time.h:
+
+/usr/include/x86_64-linux-gnu/bits/time.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/struct_tm.h:
+
+/usr/include/x86_64-linux-gnu/bits/types/struct_itimerspec.h:
+
+/usr/include/x86_64-linux-gnu/bits/setjmp.h:
+
+hosted/xrp_host_impl.h:
+
+../xrp_api.h:
+
+thread-pthread/xrp_queue_impl.h:
+
+xrp_threaded_queue.h:
+
+hosted/xrp_host_impl.h:
+
+../xrp-kernel/xrp_kernel_defs.h:

+ 0 - 0
driver/xrp-user/xrp-host/hosted/.dirstamp


+ 76 - 0
driver/xrp-user/xrp-host/hosted/xrp_host_impl.h

@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2016 - 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _XRP_LINUX_NATIVE_H
+#define _XRP_LINUX_NATIVE_H
+
+#include <xrp_api.h>
+#include "xrp_thread_impl.h"
+#include "xrp_queue_impl.h"
+
+struct xrp_device_impl {
+	int fd;
+};
+
+struct xrp_buffer_impl {
+};
+
+struct xrp_queue_impl {
+	struct xrp_request_queue queue;
+};
+
+void xrp_impl_release_device(struct xrp_device *device);
+
+void xrp_impl_create_device_buffer(struct xrp_device *device,
+				   struct xrp_buffer *buffer,
+				   size_t size,
+				   enum xrp_status *status);
+void xrp_impl_release_device_buffer(struct xrp_buffer *buffer);
+
+void xrp_impl_create_queue(struct xrp_queue *queue,
+			   enum xrp_status *status);
+void xrp_impl_release_queue(struct xrp_queue *queue);
+
+void xrp_impl_create_report(struct xrp_device *device,
+				struct xrp_report *report,
+				size_t size,
+			    enum xrp_status *status);
+				
+void xrp_impl_release_report(struct xrp_device *device,
+				struct xrp_report *report,enum xrp_status *status);
+int xrp_impl_add_report_item(struct xrp_report *report,
+								int (*cb)(void*context,void*data),
+								void* context,
+								size_t data_size);
+int xrp_impl_add_report_item_with_id(struct xrp_report *report,
+								int (*cb)(void*context,void*data),
+								int report_id,
+								void* context,
+								size_t data_size);								
+
+void xrp_impl_remove_report_item(struct xrp_report *report,int report_id);
+void xrp_impl_import_dma_buf(struct xrp_device *device, int fd,enum xrp_access_flags,uint64_t *phy_addr,
+                                uint64_t *user_addr,size_t* size,enum xrp_status *status);
+
+void xrp_impl_release_dma_buf(struct xrp_device *device, int fd,enum xrp_status *status);
+#endif

+ 478 - 0
driver/xrp-user/xrp-host/hosted/xrp_linux.c

@@ -0,0 +1,478 @@
+/*
+ * Copyright (c) 2016 - 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <fcntl.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/ioctl.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <signal.h>
+#include <unistd.h>
+
+#include "xrp_types.h"
+#include "xrp_host_common.h"
+#include "xrp_host_impl.h"
+#include "xrp_kernel_defs.h"
+#include "xrp_report.h"
+#include "dsp_common.h"
+struct xrp_request {
+	struct xrp_queue_item q;
+	void *in_data;
+	void *out_data;
+	size_t in_data_size;
+	size_t out_data_size;
+	struct xrp_buffer_group *buffer_group;
+	struct xrp_event *event;
+};
+
+/* Device API. */
+
+struct xrp_device *xrp_open_device(int idx, enum xrp_status *status)
+{
+	struct xrp_device *device;
+	char name[sizeof("/dev/xvp") + sizeof(int) * 4];
+	int fd;
+
+	sprintf(name, "/dev/xvp%u", idx);
+	fd = open(name, O_RDWR);
+	if (fd == -1) {
+		set_status(status, XRP_STATUS_FAILURE);
+		return NULL;
+	}
+	device = alloc_refcounted(sizeof(*device));
+	if (!device) {
+		set_status(status, XRP_STATUS_FAILURE);
+		return NULL;
+	}
+	device->impl.fd = fd;
+	set_status(status, XRP_STATUS_SUCCESS);
+	return device;
+}
+
+void xrp_impl_release_device(struct xrp_device *device)
+{
+	close(device->impl.fd);
+}
+
+
+/* Buffer API. */
+
+void xrp_impl_create_device_buffer(struct xrp_device *device,
+				   struct xrp_buffer *buffer,
+				   size_t size,
+				   enum xrp_status *status)
+{
+	struct xrp_ioctl_alloc ioctl_alloc = {
+		.size = size,
+	};
+	int ret;
+
+	xrp_retain_device(device);
+	buffer->device = device;
+	ret = ioctl(buffer->device->impl.fd, XRP_IOCTL_ALLOC, &ioctl_alloc);
+	if (ret < 0) {
+		xrp_release_device(buffer->device);
+		set_status(status, XRP_STATUS_FAILURE);
+		return;
+	}
+	buffer->ptr = (void *)(uintptr_t)ioctl_alloc.addr;
+	buffer->size = size;
+    buffer->phy_addr = ioctl_alloc.paddr;
+	set_status(status, XRP_STATUS_SUCCESS);
+}
+
+void xrp_impl_release_device_buffer(struct xrp_buffer *buffer)
+{
+	struct xrp_ioctl_alloc ioctl_alloc = {
+		.addr = (uintptr_t)buffer->ptr,
+	};
+	ioctl(buffer->device->impl.fd,
+	      XRP_IOCTL_FREE, &ioctl_alloc);
+
+	xrp_release_device(buffer->device);
+}
+
+/* Queue API. */
+
+static void _xrp_run_command(struct xrp_queue *queue,
+			     const void *in_data, size_t in_data_size,
+			     void *out_data, size_t out_data_size,
+			     struct xrp_buffer_group *buffer_group,
+			     enum xrp_status *status)
+{
+	int ret;
+
+	if (buffer_group)
+		xrp_mutex_lock(&buffer_group->mutex);
+	{
+		size_t n_buffers = buffer_group ? buffer_group->n_buffers : 0;
+		struct xrp_ioctl_buffer ioctl_buffer[n_buffers];/* TODO */
+		struct xrp_ioctl_queue ioctl_queue = {
+			.flags = (queue->use_nsid ? XRP_QUEUE_FLAG_NSID : 0) |
+				((queue->priority << XRP_QUEUE_FLAG_PRIO_SHIFT) &
+				 XRP_QUEUE_FLAG_PRIO),
+			.in_data_size = in_data_size,
+			.out_data_size = out_data_size,
+			.buffer_size = n_buffers *
+				sizeof(struct xrp_ioctl_buffer),
+			.in_data_addr = (uintptr_t)in_data,
+			.out_data_addr = (uintptr_t)out_data,
+			.buffer_addr = (uintptr_t)ioctl_buffer,
+			.nsid_addr = (uintptr_t)queue->nsid,
+		};
+		size_t i;
+
+		for (i = 0; i < n_buffers; ++i) {
+			ioctl_buffer[i] = (struct xrp_ioctl_buffer){
+				.flags = buffer_group->buffer[i].access_flags,
+				.size = buffer_group->buffer[i].buffer->size,
+				.addr = (uintptr_t)buffer_group->buffer[i].buffer->ptr,
+			};
+		}
+		if (buffer_group)
+			xrp_mutex_unlock(&buffer_group->mutex);
+
+		ret = ioctl(queue->device->impl.fd,
+			    XRP_IOCTL_QUEUE, &ioctl_queue);
+	}
+    // printf("%s, user out data\n",__func__);
+	if (ret < 0)
+		set_status(status, XRP_STATUS_FAILURE);
+	else
+		set_status(status, XRP_STATUS_SUCCESS);
+}
+
+static void xrp_request_process(struct xrp_queue_item *q,
+				void *context)
+{
+	enum xrp_status status;
+	struct xrp_request *rq = (struct xrp_request *)q;
+
+	_xrp_run_command(context,
+			 rq->in_data, rq->in_data_size,
+			 rq->out_data, rq->out_data_size,
+			 rq->buffer_group,
+			 &status);
+
+	if (rq->buffer_group)
+		xrp_release_buffer_group(rq->buffer_group);
+
+	if (rq->event) {
+		xrp_impl_broadcast_event(rq->event, status);
+		xrp_release_event(rq->event);
+	}
+	// printf("%s,get resp with event %p!\n",__func__,rq->event);
+	free(rq->in_data);
+	free(rq);
+}
+
+void xrp_impl_create_queue(struct xrp_queue *queue,
+			   enum xrp_status *status)
+{
+	xrp_queue_init(&queue->impl.queue, queue->priority,
+		       queue, xrp_request_process);
+	set_status(status, XRP_STATUS_SUCCESS);
+}
+
+void xrp_impl_release_queue(struct xrp_queue *queue)
+{
+	xrp_queue_destroy(&queue->impl.queue);
+}
+
+/* Communication API */
+
+void xrp_enqueue_command(struct xrp_queue *queue,
+			 const void *in_data, size_t in_data_size,
+			 void *out_data, size_t out_data_size,
+			 struct xrp_buffer_group *buffer_group,
+			 struct xrp_event **evt,
+			 enum xrp_status *status)
+{
+	struct xrp_request *rq;
+	void *in_data_copy;
+
+	rq = malloc(sizeof(*rq));
+	in_data_copy = malloc(in_data_size);
+
+	if (!rq || (in_data_size && !in_data_copy)) {
+		free(in_data_copy);
+		free(rq);
+		set_status(status, XRP_STATUS_FAILURE);
+		return;
+	}
+
+	memcpy(in_data_copy, in_data, in_data_size);
+	rq->in_data = in_data_copy;
+	rq->in_data_size = in_data_size;
+	rq->out_data = out_data;
+	rq->out_data_size = out_data_size;
+
+	if (evt) {
+		struct xrp_event *event = xrp_event_create();
+
+		if (!event) {
+			free(rq->in_data);
+			free(rq);
+			set_status(status, XRP_STATUS_FAILURE);
+			return;
+		}
+		xrp_retain_queue(queue);
+		event->queue = queue;
+		*evt = event;
+		xrp_retain_event(event);
+		rq->event = event;
+	} else {
+		rq->event = NULL;
+	}
+
+	if (buffer_group)
+		xrp_retain_buffer_group(buffer_group);
+	rq->buffer_group = buffer_group;
+
+	set_status(status, XRP_STATUS_SUCCESS);
+	xrp_queue_push(&queue->impl.queue, &rq->q);
+}
+
+static struct xrp_report *reporter;
+
+void xrp_reporter_sig_handler()
+{
+	// printf("%s\n",__func__);
+	struct xrp_report_buffer *report_buffer;
+	if(!reporter || !reporter->report_buf)
+	{
+		return;
+	}
+	report_buffer = (struct xrp_report_buffer *)reporter->report_buf;
+	// printf("buffer:%lx,id:%d,data:%x,%x,%x,%x\n",report_buffer,report_buffer->report_id,report_buffer->data[0],report_buffer->data[1],report_buffer->data[2],report_buffer->data[3]);
+
+	xrp_process_report(&reporter->list,report_buffer->data,report_buffer->report_id);
+}
+
+
+int xrp_add_report_item_with_id(struct xrp_report *report,
+								int (*cb)(void*context,void*data),
+								int report_id,
+								void* context,
+								size_t data_size)
+{
+	// int id;
+	// // set_status(status, XRP_STATUS_SUCCESS);
+	// id =xrp_alloc_report_id(&report->list);
+	if(report_id<0 || !report)
+	{
+		// set_status(status, XRP_STATUS_FAILURE);
+		return -1;
+	}
+	if(data_size>report->buf_size)
+	{
+		//realloc()
+		DSP_PRINT(WARNING,"report instance size %d is exceed limit %d\n",data_size,report->buf_size);
+		// set_status(status, XRP_STATUS_FAILURE);
+		return -1;
+	}
+	char *report_buf = malloc(data_size);
+	if(!report_buf)
+	{
+		// set_status(status, XRP_STATUS_FAILURE);
+		return -1;
+	}
+	struct xrp_report_item new_item={
+	     .report_id = report_id,
+		 .buf = report_buf,
+		 .size = data_size,
+		 .context = context,
+		 .fn = cb,
+	};
+
+	DSP_PRINT(DEBUG,"add report id:%d\n", report_id);
+	if(xrp_add_report(&report->list,&new_item))
+	{
+		free(report_buf);
+		return -1;
+	}
+	DSP_PRINT(INFO,"the report item: %d is added sucessfully\n",report_id);
+	return report_id;
+
+}
+int xrp_add_report_item(struct xrp_report *report,
+								int (*cb)(void*context,void*data),
+								void* context,
+								size_t data_size)
+{
+	int id;
+	id =xrp_alloc_report_id(&report->list);
+	if(id<0)
+	{
+		return -1;
+	}
+	return xrp_add_report_item_with_id(report,cb,id,context,data_size);
+}
+
+
+
+
+void xrp_remove_report_item(struct xrp_report *report,int report_id)
+{
+	int id;
+	struct xrp_report_item* item=xrp_get_report_entry(&report->list,report_id);
+	free(item->buf);
+	xrp_remove_report(&report->list,report_id);
+}
+
+void xrp_impl_create_report(struct xrp_device *device,
+				struct xrp_report *report,
+				size_t size,
+			    enum xrp_status *status)
+{
+	// char *report_buf = malloc(size+4);
+	// if(!report_buf)
+	// {
+	// 	set_status(status, XRP_STATUS_FAILURE);
+	// 	return;
+	// }
+	
+	struct xrp_ioctl_alloc ioctl_alloc = {
+		.addr = (uintptr_t)NULL,
+		.size = size,
+	};
+	int ret;
+
+	xrp_retain_device(device);
+	report->device = device;
+	ret = ioctl(report->device->impl.fd, XRP_IOCTL_REPORT_CREATE, &ioctl_alloc);
+	if (ret < 0) {
+		// free(report_buf);
+		set_status(status, XRP_STATUS_FAILURE);
+		return;
+	}
+	if(ioctl_alloc.addr ==NULL)
+	{
+		DSP_PRINT(INFO,"alloc report buffer fail\n");
+        set_status(status, XRP_STATUS_FAILURE);
+        return ;
+	}
+	report->report_buf = (void *)(uintptr_t)ioctl_alloc.addr;
+	// printf("buf:%lx,report:x\n",ioctl_alloc.addr,report);
+	report->buf_size = size;
+	report->list.queue.head=NULL;
+	reporter=report;
+	signal(SIGIO, xrp_reporter_sig_handler); /* sigaction() is better */
+	fcntl(report->device->impl.fd, F_SETOWN, getpid());
+	int oflags = fcntl(report->device->impl.fd, F_GETFL);
+	fcntl(report->device->impl.fd, F_SETFL, oflags | FASYNC);
+	set_status(status, XRP_STATUS_SUCCESS);
+	DSP_PRINT(INFO,"buf:%lx,user space report create\n",ioctl_alloc.addr);
+}
+void xrp_impl_release_report(struct xrp_device *device,
+				struct xrp_report *report,enum xrp_status *status)
+{
+	struct xrp_ioctl_alloc ioctl_alloc = {
+		.addr = (uintptr_t)report->report_buf,
+		.size = report->buf_size,
+	};
+	int ret = ioctl(report->device->impl.fd, XRP_IOCTL_REPORT_RELEASE, &ioctl_alloc);
+	if (ret < 0) {
+		// free(report_buf);
+		set_status(status, XRP_STATUS_FAILURE);
+		return;
+	}
+	report->report_buf=NULL;
+    xrp_release_device(device);
+	set_status(status, XRP_STATUS_SUCCESS);
+	return;
+}
+
+void xrp_import_dma_buf(struct xrp_device *device, int fd,enum xrp_access_flags flag,uint64_t *phy_addr,
+                                uint64_t *user_addr,size_t* size,enum xrp_status *status)
+{
+    	struct xrp_dma_buf dma_buf;
+
+        if(fd < 0 || !(flag&XRP_FLAG_READ_WRITE))
+        {
+            set_status(status, XRP_STATUS_FAILURE);
+            DSP_PRINT(DEBUG,"param check fail\n");
+            return;
+        }
+        dma_buf.fd = fd;
+        dma_buf.flags = flag;
+        int ret = ioctl(device->impl.fd, XRP_IOCTL_DMABUF_IMPORT,&dma_buf);
+
+        if (ret < 0) {
+            DSP_PRINT(DEBUG,"_DMABUF_IMPORT fail\n");
+            set_status(status, XRP_STATUS_FAILURE);
+	    }
+        else
+        {
+            *phy_addr = dma_buf.paddr;
+            *user_addr = dma_buf.addr;
+            *size = dma_buf.size;
+            set_status(status, XRP_STATUS_SUCCESS);
+        }
+        return;
+}
+
+void xrp_release_dma_buf(struct xrp_device *device, int fd,enum xrp_status *status)
+{
+        if(fd < 0)
+        {
+            set_status(status, XRP_STATUS_FAILURE);
+            return;
+        }
+        int ret = ioctl(device->impl.fd, XRP_IOCTL_DMABUF_RELEASE,&fd);
+
+        if (ret < 0) {
+            set_status(status, XRP_STATUS_FAILURE);
+	    }
+        else
+        {
+            set_status(status, XRP_STATUS_SUCCESS);
+	    }
+        return ;
+
+}
+
+void xrp_flush_dma_buf(struct xrp_device *device, int fd,enum xrp_access_flags flag,enum xrp_status *status)
+{
+        struct xrp_dma_buf dma_buf;
+        dma_buf.fd = fd;
+        dma_buf.flags = flag;
+        if(fd < 0)
+        {
+            set_status(status, XRP_STATUS_FAILURE);
+            return;
+        }
+        
+        int ret = ioctl(device->impl.fd, XRP_IOCTL_DMABUF_SYNC,&dma_buf);
+
+        if (ret < 0) {
+            set_status(status, XRP_STATUS_FAILURE);
+	    }
+        else
+        {
+            set_status(status, XRP_STATUS_SUCCESS);
+	    }
+}

+ 24 - 0
driver/xrp-user/xrp-host/thread-pthread/xrp_queue_impl.h

@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "xrp_threaded_queue.h"

+ 107 - 0
driver/xrp-user/xrp-host/thread-pthread/xrp_thread_impl.h

@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _XRP_THREAD_PTHREAD_IMPL_H
+#define _XRP_THREAD_PTHREAD_IMPL_H
+
+#include <pthread.h>
+
+typedef pthread_t xrp_thread;
+typedef pthread_mutex_t xrp_mutex;
+
+typedef struct xrp_cond {
+	pthread_mutex_t mutex;
+	pthread_cond_t cond;
+} xrp_cond;
+
+static inline void xrp_mutex_init(xrp_mutex *p)
+{
+	pthread_mutex_init(p, NULL);
+}
+
+static inline void xrp_mutex_lock(xrp_mutex *p)
+{
+	pthread_mutex_lock(p);
+}
+
+static inline void xrp_mutex_unlock(xrp_mutex *p)
+{
+	pthread_mutex_unlock(p);
+}
+
+static inline void xrp_mutex_destroy(xrp_mutex *p)
+{
+	pthread_mutex_destroy(p);
+}
+
+static inline void xrp_cond_init(xrp_cond *p)
+{
+	pthread_mutex_init(&p->mutex, NULL);
+	pthread_cond_init(&p->cond, NULL);
+}
+
+static inline void xrp_cond_lock(xrp_cond *p)
+{
+	pthread_mutex_lock(&p->mutex);
+}
+
+static inline void xrp_cond_unlock(xrp_cond *p)
+{
+	pthread_mutex_unlock(&p->mutex);
+}
+
+static inline void xrp_cond_broadcast(xrp_cond *p)
+{
+	pthread_cond_broadcast(&p->cond);
+}
+
+static inline void xrp_cond_wait(xrp_cond *p)
+{
+	pthread_cond_wait(&p->cond, &p->mutex);
+}
+
+static inline void xrp_cond_destroy(xrp_cond *p)
+{
+	pthread_mutex_destroy(&p->mutex);
+	pthread_cond_destroy(&p->cond);
+}
+
+static inline int xrp_thread_create(xrp_thread *thread, int priority,
+				    void *(*thread_func)(void *),
+				    void *p)
+{
+	(void)priority;
+	return pthread_create(thread, NULL, thread_func, p) == 0;
+}
+
+static inline int xrp_thread_join(xrp_thread *thread)
+{
+	return pthread_join(*thread, NULL) == 0;
+}
+
+static inline int xrp_thread_detach(xrp_thread *thread)
+{
+	return pthread_detach(*thread) == 0;
+}
+
+#endif

+ 31 - 0
driver/xrp-user/xrp-host/xrp_atomic.h

@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _XRP_ATOMIC_H
+#define _XRP_ATOMIC_H
+
+#if defined(__STDC_NO_ATOMICS__)
+#warning The compiler does not support atomics, reference counting may not be thread safe
+#endif
+
+#endif

+ 482 - 0
driver/xrp-user/xrp-host/xrp_host_common.c

@@ -0,0 +1,482 @@
+/*
+ * Copyright (c) 2016 - 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+
+#include "xrp_api.h"
+#include "xrp_host_common.h"
+#include "dsp_common.h"
+
+/* Device API. */
+
+void xrp_retain_device(struct xrp_device *device)
+{
+   DSP_PRINT(DEBUG," ref %d\n",device->ref.count);
+	retain_refcounted(device);
+}
+
+void xrp_release_device(struct xrp_device *device)
+{
+    DSP_PRINT(DEBUG,"ref %d\n",device->ref.count);
+	if (last_release_refcounted(device)) {
+		xrp_impl_release_device(device);
+		free(device);
+	}
+}
+
+
+/* Buffer API. */
+
+struct xrp_buffer *xrp_create_buffer(struct xrp_device *device,
+				     size_t size, void *host_ptr,
+				     enum xrp_status *status)
+{
+	struct xrp_buffer *buf;
+
+	if (!host_ptr && !device) {
+		set_status(status, XRP_STATUS_FAILURE);
+		return NULL;
+	}
+
+	buf = alloc_refcounted(sizeof(*buf));
+
+	if (!buf) {
+		set_status(status, XRP_STATUS_FAILURE);
+		return NULL;
+	}
+
+	if (!host_ptr) {
+		enum xrp_status s;
+
+		buf->type = XRP_BUFFER_TYPE_DEVICE;
+		xrp_impl_create_device_buffer(device, buf, size, &s);
+		if (s != XRP_STATUS_SUCCESS) {
+			free(buf);
+			buf = NULL;
+		}
+		set_status(status, s);
+	} else {
+		buf->type = XRP_BUFFER_TYPE_HOST;
+		buf->ptr = host_ptr;
+		buf->size = size;
+		set_status(status, XRP_STATUS_SUCCESS);
+	}
+    // printf("%s,Debug V:%llx,P:%llx\n",__FUNCTION__,buf->ptr,buf->phy_addr);
+	return buf;
+}
+
+void xrp_retain_buffer(struct xrp_buffer *buffer)
+{
+	retain_refcounted(buffer);
+}
+
+void xrp_release_buffer(struct xrp_buffer *buffer)
+{
+	DSP_PRINT(DEBUG,"ref:%d\n",buffer->ref.count);
+    if (last_release_refcounted(buffer)) {
+        // printf("%s,ref:%d\n",__FUNCTION__,buffer->ref.count);
+		if (buffer->type == XRP_BUFFER_TYPE_DEVICE)
+			xrp_impl_release_device_buffer(buffer);
+		free(buffer);
+	}
+}
+
+void *xrp_map_buffer(struct xrp_buffer *buffer, size_t offset, size_t size,
+		     enum xrp_access_flags map_flags, enum xrp_status *status)
+{
+	if (offset <= buffer->size &&
+	    size <= buffer->size - offset) {
+		retain_refcounted(buffer);
+		(void)++buffer->map_count;
+		buffer->map_flags |= map_flags;
+		set_status(status, XRP_STATUS_SUCCESS);
+		return (char *)buffer->ptr + offset;
+	}
+	set_status(status, XRP_STATUS_FAILURE);
+	return NULL;
+}
+
+void xrp_unmap_buffer(struct xrp_buffer *buffer, void *p,
+		      enum xrp_status *status)
+{
+	if (p >= buffer->ptr &&
+	    (size_t)((char *)p - (char *)buffer->ptr) <= buffer->size) {
+		(void)--buffer->map_count;
+		xrp_release_buffer(buffer);
+		set_status(status, XRP_STATUS_SUCCESS);
+	} else {
+		set_status(status, XRP_STATUS_FAILURE);
+	}
+}
+
+void xrp_buffer_get_info(struct xrp_buffer *buffer, enum xrp_buffer_info info,
+			 void *out, size_t out_sz, enum xrp_status *status)
+{
+	enum xrp_status s = XRP_STATUS_FAILURE;
+	size_t sz;
+	void *ptr;
+
+	switch (info) {
+	case XRP_BUFFER_SIZE_SIZE_T:
+		sz = sizeof(buffer->size);
+		ptr = &buffer->size;
+		break;
+
+	case XRP_BUFFER_HOST_POINTER_PTR:
+		if (buffer->type != XRP_BUFFER_TYPE_HOST) {
+			static void *p = NULL;
+			ptr = &p;
+		} else {
+			ptr = &buffer->ptr;
+		}
+		sz = sizeof(void *);
+		break;
+    case XRP_BUFFER_PHY_ADDR:
+        ptr = &buffer->phy_addr;
+        sz = sizeof(void *);
+        break;
+    case XRP_BUFFER_USER_ADDR:
+        ptr = &buffer->ptr;
+        sz = sizeof(void *);
+        break;
+	default:
+		goto out;
+	}
+
+	if (sz == out_sz) {
+		memcpy(out, ptr, sz);
+		s = XRP_STATUS_SUCCESS;
+	}
+out:
+	set_status(status, s);
+}
+
+
+/* Buffer group API. */
+
+struct xrp_buffer_group *xrp_create_buffer_group(enum xrp_status *status)
+{
+	struct xrp_buffer_group *group = alloc_refcounted(sizeof(*group));
+
+	if (group) {
+		xrp_mutex_init(&group->mutex);
+		set_status(status, XRP_STATUS_SUCCESS);
+	} else {
+		set_status(status, XRP_STATUS_FAILURE);
+	}
+
+	return group;
+}
+
+void xrp_retain_buffer_group(struct xrp_buffer_group *group)
+{
+	retain_refcounted(group);
+}
+
+void xrp_release_buffer_group(struct xrp_buffer_group *group)
+{
+	if (last_release_refcounted(group)) {
+		size_t i;
+
+		xrp_mutex_lock(&group->mutex);
+		for (i = 0; i < group->n_buffers; ++i)
+			xrp_release_buffer(group->buffer[i].buffer);
+		xrp_mutex_unlock(&group->mutex);
+		xrp_mutex_destroy(&group->mutex);
+		free(group->buffer);
+		free(group);
+	}
+}
+
+size_t xrp_add_buffer_to_group(struct xrp_buffer_group *group,
+			       struct xrp_buffer *buffer,
+			       enum xrp_access_flags access_flags,
+			       enum xrp_status *status)
+{
+	size_t n_buffers;
+
+	xrp_mutex_lock(&group->mutex);
+	if (group->n_buffers == group->capacity) {
+		struct xrp_buffer_group_record *r =
+			realloc(group->buffer,
+				sizeof(struct xrp_buffer_group_record) *
+				((group->capacity + 2) * 2));
+
+		if (r == NULL) {
+			xrp_mutex_unlock(&group->mutex);
+			set_status(status, XRP_STATUS_FAILURE);
+			return -1;
+		}
+		group->buffer = r;
+		group->capacity = (group->capacity + 2) * 2;
+	}
+
+	xrp_retain_buffer(buffer);
+	group->buffer[group->n_buffers].buffer = buffer;
+	group->buffer[group->n_buffers].access_flags = access_flags;
+	n_buffers = group->n_buffers++;
+	xrp_mutex_unlock(&group->mutex);
+	set_status(status, XRP_STATUS_SUCCESS);
+	return n_buffers;
+}
+
+void xrp_set_buffer_in_group(struct xrp_buffer_group *group,
+			     size_t index,
+			     struct xrp_buffer *buffer,
+			     enum xrp_access_flags access_flags,
+			     enum xrp_status *status)
+{
+	struct xrp_buffer *old_buffer;
+
+	xrp_retain_buffer(buffer);
+
+	xrp_mutex_lock(&group->mutex);
+	if (index < group->n_buffers) {
+		old_buffer = group->buffer[index].buffer;
+		group->buffer[index].buffer = buffer;
+		group->buffer[index].access_flags = access_flags;
+		set_status(status, XRP_STATUS_SUCCESS);
+	} else {
+		old_buffer = buffer;
+		set_status(status, XRP_STATUS_FAILURE);
+	}
+	xrp_mutex_unlock(&group->mutex);
+	xrp_release_buffer(old_buffer);
+}
+
+struct xrp_buffer *xrp_get_buffer_from_group(struct xrp_buffer_group *group,
+					     size_t idx,
+					     enum xrp_status *status)
+{
+	struct xrp_buffer *buffer = NULL;
+
+	xrp_mutex_lock(&group->mutex);
+	if (idx < group->n_buffers) {
+		buffer = group->buffer[idx].buffer;
+		// xrp_retain_buffer(buffer);   temp fix  for buffer ref;
+		set_status(status, XRP_STATUS_SUCCESS);
+	} else {
+		set_status(status, XRP_STATUS_FAILURE);
+	}
+	xrp_mutex_unlock(&group->mutex);
+	return buffer;
+}
+
+void xrp_buffer_group_get_info(struct xrp_buffer_group *group,
+			       enum xrp_buffer_group_info info, size_t idx,
+			       void *out, size_t out_sz,
+			       enum xrp_status *status)
+{
+	enum xrp_status s = XRP_STATUS_FAILURE;
+	size_t sz;
+	void *ptr;
+
+	xrp_mutex_lock(&group->mutex);
+	switch (info) {
+	case XRP_BUFFER_GROUP_BUFFER_FLAGS_ENUM:
+		if (idx >= group->n_buffers)
+			goto out;
+		sz = sizeof(group->buffer[idx].access_flags);
+		ptr = &group->buffer[idx].access_flags;
+		break;
+
+	case XRP_BUFFER_GROUP_SIZE_SIZE_T:
+		sz = sizeof(group->n_buffers);
+		ptr = &group->n_buffers;
+		break;
+
+	default:
+		goto out;
+	}
+
+	if (sz == out_sz) {
+		memcpy(out, ptr, sz);
+		s = XRP_STATUS_SUCCESS;
+	}
+out:
+	xrp_mutex_unlock(&group->mutex);
+	set_status(status, s);
+}
+
+
+/* Queue API. */
+
+struct xrp_queue *xrp_create_queue(struct xrp_device *device,
+				   enum xrp_status *status)
+{
+	return xrp_create_ns_queue(device, NULL, status);
+}
+
+struct xrp_queue *xrp_create_ns_queue(struct xrp_device *device,
+				      const void *nsid,
+				      enum xrp_status *status)
+{
+	return xrp_create_nsp_queue(device, nsid, 0, status);
+}
+
+struct xrp_queue *xrp_create_nsp_queue(struct xrp_device *device,
+				       const void *nsid,
+				       int priority,
+				       enum xrp_status *status)
+{
+	struct xrp_queue *queue;
+
+	xrp_retain_device(device);
+	queue = alloc_refcounted(sizeof(*queue));
+
+	if (!queue) {
+		xrp_release_device(device);
+		set_status(status, XRP_STATUS_FAILURE);
+		return NULL;
+	}
+
+	queue->device = device;
+	if (nsid) {
+		queue->use_nsid = 1;
+		memcpy(queue->nsid, nsid, XRP_NAMESPACE_ID_SIZE);
+	}
+	queue->priority = priority;
+
+	xrp_impl_create_queue(queue, status);
+
+	return queue;
+}
+
+void xrp_retain_queue(struct xrp_queue *queue)
+{
+	retain_refcounted(queue);
+}
+
+void xrp_release_queue(struct xrp_queue *queue)
+{
+	DSP_PRINT(DEBUG," ref %d\n",queue->ref.count);
+    if (last_release_refcounted(queue)) {
+		xrp_impl_release_queue(queue);
+		xrp_release_device(queue->device);
+		free(queue);
+	}
+}
+
+
+/* Event API. */
+
+void xrp_retain_event(struct xrp_event *event)
+{
+	retain_refcounted(event);
+}
+
+void xrp_release_event(struct xrp_event *event)
+{
+	DSP_PRINT(TRACE,"event %p ref:%d\n",event,event->ref.count);
+    if (last_release_refcounted(event)) {
+		xrp_impl_release_event(event);
+		xrp_release_queue(event->queue);
+		free(event);
+	}
+}
+
+void xrp_event_status(struct xrp_event *event, enum xrp_status *status)
+{
+	set_status(status, event->status);
+}
+
+/* Communication API */
+
+void xrp_run_command_sync(struct xrp_queue *queue,
+			  const void *in_data, size_t in_data_size,
+			  void *out_data, size_t out_data_size,
+			  struct xrp_buffer_group *buffer_group,
+			  enum xrp_status *status)
+{
+	struct xrp_event *evt;
+	enum xrp_status s;
+
+	xrp_enqueue_command(queue, in_data, in_data_size,
+			    out_data, out_data_size,
+			    buffer_group, &evt, &s);
+	if (s != XRP_STATUS_SUCCESS) {
+		set_status(status, s);
+		return;
+	}
+	xrp_wait(evt, NULL);
+	xrp_event_status(evt, status);
+	xrp_release_event(evt);
+}
+
+/*reproter 机制的buffer 需要从用户态去allocated 通知DSP ,并且需要pingpong*/
+struct xrp_report *xrp_create_reporter(struct xrp_device *device,size_t size)
+{
+	struct xrp_report *report;
+ 	enum xrp_status status;
+
+	report = alloc_refcounted(sizeof(*report));
+
+	if (!report) {
+		// set_status(status, XRP_STATUS_FAILURE);
+		return NULL;
+	}
+
+	xrp_impl_create_report(device,report,size,&status);
+	if(XRP_STATUS_FAILURE ==status)
+	{
+		free(report);
+		return NULL;
+	}
+	return report;
+
+}
+
+
+int xrp_release_reporter(struct xrp_device *device,struct xrp_report *report)
+{
+
+ 	enum xrp_status status;
+	if (!report) {
+		// set_status(status, XRP_STATUS_FAILURE);
+		return 0;
+	}
+	if(last_release_refcounted(report))
+	{
+		xrp_impl_release_report(device,report,&status);
+		
+	}
+	if(XRP_STATUS_FAILURE ==status)
+	{
+		DSP_PRINT(WARNING,"release report fail\n");
+		return -1;
+	}
+	free(report);
+	return 0;
+}
+// struct xrp_report *xrp_add_report_itme(struct xrp_report *report,size_t size,enum xrp_status *status)
+// {
+// 	void xrp_impl_add_report_item(struct xrp_report *report,
+// 								int (*cb)(void*context,void*data),
+// 								void* context,
+// 								size_t data_size,
+// 								enum xrp_status *status)
+
+// }
+

+ 138 - 0
driver/xrp-user/xrp-host/xrp_host_common.h

@@ -0,0 +1,138 @@
+/*
+ * Copyright (c) 2016 - 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _XRP_HOST_COMMON_H
+#define _XRP_HOST_COMMON_H
+
+#include <stdlib.h>
+#include <stdint.h>
+#include "xrp_atomic.h"
+#include "xrp_thread_impl.h"
+#include "xrp_host_impl.h"
+#include "xrp_report.h"
+
+struct xrp_refcounted {
+	_Atomic unsigned long count;
+};
+
+struct xrp_device {
+	struct xrp_refcounted ref;
+	struct xrp_device_impl impl;
+};
+
+struct xrp_buffer {
+	struct xrp_refcounted ref;
+	struct xrp_device *device;
+	enum {
+		XRP_BUFFER_TYPE_HOST,
+		XRP_BUFFER_TYPE_DEVICE,
+	} type;
+	void *ptr;
+    uint64_t phy_addr;
+	size_t size;
+	_Atomic unsigned long map_count;
+	enum xrp_access_flags map_flags;
+	struct xrp_buffer_impl impl;
+};
+
+struct xrp_buffer_group_record {
+	struct xrp_buffer *buffer;
+	enum xrp_access_flags access_flags;
+};
+
+struct xrp_buffer_group {
+	struct xrp_refcounted ref;
+	xrp_mutex mutex;
+	size_t n_buffers;
+	size_t capacity;
+	struct xrp_buffer_group_record *buffer;
+};
+
+struct xrp_queue {
+	struct xrp_refcounted ref;
+	struct xrp_device *device;
+	int use_nsid;
+	int priority;
+	char nsid[XRP_NAMESPACE_ID_SIZE];
+	struct xrp_queue_impl impl;
+};
+
+struct xrp_event_link {
+	struct xrp_event *group;
+	struct xrp_event_link *next, *prev;
+};
+
+struct xrp_event {
+	struct xrp_refcounted ref;
+	struct xrp_queue *queue;
+	_Atomic enum xrp_status status;
+	struct xrp_event_impl impl;
+	struct xrp_event *group;
+	struct xrp_event_link *link;
+};
+
+struct xrp_report{
+
+	struct xrp_refcounted ref;
+	struct xrp_device *device;
+	struct xrp_report_list list;
+	
+	void *report_buf;
+
+	int  buf_size;
+
+};
+
+/* Helpers */
+
+static inline void set_status(enum xrp_status *status, enum xrp_status v)
+{
+	if (status)
+		*status = v;
+}
+
+static inline void *alloc_refcounted(size_t sz)
+{
+	void *buf = calloc(1, sz);
+	struct xrp_refcounted *ref = buf;
+
+	if (ref)
+		ref->count = 1;
+
+	return buf;
+}
+
+static inline void retain_refcounted(void *buf)
+{
+	struct xrp_refcounted *ref = buf;
+	(void)++ref->count;
+}
+
+static inline int last_release_refcounted(void *buf)
+{
+	struct xrp_refcounted *ref = buf;
+	return --ref->count == 0;
+}
+
+
+#endif

+ 139 - 0
driver/xrp-user/xrp-host/xrp_report.c

@@ -0,0 +1,139 @@
+/*
+
+ */
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <fcntl.h>
+#include <signal.h>
+#include "xrp_debug.h"
+#include "xrp_report.h"
+#include "xrp_thread_impl.h"
+#include "dsp_common.h"
+
+
+
+// void xrp_reporter_init(struct xrp_report_list *list)
+// {
+
+//    	g_list=list;
+// 	g_list->queue.head=NULL;
+// }
+struct xrp_report_item* xrp_get_report_entry(struct xrp_report_list *list,int id)
+{
+	struct xrp_report_entry *cur_entry=list->queue.head;
+	for(;cur_entry!=NULL;cur_entry=cur_entry->next)
+	{
+		if(((struct xrp_report_item *)cur_entry)->report_id == id)
+		{
+			
+			return (struct xrp_report_item*)cur_entry;
+		}
+	}
+	return NULL;
+}
+
+void xrp_process_report(struct xrp_report_list *list,void* data,unsigned int id)
+{
+	struct xrp_report_item* report_item= xrp_get_report_entry(list,id);
+	if(!report_item)
+	{
+		DSP_PRINT(WARNING,"No valid report item by id (%d)\n",id);
+		return;
+	}
+	if(!report_item->fn ||
+		(report_item->size&&!report_item->buf)){
+		return;
+	}
+	memcpy(report_item->buf,data,report_item->size);
+    int *ptr=report_item->buf;
+  
+	report_item->fn(report_item->context,report_item->buf);
+}
+
+int xrp_add_report(struct xrp_report_list *list,
+					struct xrp_report_item *item)
+{
+	// xrp_cond_lock(&queue->request_queue_cond);
+	struct xrp_report_entry *entry_head=list->queue.head;
+    struct xrp_report_entry *entry_cur=NULL;
+	struct xrp_report_item *new_item;
+
+	new_item = malloc(sizeof(struct xrp_report_item));
+	if(!new_item)
+	{	
+		return -1;
+	}
+	memcpy(new_item,item,sizeof(struct xrp_report_item));
+	new_item->entry.next=NULL;
+	if(NULL==entry_head)
+	{
+		list->queue.head= &new_item->entry;
+		return 0;
+	}
+	for(;entry_head!=NULL;entry_head=entry_head->next)
+	{	
+        entry_cur = entry_head;
+		if(((struct xrp_report_item *)entry_head)->report_id == new_item->report_id)
+		{
+			DSP_PRINT(WARNING,"the report is already exist\n");
+			return -1;
+		}
+
+	}
+	entry_cur->next=&new_item->entry;
+    DSP_PRINT(INFO,"add new report item %d\n",new_item->report_id);
+	return 0;
+	// xrp_cond_unlock(&queue->request_queue_cond);
+}
+
+int xrp_remove_report(struct xrp_report_list *list,int id)
+{
+	struct xrp_report_entry *pre_entry=NULL;
+	struct xrp_report_entry *cur_entry=list->queue.head;
+	for(;cur_entry!=NULL;pre_entry=cur_entry,cur_entry=cur_entry->next)
+	{
+		if(((struct xrp_report_item *)cur_entry)->report_id == id)
+		{
+			if(pre_entry==NULL)
+			{
+				list->queue.head = cur_entry->next;
+
+			}
+			else{
+				pre_entry->next=cur_entry->next;
+			}			
+			free(cur_entry);
+			return 0;
+		}
+	}
+	return -1;
+}
+
+
+int xrp_alloc_report_id(struct xrp_report_list *list)
+{
+	int new_id;
+	int retry=0;
+	while(1)
+	{
+		new_id= rand()&0x7fffffff;
+		struct xrp_report_entry *cur_entry=list->queue.head;
+		for(;cur_entry!=NULL;cur_entry=cur_entry->next)
+		{
+			if(((struct xrp_report_item *)cur_entry)->report_id == new_id)
+			{			
+				retry++;
+				if(retry>10)
+				{
+					DSP_PRINT(WARNING,"alloc report id fail");
+					return -1;
+				}
+				break;
+			}
+		}
+		return new_id;
+		
+	}
+
+}

+ 61 - 0
driver/xrp-user/xrp-host/xrp_report.h

@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _XRP_REPORT_H
+#define _XRP_REPORT_H
+
+
+struct xrp_report_entry {
+	struct xrp_report_entry * next;
+};
+struct xrp_report_item {
+
+	struct xrp_report_entry entry;
+	int report_id;
+	
+	void *buf;
+
+	int  size;
+
+	void (*fn)( void *context,void * data);
+	void * context;
+
+};
+
+struct xrp_report_list{
+
+	struct {
+		struct xrp_report_entry *head;
+	} queue;
+
+};
+
+
+
+extern void xrp_process_report(struct xrp_report_list *list,void* data,unsigned int id);
+extern int xrp_add_report(struct xrp_report_list *list,
+					struct xrp_report_item *item);
+extern int xrp_remove_report(struct xrp_report_list *list,int id);
+extern int xrp_alloc_report_id(struct xrp_report_list *list);
+extern struct xrp_report_item* xrp_get_report_entry(struct xrp_report_list *list,int id);
+#endif

+ 84 - 0
driver/xrp-user/xrp-host/xrp_sync_queue.c

@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2016 - 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include "xrp_host_common.h"
+#include "xrp_sync_queue.h"
+
+void xrp_queue_init(struct xrp_request_queue *queue, int priority,
+		    void *context,
+		    void (*fn)(struct xrp_queue_item *rq, void *context))
+{
+	(void)priority;
+	queue->context = context;
+	queue->fn = fn;
+}
+
+void xrp_queue_destroy(struct xrp_request_queue *queue)
+{
+	(void)queue;
+}
+
+void xrp_queue_push(struct xrp_request_queue *queue,
+		    struct xrp_queue_item *rq)
+{
+	queue->fn(rq, queue->context);
+}
+
+struct xrp_event *xrp_event_create(void)
+{
+	struct xrp_event *event = alloc_refcounted(sizeof(*event));
+
+	if (!event)
+		return NULL;
+	event->status = XRP_STATUS_PENDING;
+	return event;
+}
+
+void xrp_wait(struct xrp_event *event, enum xrp_status *status)
+{
+	if (event->status == XRP_STATUS_PENDING)
+		set_status(status, XRP_STATUS_FAILURE);
+	else
+		set_status(status, XRP_STATUS_SUCCESS);
+}
+
+size_t xrp_wait_any(struct xrp_event **event, size_t n_events,
+		    enum xrp_status *status)
+{
+	if (n_events && event[0]->status != XRP_STATUS_PENDING)
+		set_status(status, XRP_STATUS_SUCCESS);
+	else
+		set_status(status, XRP_STATUS_FAILURE);
+	return 0;
+}
+
+void xrp_impl_broadcast_event(struct xrp_event *event, enum xrp_status status)
+{
+	event->status = status;
+}
+
+void xrp_impl_release_event(struct xrp_event *event)
+{
+	(void)event;
+}

+ 52 - 0
driver/xrp-user/xrp-host/xrp_sync_queue.h

@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _XRP_SYNC_QUEUE_IMPL_H
+#define _XRP_SYNC_QUEUE_IMPL_H
+
+#include "xrp_thread_impl.h"
+
+struct xrp_queue_item {
+};
+
+struct xrp_request_queue {
+	void *context;
+	void (*fn)(struct xrp_queue_item *rq, void *context);
+};
+
+struct xrp_event_impl {
+	xrp_cond cond;
+};
+
+void xrp_queue_init(struct xrp_request_queue *queue, int priority,
+		    void *context,
+		    void (*fn)(struct xrp_queue_item *rq, void *context));
+void xrp_queue_destroy(struct xrp_request_queue *queue);
+void xrp_queue_push(struct xrp_request_queue *queue,
+		    struct xrp_queue_item *rq);
+
+struct xrp_event *xrp_event_create(void);
+void xrp_impl_broadcast_event(struct xrp_event *event, enum xrp_status status);
+void xrp_impl_release_event(struct xrp_event *event);
+
+#endif

+ 242 - 0
driver/xrp-user/xrp-host/xrp_threaded_queue.c

@@ -0,0 +1,242 @@
+/*
+ * Copyright (c) 2016 - 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include "xrp_debug.h"
+#include "xrp_host_common.h"
+#include "xrp_threaded_queue.h"
+#include "dsp_common.h"
+static struct xrp_queue_item *_xrp_dequeue_request(struct xrp_request_queue *queue)
+{
+	struct xrp_queue_item *rq = queue->request_queue.head;
+
+	if (!rq)
+		return NULL;
+
+	if (rq == queue->request_queue.tail)
+		queue->request_queue.tail = NULL;
+	queue->request_queue.head = rq->next;
+	return rq;
+}
+
+static int xrp_queue_process(struct xrp_request_queue *queue)
+{
+	struct xrp_queue_item *rq;
+	int exit = 0;
+
+	queue->sync_exit = &exit;
+	xrp_cond_lock(&queue->request_queue_cond);
+	for (;;) {
+		rq = _xrp_dequeue_request(queue);
+		if (rq || queue->exit)
+			break;
+		xrp_cond_wait(&queue->request_queue_cond);
+	}
+	xrp_cond_unlock(&queue->request_queue_cond);
+
+	if (!rq)
+		return 0;
+        
+    // printf("%s,queue:%p get item\n",__FUNCTION__,queue);
+	queue->fn(rq, queue->context);
+    // printf("%s,queue:%p done item\n",__FUNCTION__,queue);
+	return !exit;
+}
+
+static void *xrp_queue_thread(void *p)
+{
+	struct xrp_request_queue *queue = p;
+    DSP_PRINT(DEBUG,"queue:%p runing....\n",queue);
+	while (xrp_queue_process(queue)) {
+	}
+    DSP_PRINT(DEBUG,"queue:%p exit\n",queue);
+	return NULL;
+}
+
+void xrp_queue_init(struct xrp_request_queue *queue, int priority,
+		    void *context,
+		    void (*fn)(struct xrp_queue_item *rq, void *context))
+{
+	xrp_cond_init(&queue->request_queue_cond);
+	queue->context = context;
+	queue->fn = fn;
+	xrp_thread_create(&queue->thread, priority, xrp_queue_thread, queue);
+}
+
+void xrp_queue_destroy(struct xrp_request_queue *queue)
+{
+    xrp_cond_lock(&queue->request_queue_cond);
+	queue->exit = 1;
+	xrp_cond_broadcast(&queue->request_queue_cond);
+	xrp_cond_unlock(&queue->request_queue_cond);
+	if (!xrp_thread_join(&queue->thread)) {
+		*queue->sync_exit = 1;
+		xrp_thread_detach(&queue->thread);
+        DSP_PRINT(DEBUG,"queue thread release\n");
+	}
+	xrp_cond_lock(&queue->request_queue_cond);
+	if (queue->request_queue.head != NULL)
+		DSP_PRINT(DEBUG,"releasing non-empty queue\n");
+	xrp_cond_unlock(&queue->request_queue_cond);
+	xrp_cond_destroy(&queue->request_queue_cond);
+}
+
+void xrp_queue_push(struct xrp_request_queue *queue,
+		    struct xrp_queue_item *rq)
+{
+	xrp_cond_lock(&queue->request_queue_cond);
+	rq->next = NULL;
+	if (queue->request_queue.tail) {
+		queue->request_queue.tail->next = rq;
+
+	} else {
+		queue->request_queue.head = rq;
+		xrp_cond_broadcast(&queue->request_queue_cond);
+
+	}
+	queue->request_queue.tail = rq;
+	xrp_cond_unlock(&queue->request_queue_cond);
+}
+
+static void xrp_impl_event_init(struct xrp_event *event)
+{
+	xrp_cond_init(&event->impl.cond);
+	event->status = XRP_STATUS_PENDING;
+}
+
+struct xrp_event *xrp_event_create(void)
+{
+	struct xrp_event *event = alloc_refcounted(sizeof(*event));
+
+	if (!event)
+		return NULL;
+	xrp_impl_event_init(event);
+	return event;
+}
+
+void xrp_wait(struct xrp_event *event, enum xrp_status *status)
+{
+
+	xrp_cond_lock(&event->impl.cond);
+	while (event->status == XRP_STATUS_PENDING)
+		xrp_cond_wait(&event->impl.cond);
+	xrp_cond_unlock(&event->impl.cond);
+	set_status(status, XRP_STATUS_SUCCESS);
+    // printf("%s,get event %p\n",__FUNCTION__,event);
+}
+
+size_t xrp_wait_any(struct xrp_event **event, size_t n_events,
+		    enum xrp_status *status)
+{
+	size_t i, rv;
+	struct xrp_event group;
+	struct xrp_event_link *link;
+
+	if (!n_events) {
+		set_status(status, XRP_STATUS_FAILURE);
+		return 0;
+	}
+
+	link = calloc(n_events, sizeof(struct xrp_event_link));
+
+	xrp_impl_event_init(&group);
+
+	for (i = 0; i < n_events; ++i) {
+		xrp_cond_lock(&event[i]->impl.cond);
+		if (event[i]->status == XRP_STATUS_PENDING) {
+			link[i].group = event[i]->group;
+			link[i].next = event[i]->link;
+
+			if (event[i]->link)
+				event[i]->link->prev = link + i;
+
+			event[i]->group = &group;
+			event[i]->link = link + i;
+		} else {
+			xrp_cond_unlock(&event[i]->impl.cond);
+			break;
+		}
+		xrp_cond_unlock(&event[i]->impl.cond);
+	}
+
+	rv = i;
+
+	if (i == n_events)
+		xrp_wait(&group, NULL);
+	else
+		n_events = i;
+
+	for (i = 0; i < n_events; ++i) {
+		xrp_cond_lock(&event[i]->impl.cond);
+		if (event[i]->group == &group) {
+			event[i]->group = link[i].group;
+			event[i]->link = link[i].next;
+		}
+		if (link[i].next) {
+			link[i].next->prev = link[i].prev;
+		}
+		if (link[i].prev) {
+			if (link[i].prev->group == &group) {
+				link[i].prev->group = link[i].group;
+				link[i].prev->next = link[i].next;
+			} else {
+				pr_debug("%s: inconsistent link state\n");
+			}
+		}
+		if (event[i]->status != XRP_STATUS_PENDING)
+			rv = i;
+		xrp_cond_unlock(&event[i]->impl.cond);
+	}
+	xrp_impl_release_event(&group);
+	free(link);
+	set_status(status, XRP_STATUS_SUCCESS);
+	return rv;
+}
+
+void xrp_impl_broadcast_event(struct xrp_event *event, enum xrp_status status)
+{
+	struct xrp_event *group;
+	struct xrp_event_link *link;
+    // printf("%s, event %p! entry\n",__func__,event);
+	xrp_cond_lock(&event->impl.cond);
+	event->status = status;
+	xrp_cond_broadcast(&event->impl.cond);
+
+	group = event->group;
+	link = event->link;
+	while (link) {
+		xrp_cond_lock(&group->impl.cond);
+		group->status = status;
+		xrp_cond_broadcast(&group->impl.cond);
+		xrp_cond_unlock(&group->impl.cond);
+		group = link->group;
+		link = link->next;
+	}
+	xrp_cond_unlock(&event->impl.cond);
+    // printf("%s, event %p! exit\n",__func__,event);
+}
+
+void xrp_impl_release_event(struct xrp_event *event)
+{
+	xrp_cond_destroy(&event->impl.cond);
+}

+ 62 - 0
driver/xrp-user/xrp-host/xrp_threaded_queue.h

@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2016 - 2018 Cadence Design Systems Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _XRP_THREADED_QUEUE_IMPL_H
+#define _XRP_THREADED_QUEUE_IMPL_H
+
+#include "xrp_thread_impl.h"
+
+struct xrp_queue_item {
+	struct xrp_queue_item *next;
+};
+
+struct xrp_request_queue {
+	xrp_thread thread;
+	xrp_cond request_queue_cond;
+	struct {
+		struct xrp_queue_item *head;
+		struct xrp_queue_item *tail;
+	} request_queue;
+	int exit;
+	int *sync_exit;
+
+	void *context;
+	void (*fn)(struct xrp_queue_item *rq, void *context);
+};
+
+struct xrp_event_impl {
+	xrp_cond cond;
+};
+
+void xrp_queue_init(struct xrp_request_queue *queue, int priority,
+		    void *context,
+		    void (*fn)(struct xrp_queue_item *rq, void *context));
+void xrp_queue_destroy(struct xrp_request_queue *queue);
+void xrp_queue_push(struct xrp_request_queue *queue,
+		    struct xrp_queue_item *rq);
+
+struct xrp_event *xrp_event_create(void);
+void xrp_impl_broadcast_event(struct xrp_event *event, enum xrp_status status);
+void xrp_impl_release_event(struct xrp_event *event);
+
+#endif

BIN
firmware/dsp1_dummy_algo_flo.lib


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