vc8000_driver.h 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331
  1. /****************************************************************************
  2. *
  3. * The MIT License (MIT)
  4. *
  5. * Copyright (c) 2014 - 2021 VERISILICON
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a
  8. * copy of this software and associated documentation files (the "Software"),
  9. * to deal in the Software without restriction, including without limitation
  10. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11. * and/or sell copies of the Software, and to permit persons to whom the
  12. * Software is furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in
  15. * all copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  20. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. *****************************************************************************
  26. *
  27. * The GPL License (GPL)
  28. *
  29. * Copyright (C) 2014 - 2021 VERISILICON
  30. *
  31. * This program is free software; you can redistribute it and/or
  32. * modify it under the terms of the GNU General Public License
  33. * as published by the Free Software Foundation; either version 2
  34. * of the License, or (at your option) any later version.
  35. *
  36. * This program is distributed in the hope that it will be useful,
  37. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  38. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  39. * GNU General Public License for more details.
  40. *
  41. * You should have received a copy of the GNU General Public License
  42. * along with this program; if not, write to the Free Software Foundation,
  43. * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  44. *
  45. *****************************************************************************
  46. *
  47. * Note: This software is released under dual MIT and GPL licenses. A
  48. * recipient may use this file under the terms of either the MIT license or
  49. * GPL License. If you wish to use only one license not the other, you can
  50. * indicate your decision by deleting one of the above license notices in your
  51. * version of this file.
  52. *
  53. *****************************************************************************/
  54. #ifndef _VC8000_VCMD_DRIVER_H_
  55. #define _VC8000_VCMD_DRIVER_H_
  56. #ifdef __cplusplus
  57. extern "C" {
  58. #endif
  59. #ifdef __FREERTOS__
  60. /* needed for the _IOW etc stuff used later */
  61. #include "base_type.h"
  62. #include "osal.h"
  63. #include "dev_common_freertos.h"
  64. #elif defined(__linux__)
  65. #include <linux/ioctl.h> /* needed for the _IOW etc stuff used later */
  66. #else //For other os
  67. //TODO...
  68. #endif
  69. #ifdef HANTROMMU_SUPPORT
  70. #include "hantrommu.h"
  71. #endif
  72. #ifdef HANTROAXIFE_SUPPORT
  73. #include "vc8000_axife.h"
  74. #endif
  75. #ifdef __FREERTOS__
  76. //ptr_t has been defined in base_type.h //Now the FreeRTOS mem need to support 64bit env
  77. #elif defined(__linux__)
  78. #undef ptr_t
  79. #define ptr_t PTR_T_KERNEL
  80. typedef size_t ptr_t;
  81. #endif
  82. /*
  83. * Macros to help debugging
  84. */
  85. #undef PDEBUG /* undef it, just in case */
  86. #ifdef HANTRO_DRIVER_DEBUG
  87. # ifdef __KERNEL__
  88. /* This one if debugging is on, and kernel space */
  89. # define PDEBUG(fmt, args...) printk( KERN_INFO "vc8000: " fmt, ## args)
  90. # else
  91. /* This one for user space */
  92. # define PDEBUG(fmt, args...) printf(__FILE__ ":%d: " fmt, __LINE__ , ## args)
  93. # endif
  94. #else
  95. # define PDEBUG(fmt, args...) /* not debugging: nothing */
  96. #endif
  97. #define ENC_HW_ID1 0x48320100
  98. #define ENC_HW_ID2 0x80006000
  99. #define CORE_INFO_MODE_OFFSET 31
  100. #define CORE_INFO_AMOUNT_OFFSET 28
  101. /* Use 'k' as magic number */
  102. #define HANTRO_IOC_MAGIC 'k'
  103. /*
  104. * S means "Set" through a ptr,
  105. * T means "Tell" directly with the argument value
  106. * G means "Get": reply by setting through a pointer
  107. * Q means "Query": response is on the return value
  108. * X means "eXchange": G and S atomically
  109. * H means "sHift": T and Q atomically
  110. */
  111. #define HANTRO_IOCG_HWOFFSET _IOR(HANTRO_IOC_MAGIC, 3, unsigned long *)
  112. #define HANTRO_IOCG_HWIOSIZE _IOR(HANTRO_IOC_MAGIC, 4, unsigned int *)
  113. #define HANTRO_IOC_CLI _IO(HANTRO_IOC_MAGIC, 5)
  114. #define HANTRO_IOC_STI _IO(HANTRO_IOC_MAGIC, 6)
  115. #define HANTRO_IOCX_VIRT2BUS _IOWR(HANTRO_IOC_MAGIC, 7, unsigned long *)
  116. #define HANTRO_IOCH_ARDRESET _IO(HANTRO_IOC_MAGIC, 8) /* debugging tool */
  117. #define HANTRO_IOCG_SRAMOFFSET _IOR(HANTRO_IOC_MAGIC, 9, unsigned long *)
  118. #define HANTRO_IOCG_SRAMEIOSIZE _IOR(HANTRO_IOC_MAGIC, 10, unsigned int *)
  119. #define HANTRO_IOCH_ENC_RESERVE _IOR(HANTRO_IOC_MAGIC, 11,unsigned int *)
  120. #define HANTRO_IOCH_ENC_RELEASE _IOR(HANTRO_IOC_MAGIC, 12,unsigned int *)
  121. #define HANTRO_IOCG_CORE_NUM _IOR(HANTRO_IOC_MAGIC, 13,unsigned int *)
  122. #define HANTRO_IOCG_CORE_INFO _IOR(HANTRO_IOC_MAGIC, 14,SUBSYS_CORE_INFO *)
  123. #define HANTRO_IOCG_CORE_WAIT _IOR(HANTRO_IOC_MAGIC, 15, unsigned int *)
  124. #define HANTRO_IOCG_ANYCORE_WAIT _IOR(HANTRO_IOC_MAGIC, 16, CORE_WAIT_OUT *)
  125. #define HANTRO_IOCH_GET_CMDBUF_PARAMETER _IOWR(HANTRO_IOC_MAGIC, 25,struct cmdbuf_mem_parameter *)
  126. #define HANTRO_IOCH_GET_CMDBUF_POOL_SIZE _IOWR(HANTRO_IOC_MAGIC, 26,unsigned long)
  127. #define HANTRO_IOCH_SET_CMDBUF_POOL_BASE _IOWR(HANTRO_IOC_MAGIC, 27,unsigned long)
  128. #define HANTRO_IOCH_GET_VCMD_PARAMETER _IOWR(HANTRO_IOC_MAGIC, 28, struct config_parameter *)
  129. #define HANTRO_IOCH_RESERVE_CMDBUF _IOWR(HANTRO_IOC_MAGIC, 29,struct exchange_parameter *)
  130. #define HANTRO_IOCH_LINK_RUN_CMDBUF _IOR(HANTRO_IOC_MAGIC, 30,u16 *)
  131. #define HANTRO_IOCH_WAIT_CMDBUF _IOR(HANTRO_IOC_MAGIC, 31,u16 *)
  132. #define HANTRO_IOCH_RELEASE_CMDBUF _IOR(HANTRO_IOC_MAGIC, 32,u16 *)
  133. #define HANTRO_IOCH_POLLING_CMDBUF _IOR(HANTRO_IOC_MAGIC, 33,u16 *)
  134. #define HANTRO_IOCH_GET_VCMD_ENABLE _IOWR(HANTRO_IOC_MAGIC, 50,unsigned long)
  135. #define GET_ENCODER_IDX(type_info) (CORE_VC8000E);
  136. #define CORETYPE(core) (1 << core)
  137. #define HANTRO_IOC_MAXNR 60
  138. /*priority support*/
  139. #define MAX_CMDBUF_PRIORITY_TYPE 2 //0:normal priority,1:high priority
  140. #define CMDBUF_PRIORITY_NORMAL 0
  141. #define CMDBUF_PRIORITY_HIGH 1
  142. #define OPCODE_WREG (0x01<<27)
  143. #define OPCODE_END (0x02<<27)
  144. #define OPCODE_NOP (0x03<<27)
  145. #define OPCODE_RREG (0x16<<27)
  146. #define OPCODE_INT (0x18<<27)
  147. #define OPCODE_JMP (0x19<<27)
  148. #define OPCODE_STALL (0x09<<27)
  149. #define OPCODE_CLRINT (0x1a<<27)
  150. #define OPCODE_JMP_RDY0 (0x19<<27)
  151. #define OPCODE_JMP_RDY1 ((0x19<<27)|(1<<26))
  152. #define JMP_IE_1 (1<<25)
  153. #define JMP_RDY_1 (1<<26)
  154. #define CLRINT_OPTYPE_READ_WRITE_1_CLEAR 0
  155. #define CLRINT_OPTYPE_READ_WRITE_0_CLEAR 1
  156. #define CLRINT_OPTYPE_READ_CLEAR 2
  157. #define VC8000E_FRAME_RDY_INT_MASK 0x0001
  158. #define VC8000E_CUTREE_RDY_INT_MASK 0x0002
  159. #define VC8000E_DEC400_INT_MASK 0x0004
  160. #define VC8000E_L2CACHE_INT_MASK 0x0008
  161. #define VC8000E_MMU_INT_MASK 0x0010
  162. #define CUTREE_MMU_INT_MASK 0x0020
  163. #define VC8000D_FRAME_RDY_INT_MASK 0x0100
  164. #define VC8000D_DEC400_INT_MASK 0x0400
  165. #define VC8000D_L2CACHE_INT_MASK 0x0800
  166. #define VC8000D_MMU_INT_MASK 0x1000
  167. #define VC8000D_DEC400_INT_MASK_1_1_1 0x0200
  168. #define VC8000D_L2CACHE_INT_MASK_1_1_1 0x0400
  169. #define VC8000D_MMU_INT_MASK_1_1_1 0x0800
  170. #define HW_ID_1_0_C 0x43421001
  171. #define HW_ID_1_1_2 0x43421102
  172. #define ASIC_STATUS_SEGMENT_READY 0x1000
  173. #define ASIC_STATUS_FUSE_ERROR 0x200
  174. #define ASIC_STATUS_SLICE_READY 0x100
  175. #define ASIC_STATUS_LINE_BUFFER_DONE 0x080 /* low latency */
  176. #define ASIC_STATUS_HW_TIMEOUT 0x040
  177. #define ASIC_STATUS_BUFF_FULL 0x020
  178. #define ASIC_STATUS_HW_RESET 0x010
  179. #define ASIC_STATUS_ERROR 0x008
  180. #define ASIC_STATUS_FRAME_READY 0x004
  181. #define ASIC_IRQ_LINE 0x001
  182. #define ASIC_STATUS_ALL (ASIC_STATUS_SEGMENT_READY |\
  183. ASIC_STATUS_FUSE_ERROR |\
  184. ASIC_STATUS_SLICE_READY |\
  185. ASIC_STATUS_LINE_BUFFER_DONE |\
  186. ASIC_STATUS_HW_TIMEOUT |\
  187. ASIC_STATUS_BUFF_FULL |\
  188. ASIC_STATUS_HW_RESET |\
  189. ASIC_STATUS_ERROR |\
  190. ASIC_STATUS_FRAME_READY)
  191. enum
  192. {
  193. CORE_VC8000E = 0,
  194. CORE_VC8000EJ = 1,
  195. CORE_CUTREE = 2,
  196. CORE_DEC400 = 3,
  197. CORE_MMU = 4,
  198. CORE_L2CACHE = 5,
  199. CORE_AXIFE = 6,
  200. CORE_APBFT = 7,
  201. CORE_MMU_1 = 8,
  202. CORE_AXIFE_1 = 9,
  203. CORE_MAX
  204. };
  205. //#define CORE_MAX (CORE_MMU)
  206. /*module_type support*/
  207. enum vcmd_module_type{
  208. VCMD_TYPE_ENCODER = 0,
  209. VCMD_TYPE_CUTREE,
  210. VCMD_TYPE_DECODER,
  211. VCMD_TYPE_JPEG_ENCODER,
  212. VCMD_TYPE_JPEG_DECODER,
  213. MAX_VCMD_TYPE
  214. };
  215. struct cmdbuf_mem_parameter
  216. {
  217. u32 *virt_cmdbuf_addr;
  218. ptr_t phy_cmdbuf_addr; //cmdbuf pool base physical address
  219. u32 mmu_phy_cmdbuf_addr; //cmdbuf pool base mmu mapping address
  220. u32 cmdbuf_total_size; //cmdbuf pool total size in bytes.
  221. u16 cmdbuf_unit_size; //one cmdbuf size in bytes. all cmdbuf have same size.
  222. u32 *virt_status_cmdbuf_addr;
  223. ptr_t phy_status_cmdbuf_addr; //status cmdbuf pool base physical address
  224. u32 mmu_phy_status_cmdbuf_addr; //status cmdbuf pool base mmu mapping address
  225. u32 status_cmdbuf_total_size; //status cmdbuf pool total size in bytes.
  226. u16 status_cmdbuf_unit_size; //one status cmdbuf size in bytes. all status cmdbuf have same size.
  227. ptr_t base_ddr_addr; //for pcie interface, hw can only access phy_cmdbuf_addr-pcie_base_ddr_addr.
  228. //for other interface, this value should be 0?
  229. };
  230. struct config_parameter
  231. {
  232. u16 module_type; //input vc8000e=0,cutree=1,vc8000d=2,jpege=3, jpegd=4
  233. u16 vcmd_core_num; //output, how many vcmd cores are there with corresponding module_type.
  234. u16 submodule_main_addr; //output,if submodule addr == 0xffff, this submodule does not exist.
  235. u16 submodule_dec400_addr; //output ,if submodule addr == 0xffff, this submodule does not exist.
  236. u16 submodule_L2Cache_addr; //output,if submodule addr == 0xffff, this submodule does not exist.
  237. u16 submodule_MMU_addr[2]; //output,if submodule addr == 0xffff, this submodule does not exist.
  238. u16 submodule_axife_addr[2]; //output,if submodule addr == 0xffff, this submodule does not exist.
  239. u16 config_status_cmdbuf_id; // output , this status comdbuf save the all register values read in driver init.//used for analyse configuration in cwl.
  240. u32 vcmd_hw_version_id;
  241. };
  242. /*need to consider how many memory should be allocated for status.*/
  243. struct exchange_parameter
  244. {
  245. u32 executing_time; //input ;executing_time=encoded_image_size*(rdoLevel+1)*(rdoq+1);
  246. u16 module_type; //input input vc8000e=0,IM=1,vc8000d=2,jpege=3, jpegd=4
  247. u16 cmdbuf_size; //input, reserve is not used; link and run is input.
  248. u16 priority; //input,normal=0, high/live=1
  249. u16 cmdbuf_id; //output ,it is unique in driver.
  250. u16 core_id; //just used for polling.
  251. };
  252. typedef struct CoreWaitOut
  253. {
  254. u32 job_id[4];
  255. u32 irq_status[4];
  256. u32 irq_num;
  257. } CORE_WAIT_OUT;
  258. typedef struct
  259. {
  260. u32 subsys_idx;
  261. u32 core_type;
  262. unsigned long offset;
  263. u32 reg_size;
  264. int irq;
  265. }CORE_CONFIG;
  266. typedef struct
  267. {
  268. unsigned long base_addr;
  269. u32 iosize;
  270. u32 resouce_shared; //indicate the core share resources with other cores or not.If 1, means cores can not work at the same time.
  271. }SUBSYS_CONFIG;
  272. typedef struct
  273. {
  274. u32 type_info; //indicate which IP is contained in this subsystem and each uses one bit of this variable
  275. unsigned long offset[CORE_MAX];
  276. unsigned long regSize[CORE_MAX];
  277. int irq[CORE_MAX];
  278. }SUBSYS_CORE_INFO;
  279. typedef struct
  280. {
  281. SUBSYS_CONFIG cfg;
  282. SUBSYS_CORE_INFO core_info;
  283. }SUBSYS_DATA;
  284. #ifdef __cplusplus
  285. }
  286. #endif
  287. #endif /* !_VC8000_VCMD_DRIVER_H_ */