subsys.c 8.2 KB

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  1. /****************************************************************************
  2. *
  3. * The MIT License (MIT)
  4. *
  5. * Copyright (c) 2014 - 2021 VERISILICON
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a
  8. * copy of this software and associated documentation files (the "Software"),
  9. * to deal in the Software without restriction, including without limitation
  10. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11. * and/or sell copies of the Software, and to permit persons to whom the
  12. * Software is furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in
  15. * all copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  20. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. *****************************************************************************
  26. *
  27. * The GPL License (GPL)
  28. *
  29. * Copyright (C) 2014 - 2021 VERISILICON
  30. *
  31. * This program is free software; you can redistribute it and/or
  32. * modify it under the terms of the GNU General Public License
  33. * as published by the Free Software Foundation; either version 2
  34. * of the License, or (at your option) any later version.
  35. *
  36. * This program is distributed in the hope that it will be useful,
  37. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  38. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  39. * GNU General Public License for more details.
  40. *
  41. * You should have received a copy of the GNU General Public License
  42. * along with this program; if not, write to the Free Software Foundation,
  43. * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  44. *
  45. *****************************************************************************
  46. *
  47. * Note: This software is released under dual MIT and GPL licenses. A
  48. * recipient may use this file under the terms of either the MIT license or
  49. * GPL License. If you wish to use only one license not the other, you can
  50. * indicate your decision by deleting one of the above license notices in your
  51. * version of this file.
  52. *
  53. *****************************************************************************/
  54. #include "subsys.h"
  55. /******************************************************************************/
  56. /* subsystem configuration */
  57. /******************************************************************************/
  58. /* List of subsystems */
  59. struct SubsysDesc subsys_array[] = {
  60. /* {slice_index, index, base} */
  61. {0, 0, 0xffecc00000},
  62. // {0, 1, 0x700000}
  63. };
  64. /* List of all HW cores. */
  65. struct CoreDesc core_array[] = {
  66. /* {slice, subsys, core_type, offset, iosize, irq, has_apbfilter} */
  67. #if 0
  68. {0, 0, HW_VC8000DJ, 0x600000, 0, 0},
  69. {0, 0, HW_VC8000D, 0x602000, 0, 0},
  70. {0, 0, HW_L2CACHE, 0x604000, 0, 0},
  71. {0, 0, HW_DEC400, 0x606000, 0, 0},
  72. {0, 0, HW_BIGOCEAN, 0x608000, 0, 0},
  73. {0, 0, HW_NOC,0x60a000, 0, 0},
  74. {0, 0, HW_AXIFE, 0x60c000, 0, 0}
  75. #endif
  76. {0, 0, HW_VCMD, 0x0, 27*4, 12},
  77. {0, 0, HW_VC8000D, 0x1000, 1023*4, -1, 0},
  78. {0, 0, HW_L2CACHE, 0x2000, 231*4, -1, 0},
  79. {0, 0, HW_MMU, 0x3000, 228*4, -1, 0},
  80. //{0, 0, HW_MMU_WR, 0x4000, 228*4, -1, 0},
  81. //{0, 0, HW_AXIFE, 0x5000, 64*4, -1, 1},
  82. {0, 0, HW_DEC400, 0x6000, 1568*4, -1, 0},
  83. //{0, 1, HW_VCMD, 0x0, 27*4, -1, 0},
  84. //{0, 1, HW_VC8000D, 0x1000, 503*4, -1, 1},
  85. //{0, 1, HW_L2CACHE, 0x2000, 231*4, -1, 0},
  86. //{0, 1, HW_MMU, 0x3000, 228*4, -1, 0},
  87. //{0, 1, HW_MMU_WR, 0x4000, 228*4, -1, 0},
  88. //{0, 1, HW_AXIFE, 0x5000, 64*4, -1, 1},
  89. //{0, 1, HW_DEC400, 0x6000, 1568*4, -1, 0},
  90. };
  91. extern struct vcmd_config vcmd_core_array[MAX_SUBSYS_NUM];
  92. extern int total_vcmd_core_num;
  93. extern unsigned long multicorebase[];
  94. extern int irq[];
  95. extern unsigned int iosize[];
  96. extern int reg_count[];
  97. /*
  98. If VCMD is used, convert core_array to vcmd_core_array, which are used in
  99. hantor_vcmd.c.
  100. Otherwise, covnert core_array to multicore_base/irq/iosize, which are used in
  101. hantro_dec.c
  102. VCMD:
  103. - struct vcmd_config vcmd_core_array[MAX_SUBSYS_NUM]
  104. - total_vcmd_core_num
  105. NON-VCMD:
  106. - multicorebase[HXDEC_MAX_CORES]
  107. - irq[HXDEC_MAX_CORES]
  108. - iosize[HXDEC_MAX_CORES]
  109. */
  110. void CheckSubsysCoreArray(struct subsys_config *subsys, int *vcmd) {
  111. int num = sizeof(subsys_array)/sizeof(subsys_array[0]);
  112. int i, j;
  113. memset(subsys, 0, sizeof(subsys[0])*MAX_SUBSYS_NUM);
  114. for (i = 0; i < num; i++) {
  115. subsys[i].base_addr = subsys_array[i].base;
  116. subsys[i].irq = -1;
  117. for (j = 0; j < HW_CORE_MAX; j++) {
  118. subsys[i].submodule_offset[j] = 0xffff;
  119. subsys[i].submodule_iosize[j] = 0;
  120. subsys[i].submodule_hwregs[j] = NULL;
  121. }
  122. }
  123. total_vcmd_core_num = 0;
  124. for (i = 0; i < sizeof(core_array)/sizeof(core_array[0]); i++) {
  125. if (!subsys[core_array[i].subsys].base_addr) {
  126. /* undefined subsystem */
  127. continue;
  128. }
  129. subsys[core_array[i].subsys].submodule_offset[core_array[i].core_type]
  130. = core_array[i].offset;
  131. subsys[core_array[i].subsys].submodule_iosize[core_array[i].core_type]
  132. = core_array[i].iosize;
  133. if (subsys[core_array[i].subsys].irq != -1 && core_array[i].irq != -1) {
  134. if (subsys[core_array[i].subsys].irq != core_array[i].irq) {
  135. printk(KERN_INFO "hantrodec: hw core type %d irq %d != subsystem irq %d\n",
  136. core_array[i].core_type,
  137. core_array[i].irq,
  138. subsys[core_array[i].subsys].irq);
  139. printk(KERN_INFO "hantrodec: hw cores of a subsystem should have same irq\n");
  140. }
  141. } else if (core_array[i].irq != -1) {
  142. subsys[core_array[i].subsys].irq = core_array[i].irq;
  143. }
  144. subsys[core_array[i].subsys].has_apbfilter[core_array[i].core_type] = core_array[i].has_apb;
  145. /* vcmd found */
  146. if (core_array[i].core_type == HW_VCMD) {
  147. *vcmd = 1;
  148. total_vcmd_core_num++;
  149. }
  150. }
  151. printk(KERN_INFO "hantrodec: vcmd = %d\n", *vcmd);
  152. /* To plug into hantro_vcmd.c */
  153. if (*vcmd) {
  154. for (i = 0; i < total_vcmd_core_num; i++) {
  155. vcmd_core_array[i].vcmd_base_addr = subsys[i].base_addr;
  156. vcmd_core_array[i].vcmd_iosize = subsys[i].submodule_iosize[HW_VCMD];
  157. vcmd_core_array[i].vcmd_irq = subsys[i].irq;
  158. vcmd_core_array[i].sub_module_type = 2; /* TODO(min): to be fixed */
  159. vcmd_core_array[i].submodule_main_addr = subsys[i].submodule_offset[HW_VC8000D];
  160. vcmd_core_array[i].submodule_dec400_addr = subsys[i].submodule_offset[HW_DEC400];
  161. vcmd_core_array[i].submodule_L2Cache_addr = subsys[i].submodule_offset[HW_L2CACHE];
  162. vcmd_core_array[i].submodule_MMU_addr = subsys[i].submodule_offset[HW_MMU];
  163. vcmd_core_array[i].submodule_MMUWrite_addr = subsys[i].submodule_offset[HW_MMU_WR];
  164. vcmd_core_array[i].submodule_axife_addr = subsys[i].submodule_offset[HW_AXIFE];
  165. }
  166. }
  167. memset(multicorebase, 0, sizeof(multicorebase[0]) * HXDEC_MAX_CORES);
  168. for (i = 0; i < num; i++) {
  169. multicorebase[i] = subsys[i].base_addr + subsys[i].submodule_offset[HW_VC8000D];
  170. irq[i] = subsys[i].irq;
  171. iosize[i] = subsys[i].submodule_iosize[HW_VC8000D];
  172. printk(KERN_INFO "hantrodec: [%d] multicorebase 0x%08lx, iosize %d\n", i, multicorebase[i], iosize[i]);
  173. }
  174. }
  175. void dump_core_array(void)
  176. {
  177. int i;
  178. for (i = 0; i < sizeof(core_array)/sizeof(core_array[0]); i++) {
  179. printk(KERN_INFO "lucz: dumping dump_core_array[%d]\n", i);
  180. printk(KERN_INFO " slice=%d\n", core_array[i].slice);
  181. printk(KERN_INFO " subsys=%d\n", core_array[i].subsys);
  182. printk(KERN_INFO " core_type=%d\n", core_array[i].core_type);
  183. printk(KERN_INFO " offset=%d\n", core_array[i].offset);
  184. printk(KERN_INFO " iosize=%d\n", core_array[i].iosize);
  185. printk(KERN_INFO " irq=%d\n", core_array[i].irq);
  186. printk(KERN_INFO " has_apb=%d\n", core_array[i].has_apb);
  187. }
  188. }