subsys_freertos.c 7.2 KB

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  1. /****************************************************************************
  2. *
  3. * The MIT License (MIT)
  4. *
  5. * Copyright (c) 2014 - 2021 VERISILICON
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a
  8. * copy of this software and associated documentation files (the "Software"),
  9. * to deal in the Software without restriction, including without limitation
  10. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11. * and/or sell copies of the Software, and to permit persons to whom the
  12. * Software is furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in
  15. * all copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  20. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. *****************************************************************************
  26. *
  27. * The GPL License (GPL)
  28. *
  29. * Copyright (C) 2014 - 2021 VERISILICON
  30. *
  31. * This program is free software; you can redistribute it and/or
  32. * modify it under the terms of the GNU General Public License
  33. * as published by the Free Software Foundation; either version 2
  34. * of the License, or (at your option) any later version.
  35. *
  36. * This program is distributed in the hope that it will be useful,
  37. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  38. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  39. * GNU General Public License for more details.
  40. *
  41. * You should have received a copy of the GNU General Public License
  42. * along with this program; if not, write to the Free Software Foundation,
  43. * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  44. *
  45. *****************************************************************************
  46. *
  47. * Note: This software is released under dual MIT and GPL licenses. A
  48. * recipient may use this file under the terms of either the MIT license or
  49. * GPL License. If you wish to use only one license not the other, you can
  50. * indicate your decision by deleting one of the above license notices in your
  51. * version of this file.
  52. *
  53. *****************************************************************************/
  54. #include "subsys.h"
  55. #include <string.h>
  56. #undef PDEBUG
  57. #ifdef HANTRODEC_DEBUG
  58. # ifdef __KERNEL__
  59. # define PDEBUG(fmt, args...) printk( KERN_INFO "hantrodec: " fmt, ## args)
  60. # else
  61. # define PDEBUG(fmt, args...) fprintf(stderr, fmt, ## args)
  62. # endif
  63. #else
  64. # define PDEBUG(fmt, args...)
  65. #endif
  66. /******************************************************************************/
  67. /* subsystem configuration */
  68. /******************************************************************************/
  69. /* List of subsystems */
  70. static struct SubsysDesc subsys_array[] = {
  71. /* {slice_index, index, base} */
  72. {0, 0, 0x02310000},
  73. // {0, 1, 0x02350000}
  74. };
  75. /* List of all HW cores. */
  76. static struct CoreDesc core_array[] = {
  77. /* {slice, subsys, core_type, offset, iosize, irq, has_apb} */
  78. #if 0
  79. {0, 0, HW_VC8000DJ, 0x600000, 0, 0},
  80. {0, 0, HW_VC8000D, 0x602000, 0, 0},
  81. {0, 0, HW_L2CACHE, 0x604000, 0, 0},
  82. {0, 0, HW_DEC400, 0x606000, 0, 0},
  83. {0, 0, HW_BIGOCEAN, 0x608000, 0, 0},
  84. {0, 0, HW_NOC,0x60a000, 0, 0},
  85. {0, 0, HW_AXIFE, 0x60c000, 0, 0}
  86. #endif
  87. {0, 0, HW_VCMD, 0x0, 27*4, 0, -1},
  88. {0, 0, HW_VC8000D, 0x2000, 503*4, -1, -1},
  89. // {0, 0, HW_MMU, 0x3000, 228*4, -1, 0},
  90. // {0, 0, HW_MMU_WR, 0x4000, 228*4, -1, 0},
  91. {0, 0, HW_DEC400, 0x6000, 1568*4, -1, -1},
  92. {0, 0, HW_L2CACHE, 0x4000, 231*4, -1, -1},
  93. // {0, 0, HW_AXIFE, 0x5000, 64*4, -1, 1},
  94. // {0, 1, HW_VCMD, 0x0, 27*4, -1, 0},
  95. // {0, 1, HW_VC8000D, 0x2000, 503*4, -1, 1},
  96. // {0, 1, HW_MMU, 0x3000, 228*4, -1, 0},
  97. // {0, 1, HW_MMU_WR, 0x4000, 228*4, -1, 0},
  98. // {0, 1, HW_DEC400, 0x6000, 1568*4, -1, 0},
  99. // {0, 1, HW_L2CACHE, 0x4000, 231*4, -1, 0},
  100. // {0, 1, HW_AXIFE, 0x5000, 64*4, -1, 1},
  101. };
  102. extern struct vcmd_config vcmd_core_array[MAX_SUBSYS_NUM];
  103. extern int total_vcmd_core_num;
  104. extern unsigned long multicorebase[];
  105. extern int irq[];
  106. extern unsigned int iosize[];
  107. extern int reg_count[];
  108. /*
  109. If VCMD is used, convert core_array to vcmd_core_array, which are used in
  110. hantor_vcmd_xxx.c.
  111. Otherwise, covnert core_array to multicore_base/irq/iosize, which are used in
  112. hantro_dec_xxx.c
  113. VCMD:
  114. - struct vcmd_config vcmd_core_array[MAX_SUBSYS_NUM]
  115. - total_vcmd_core_num
  116. NON-VCMD:
  117. - multicorebase[HXDEC_MAX_CORES]
  118. - irq[HXDEC_MAX_CORES]
  119. - iosize[HXDEC_MAX_CORES]
  120. */
  121. void CheckSubsysCoreArray(struct subsys_config *subsys, int *vcmd) {
  122. int num = sizeof(subsys_array)/sizeof(subsys_array[0]);
  123. int i, j;
  124. memset(subsys, 0, sizeof(subsys[0])*MAX_SUBSYS_NUM);
  125. for (i = 0; i < num; i++) {
  126. subsys[i].base_addr = subsys_array[i].base;
  127. subsys[i].irq = -1;
  128. for (j = 0; j < HW_CORE_MAX; j++) {
  129. subsys[i].submodule_offset[j] = 0xffff;
  130. subsys[i].submodule_iosize[j] = 0;
  131. subsys[i].submodule_hwregs[j] = NULL;
  132. }
  133. }
  134. total_vcmd_core_num = 0;
  135. for (i = 0; i < sizeof(core_array)/sizeof(core_array[0]); i++) {
  136. if (!subsys[core_array[i].subsys].base_addr) {
  137. /* undefined subsystem */
  138. continue;
  139. }
  140. subsys[core_array[i].subsys].submodule_offset[core_array[i].core_type]
  141. = core_array[i].offset;
  142. subsys[core_array[i].subsys].submodule_iosize[core_array[i].core_type]
  143. = core_array[i].iosize;
  144. if (core_array[i].irq != -1) {
  145. subsys[core_array[i].subsys].irq = core_array[i].irq;
  146. }
  147. subsys[core_array[i].subsys].has_apbfilter[core_array[i].core_type] = core_array[i].has_apb;
  148. /* vcmd found */
  149. if (core_array[i].core_type == HW_VCMD) {
  150. *vcmd = 1;
  151. total_vcmd_core_num++;
  152. }
  153. }
  154. printk(KERN_INFO "hantrodec: vcmd = %d\n", *vcmd);
  155. /* To plug into hantro_vcmd.c */
  156. if (*vcmd) {
  157. for (i = 0; i < total_vcmd_core_num; i++) {
  158. vcmd_core_array[i].vcmd_base_addr = subsys[i].base_addr;
  159. vcmd_core_array[i].vcmd_iosize = subsys[i].submodule_iosize[HW_VCMD];
  160. vcmd_core_array[i].vcmd_irq = subsys[i].irq;
  161. vcmd_core_array[i].sub_module_type = 2; /* TODO(min): to be fixed */
  162. vcmd_core_array[i].submodule_main_addr = subsys[i].submodule_offset[HW_VC8000D];
  163. vcmd_core_array[i].submodule_dec400_addr = subsys[i].submodule_offset[HW_DEC400];
  164. vcmd_core_array[i].submodule_L2Cache_addr = subsys[i].submodule_offset[HW_L2CACHE];
  165. vcmd_core_array[i].submodule_MMU_addr = subsys[i].submodule_offset[HW_MMU];
  166. }
  167. }
  168. memset(multicorebase, 0, sizeof(multicorebase[0]) * HXDEC_MAX_CORES);
  169. for (i = 0; i < num; i++) {
  170. multicorebase[i] = subsys[i].base_addr + subsys[i].submodule_offset[HW_VC8000D];
  171. irq[i] = subsys[i].irq;
  172. iosize[i] = subsys[i].submodule_iosize[HW_VC8000D];
  173. printk(KERN_INFO "hantrodec: [%d] multicorebase 0x%08lx, iosize %d\n", i, multicorebase[i], iosize[i]);
  174. }
  175. }