vvcam_isp_driver_of.c 21 KB

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  1. /****************************************************************************
  2. *
  3. * The MIT License (MIT)
  4. *
  5. * Copyright (c) 2020 VeriSilicon Holdings Co., Ltd.
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a
  8. * copy of this software and associated documentation files (the "Software"),
  9. * to deal in the Software without restriction, including without limitation
  10. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11. * and/or sell copies of the Software, and to permit persons to whom the
  12. * Software is furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in
  15. * all copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  20. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. *****************************************************************************
  26. *
  27. * The GPL License (GPL)
  28. *
  29. * Copyright (c) 2020 VeriSilicon Holdings Co., Ltd.
  30. *
  31. * This program is free software; you can redistribute it and/or
  32. * modify it under the terms of the GNU General Public License
  33. * as published by the Free Software Foundation; either version 2
  34. * of the License, or (at your option) any later version.
  35. *
  36. * This program is distributed in the hope that it will be useful,
  37. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  38. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  39. * GNU General Public License for more details.
  40. *
  41. * You should have received a copy of the GNU General Public License
  42. * along with this program;
  43. *
  44. *****************************************************************************
  45. *
  46. * Note: This software is released under dual MIT and GPL licenses. A
  47. * recipient may use this file under the terms of either the MIT license or
  48. * GPL License. If you wish to use only one license not the other, you can
  49. * indicate your decision by deleting one of the above license notices in your
  50. * version of this file.
  51. *
  52. *****************************************************************************/
  53. #include <asm/io.h>
  54. #include <linux/cdev.h>
  55. #include <linux/module.h>
  56. #include <linux/platform_device.h>
  57. #include <linux/delay.h>
  58. #include <linux/clk.h>
  59. #include <linux/io.h>
  60. #include <linux/mm.h>
  61. #include <linux/timer.h>
  62. #include <linux/kernel.h>
  63. #include <linux/init.h>
  64. #include <linux/workqueue.h>
  65. #include <linux/slab.h>
  66. #include <linux/proc_fs.h>
  67. #include <linux/debugfs.h>
  68. #include <linux/miscdevice.h>
  69. #include <linux/uaccess.h>
  70. #include <linux/interrupt.h>
  71. #include <linux/of_reserved_mem.h>
  72. #include <linux/pm_runtime.h>
  73. #include <linux/of.h>
  74. #include <linux/of_address.h>
  75. #include <linux/dma-mapping.h>
  76. #include <linux/dma-buf.h>
  77. #include "isp_ioctl.h"
  78. #include "mrv_all_regs.h"
  79. #include "isp_wdr.h"
  80. extern MrvAllRegister_t *all_regs;
  81. #define VIVCAM_ISP_NAME "vivisp_ry"
  82. #define VIVCAM_ISP_MAXCNT 1
  83. #define VIVCAM_ISP_IRQ_NUMBER 16
  84. struct vvcam_isp_driver_dev
  85. {
  86. struct cdev cdev;
  87. dev_t devt;
  88. struct class *class;
  89. struct mutex vvmutex;
  90. unsigned int device_idx;
  91. struct timer_list isp_timer;
  92. struct work_struct vvnative_wq;
  93. wait_queue_head_t irq_wait;
  94. int irq_num[2];
  95. void *private;
  96. struct clk *aclk;
  97. struct clk *hclk;
  98. struct clk *cclk;
  99. struct platform_device *pdev;
  100. };
  101. static unsigned int vvcam_isp_major = 0;
  102. static unsigned int vvcam_isp_minor = 0;
  103. static struct class *vvcam_isp_class;
  104. static unsigned int devise_register_index = 0;
  105. static bool isp_irq = false;
  106. static unsigned int vvnative_isp_poll(struct file * filp, poll_table *wait)
  107. {
  108. unsigned int mask = 0;
  109. struct vvcam_isp_driver_dev *pdriver_dev = filp->private_data;
  110. poll_wait(filp, &pdriver_dev->irq_wait, wait);
  111. //pr_info("poll isp_irq %d\n", isp_irq);
  112. if (isp_irq) {
  113. mask |= POLLIN |POLLRDNORM;
  114. isp_irq = false;
  115. }
  116. return mask;
  117. }
  118. static void vvnative_isp_work(struct work_struct *work)
  119. {
  120. /*Todo update those module that does not have shandow register*/
  121. struct vvcam_isp_driver_dev *pdriver_dev = container_of(work, struct vvcam_isp_driver_dev, vvnative_wq);
  122. struct isp_ic_dev * pisp_dev = pdriver_dev->private;
  123. //pr_info("%s enter \n", __func__);
  124. isp_irq = true;
  125. wake_up_interruptible(&pdriver_dev->irq_wait);
  126. if (pisp_dev->isp_mis & MRV_ISP_MIS_FRAME_MASK) {
  127. if (pisp_dev->wdr.changed) {
  128. pr_info("%s pisp_dev->wdr.changed %d\n", __func__,
  129. pisp_dev->wdr.changed);
  130. isp_s_wdr(pisp_dev);
  131. }
  132. if (pisp_dev->flt.changed) {
  133. pr_info("%s pisp_dev->flt.changed %d\n", __func__,
  134. pisp_dev->flt.changed);
  135. isp_s_flt(pisp_dev);
  136. }
  137. #ifndef ISP_CPROC_SHD_RY
  138. if (pisp_dev->cproc.changed) {
  139. pr_info("%s pisp_dev->cproc.changed %d\n", __func__,
  140. pisp_dev->cproc.changed);
  141. isp_s_cproc(pisp_dev);
  142. }
  143. #endif
  144. if (pisp_dev->gamma_out.changed) {
  145. pr_info("%s pisp_dev->gamma_out.changed %d\n", __func__,
  146. pisp_dev->gamma_out.changed);
  147. isp_s_gamma_out(pisp_dev);
  148. }
  149. if (pisp_dev->rgbgamma.data_changed) {
  150. //pr_info("%s pisp_dev->rgbgamma.data_changed %d\n", __func__,
  151. //pisp_dev->rgbgamma.data_changed);
  152. isp_s_rgbgamma(pisp_dev);
  153. }
  154. if (pisp_dev->rgbgamma.changed) {
  155. //pr_info("%s pisp_dev->rgbgamma.changed %d\n", __func__,pisp_dev->rgbgamma.changed);
  156. if (pisp_dev->rgbgamma.enable) {
  157. isp_enable_rgbgamma(pisp_dev);
  158. } else {
  159. isp_disable_rgbgamma(pisp_dev);
  160. }
  161. }
  162. }
  163. }
  164. static irqreturn_t vvcam_ry_isp_irq(int irq, void *dev_id)
  165. {
  166. struct vvcam_isp_driver_dev *pdriver_dev ;
  167. struct isp_ic_dev * pisp_dev;
  168. u64 isp_mis, mi_mis = 0;
  169. pdriver_dev = (struct vvcam_isp_driver_dev *)dev_id;
  170. pisp_dev = pdriver_dev->private;
  171. isp_mis = isp_read_reg(pisp_dev, REG_ADDR(isp_mis));
  172. if (isp_mis) {
  173. isp_mis_t mis_data;
  174. mis_data.irq_src = SRC_ISP_IRQ;
  175. mis_data.val = isp_mis;
  176. pisp_dev->isp_mis = isp_mis;
  177. isp_irq_write_circle_queue(&mis_data, &pisp_dev->circle_list);
  178. isp_write_reg(pisp_dev, REG_ADDR(isp_icr), isp_mis);
  179. if(isp_mis & MRV_ISP_MIS_ISP_OFF_MASK) {
  180. isp_write_reg(pisp_dev, REG_ADDR(isp_imsc), isp_read_reg(pisp_dev, REG_ADDR(isp_imsc))&(~MRV_ISP_MIS_ISP_OFF_MASK));
  181. }
  182. if (isp_mis & MRV_ISP_MIS_FLASH_ON_MASK)
  183. mi_mis |= (0x1 | MP_JDP_FRAME_END_MASK); // line mode ry 3a start after frame done
  184. }
  185. //if (isp_mis & MRV_ISP_MIS_VSM_END_MASK) { // MP_JDP_FRAME_END
  186. //isp_info("%s MRV_ISP_MIS_VSM_END_MASK >>> MP_JDP_FRAME_END_MASK...\n", __func__);
  187. //mi_mis |= MP_JDP_FRAME_END_MASK;
  188. //}
  189. if (isp_mis & MRV_ISP_MIS_SHUTTER_OFF_MASK) { // drop frame
  190. //isp_info("%s drop frame\n", __func__);
  191. mi_mis = 0x100000001;
  192. }
  193. if (mi_mis) {
  194. isp_mis_t mis_data;
  195. mis_data.irq_src = SRC_MI_IRQ;
  196. mis_data.val = mi_mis;
  197. isp_irq_write_circle_queue(&mis_data, &pisp_dev->circle_list);
  198. }
  199. if (isp_mis != 0 ||mi_mis != 0 ) {
  200. schedule_work(&pdriver_dev->vvnative_wq);
  201. } else {
  202. return IRQ_HANDLED; // return IRQ_NONE;
  203. }
  204. return IRQ_HANDLED;
  205. }
  206. static irqreturn_t vvcam_ry_mi_irq(int irq, void *dev_id)
  207. {
  208. struct vvcam_isp_driver_dev *pdriver_dev ;
  209. struct isp_ic_dev * pisp_dev;
  210. u32 mi_mis, mi_mis_addr, mi_icr_addr;
  211. #ifdef ISP_MIV2_RY
  212. u32 miv2_mis1, miv2_mis3;
  213. #endif
  214. #if defined(ISP_MI_PP_READ_RY) || defined (ISP_3DNR_V3) || defined (ISP_MI_PP_WRITE_RY) || defined (ISP_MI_HDR_RY)
  215. u32 miv2_mis2;
  216. #endif
  217. pdriver_dev = (struct vvcam_isp_driver_dev *)dev_id;
  218. pisp_dev = pdriver_dev->private;
  219. #ifdef ISP_MIV2_RY
  220. mi_icr_addr = REG_ADDR(miv2_icr);
  221. mi_mis_addr = REG_ADDR(miv2_mis);
  222. miv2_mis1 = isp_read_reg(pisp_dev, REG_ADDR(miv2_mis1));
  223. if (miv2_mis1) {
  224. /*pr_info("%s mi mis1 0x%08x\n", __func__, miv2_mis1);*/
  225. isp_write_reg(pisp_dev, REG_ADDR(miv2_icr1), miv2_mis1);
  226. }
  227. #ifdef POST_ISP_SDK_TEST
  228. miv2_mis3 = isp_read_reg(pisp_dev, REG_ADDR(miv2_mis3));
  229. if (miv2_mis3) {
  230. pr_info("%s mi mis3 0x%08x\n", __func__, miv2_mis3);
  231. isp_write_reg(pisp_dev, REG_ADDR(miv2_icr3), miv2_mis3);
  232. }
  233. #endif
  234. #elif defined(ISP_MIV1_RY)
  235. mi_icr_addr = REG_ADDR(mi_icr);
  236. mi_mis_addr = REG_ADDR(mi_mis);
  237. #endif
  238. /*mi_mis = isp_read_reg(pisp_dev, mi_mis_addr);*/
  239. #if defined(ISP_MI_PP_READ_RY) || defined (ISP_3DNR_V3) || defined (ISP_MI_PP_WRITE_RY) || defined (ISP_MI_HDR_RY)
  240. miv2_mis2 = isp_read_reg(pisp_dev, REG_ADDR(miv2_mis2));
  241. /*pr_info("%s isp mis 0x%08x, mi mis 0x%08x post mis 0x%08x\n", __func__, \
  242. isp_mis, mi_mis, miv2_mis2);*/
  243. #else
  244. /*pr_info("%s isp mis 0x%08x, mi mis 0x%08x\n", __func__, \
  245. isp_mis, mi_mis);*/
  246. #endif
  247. if (mi_mis) {
  248. isp_mis_t mis_data;
  249. mis_data.irq_src = SRC_MI_IRQ;
  250. mis_data.val = mi_mis;
  251. isp_irq_write_circle_queue(&mis_data, &pisp_dev->circle_list);
  252. isp_write_reg(pisp_dev, mi_icr_addr, mi_mis);
  253. }
  254. #ifdef ISP_MIV2_RY
  255. if (miv2_mis1) {
  256. isp_mis_t mis_data;
  257. mis_data.irq_src = SRC_MI1_IRQ;
  258. mis_data.val = mi_mis;
  259. isp_irq_write_circle_queue(&mis_data, &pisp_dev->circle_list);
  260. isp_write_reg(pisp_dev, mi_icr_addr, mi_mis);
  261. }
  262. #endif
  263. #if defined(ISP_MI_PP_READ_RY) || defined (ISP_3DNR_V3) || defined (ISP_MI_PP_WRITE_RY) || defined (ISP_MI_HDR_RY)
  264. if (miv2_mis2) {
  265. isp_mis_t mis_data;
  266. mis_data.irq_src = SRC_MI2_IRQ;
  267. mis_data.val = miv2_mis2;
  268. isp_irq_write_circle_queue(&mis_data, &pisp_dev->circle_list);
  269. isp_write_reg(pisp_dev, REG_ADDR(miv2_icr2), miv2_mis2);
  270. }
  271. #endif
  272. #if defined(ISP_MI_PP_READ_RY) || defined (ISP_3DNR_V3) || defined (ISP_MI_PP_WRITE_RY) || defined (ISP_MI_HDR_RY)
  273. if (mi_mis != 0 || miv2_mis2 != 0) {
  274. #else
  275. if (mi_mis != 0 ) {
  276. #endif
  277. schedule_work(&pdriver_dev->vvnative_wq);
  278. } else {
  279. return IRQ_HANDLED; // return IRQ_NONE;
  280. }
  281. return IRQ_HANDLED;
  282. }
  283. static int vvcam_isp_runtime_suspend(struct device *dev)
  284. {
  285. struct vvcam_isp_driver_dev *pdriver_dev = dev_get_drvdata(dev);
  286. pr_info("ry %s enter\n", __func__);
  287. clk_disable_unprepare(pdriver_dev->aclk);
  288. clk_disable_unprepare(pdriver_dev->hclk);
  289. clk_disable_unprepare(pdriver_dev->cclk);
  290. pr_info("ry %s exit\n", __func__);
  291. return 0;
  292. }
  293. static int vvcam_isp_runtime_resume(struct device *dev)
  294. {
  295. struct vvcam_isp_driver_dev *pdriver_dev = dev_get_drvdata(dev);
  296. int ret = 0;
  297. ret = clk_prepare_enable(pdriver_dev->cclk);
  298. if (ret < 0) {
  299. dev_err(dev, "could not prepare or enable core clock\n");
  300. //return ret;
  301. }
  302. ret = clk_prepare_enable(pdriver_dev->hclk);
  303. if (ret < 0) {
  304. dev_err(dev, "could not prepare or enable ahb clock\n");
  305. clk_disable_unprepare(pdriver_dev->cclk);
  306. //return ret;
  307. }
  308. ret = clk_prepare_enable(pdriver_dev->aclk);
  309. if (ret < 0) {
  310. dev_err(dev, "could not prepare or enable axi clock\n");
  311. clk_disable_unprepare(pdriver_dev->cclk);
  312. clk_disable_unprepare(pdriver_dev->hclk);
  313. //return ret;
  314. }
  315. pr_info("%s ry Enabled clock\n", __func__);
  316. return ret;
  317. }
  318. static const struct dev_pm_ops vvcam_isp_runtime_pm_ops = {
  319. SET_RUNTIME_PM_OPS(vvcam_isp_runtime_suspend, vvcam_isp_runtime_resume, NULL)
  320. };
  321. static int vvcam_isp_open(struct inode * inode, struct file * file)
  322. {
  323. int ret = 0;
  324. struct vvcam_isp_driver_dev *pdriver_dev;
  325. struct isp_ic_dev * pisp_dev;
  326. pdriver_dev = container_of(inode->i_cdev, struct vvcam_isp_driver_dev, cdev);
  327. file->private_data = pdriver_dev;
  328. pisp_dev = pdriver_dev->private;
  329. isp_irq_reset_circle_queue(&(pisp_dev->circle_list));
  330. struct device *dev = &pdriver_dev->pdev->dev;
  331. if (pm_runtime_get_sync(dev)) {
  332. ret = vvcam_isp_runtime_resume(dev);
  333. if (ret)
  334. pr_err("fail to resume isp %s %d\n", __func__, __LINE__);
  335. }
  336. return 0;
  337. };
  338. static long vvcam_isp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  339. {
  340. long ret = 0;
  341. struct vvcam_isp_driver_dev *pdriver_dev;
  342. struct isp_ic_dev * pisp_dev;
  343. pdriver_dev = file->private_data;
  344. if (pdriver_dev == NULL)
  345. {
  346. pr_err("%s:file private is null point error\n", __func__);
  347. return -ENOMEM;
  348. }
  349. pisp_dev = pdriver_dev->private;
  350. //pr_info("%s:isp[%d] pdriver_dev =0x%px\n", __func__,pdriver_dev->device_idx,pdriver_dev);
  351. //pr_info("%s:pisp_dev =0x%px\n", __func__,pisp_dev);
  352. mutex_lock(&pdriver_dev->vvmutex);
  353. ret = isp_priv_ioctl(pisp_dev, cmd ,(void __user *)arg);
  354. mutex_unlock(&pdriver_dev->vvmutex);
  355. return ret;
  356. };
  357. static int vvcam_isp_release(struct inode * inode, struct file * file)
  358. {
  359. int ret = 0;
  360. struct vvcam_isp_driver_dev *pdriver_dev;
  361. struct isp_ic_dev *pisp_dev;
  362. pr_info("ry enter %s\n", __func__);
  363. if ((inode == NULL) || (file == NULL) ) {
  364. isp_info("%s: %dx\n", __func__, __LINE__);
  365. return 0;
  366. }
  367. pdriver_dev = container_of(inode->i_cdev, struct vvcam_isp_driver_dev, cdev);
  368. file->private_data = pdriver_dev;
  369. pisp_dev = pdriver_dev->private;
  370. ry_force_stop(pisp_dev);
  371. struct device *dev = &pdriver_dev->pdev->dev;
  372. if (pisp_dev->ut_addr != NULL) {
  373. #define UT_USED_SIZE 0x01000000
  374. dma_free_coherent(dev, UT_USED_SIZE,
  375. pisp_dev->ut_addr, pisp_dev->ut_phy_addr);
  376. pisp_dev->ut_addr=NULL;
  377. }
  378. if (pisp_dev->ut_addr != NULL) {
  379. #define UT_USED_SIZE 0x01000000
  380. dma_free_coherent(dev, UT_USED_SIZE,
  381. pisp_dev->ut_addr, pisp_dev->ut_phy_addr);
  382. pisp_dev->ut_addr = NULL;
  383. }
  384. if (pm_runtime_put_sync(dev)) {
  385. pr_info("fail to resume isp %s %d\n", __func__, __LINE__);
  386. }
  387. pr_info("ry exit %s\n", __func__);
  388. return 0;
  389. };
  390. static int vvcam_isp_mmap(struct file *pFile, struct vm_area_struct *vma)
  391. {
  392. int ret = 0;
  393. ulong phy_base_addr = 0;
  394. unsigned long pfn_start = (phy_base_addr >> PAGE_SHIFT) + vma->vm_pgoff;
  395. unsigned long size = vma->vm_end - vma->vm_start;
  396. pr_info("phy: 0x%lx, size: 0x%lx\n", pfn_start << PAGE_SHIFT, size);
  397. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  398. if (remap_pfn_range(vma, vma->vm_start,pfn_start,size, vma->vm_page_prot))
  399. {
  400. pr_err("-->%s: remap_pfn_range error!\n", __func__);
  401. return -EIO;
  402. }
  403. return ret;
  404. };
  405. static struct file_operations vvcam_isp_fops = {
  406. .owner = THIS_MODULE,
  407. .open = vvcam_isp_open,
  408. .release = vvcam_isp_release,
  409. .unlocked_ioctl = vvcam_isp_ioctl,
  410. .mmap = vvcam_isp_mmap,
  411. .poll = vvnative_isp_poll,
  412. };
  413. static int vvcam_isp_probe(struct platform_device *pdev)
  414. {
  415. int ret = 0;
  416. struct device_node *np;
  417. struct vvcam_isp_driver_dev *pdriver_dev;
  418. struct isp_ic_dev * pisp_dev;
  419. struct resource *mem;
  420. pr_info("enter %s\n", __func__);
  421. pdev->id = devise_register_index;
  422. if (pdev->id >= VIVCAM_ISP_MAXCNT)
  423. {
  424. pr_err("%s:pdev id is %d error\n", __func__,pdev->id);
  425. return -EINVAL;
  426. }
  427. pdriver_dev = devm_kzalloc(&pdev->dev,sizeof(struct vvcam_isp_driver_dev), GFP_KERNEL);
  428. if (pdriver_dev == NULL)
  429. {
  430. pr_err("%s:alloc struct vvcam_isp_driver_dev error\n", __func__);
  431. return -ENOMEM;
  432. }
  433. memset(pdriver_dev,0,sizeof(struct vvcam_isp_driver_dev ));
  434. pr_info("%s:isp[%d]: pdriver_dev =0x%px\n", __func__,pdev->id,pdriver_dev);
  435. pisp_dev = devm_kzalloc(&pdev->dev,sizeof(struct isp_ic_dev), GFP_KERNEL);
  436. if (pisp_dev == NULL)
  437. {
  438. pr_err("%s:alloc struct isp_ic_dev error\n", __func__);
  439. return -ENOMEM;
  440. }
  441. memset(pisp_dev,0,sizeof(struct isp_ic_dev ));
  442. isp_irq_create_circle_queue(&(pisp_dev->circle_list), QUEUE_NODE_COUNT);
  443. pr_info("%s:isp[%d]: psensor_dev =0x%px\n", __func__,pdev->id,pisp_dev);
  444. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  445. pisp_dev->base = devm_ioremap_resource(&pdev->dev, mem);
  446. if (IS_ERR(pisp_dev->base))
  447. return PTR_ERR(pisp_dev->base);
  448. pr_info("%s:isp[%d]: pisp_dev->base=0x%px, phy_addr base=0x%llx\n", __func__,
  449. pdev->id, pisp_dev->base, mem->start);
  450. pisp_dev->reset = NULL;
  451. pisp_dev->device = &pdev->dev;
  452. pdriver_dev->private = pisp_dev;
  453. pdriver_dev->device_idx = pdev->id;
  454. mutex_init(&pdriver_dev->vvmutex);
  455. platform_set_drvdata(pdev, pdriver_dev);
  456. pdriver_dev->pdev = pdev;
  457. pdriver_dev->irq_num[0] = platform_get_irq(pdev, 0);
  458. if (pdriver_dev->irq_num[0] == 0) {
  459. pr_err("%s:isp[%d]: could not map IRQ\n", __func__, pdev->id);
  460. dev_err(&pdev->dev, "could not map IRQ.\n");
  461. return -ENXIO;
  462. }
  463. pr_info("%s:isp[%d]: pdriver_dev->irq_num[0]=%d\n", __func__, pdev->id, pdriver_dev->irq_num[0]);
  464. pdriver_dev->irq_num[1] = platform_get_irq(pdev, 1);
  465. if (pdriver_dev->irq_num[1] == 0) {
  466. pr_err("%s:isp[%d]: could not map IRQ\n", __func__, pdev->id);
  467. dev_err(&pdev->dev, "could not map IRQ.\n");
  468. return -ENXIO;
  469. }
  470. pr_info("%s:isp[%d]: pdriver_dev->irq_num[1]=%d\n", __func__, pdev->id, pdriver_dev->irq_num[1]);
  471. /*init work queue*/
  472. INIT_WORK(&pdriver_dev->vvnative_wq, vvnative_isp_work);
  473. ret = devm_request_irq(&pdev->dev, pdriver_dev->irq_num[0], vvcam_ry_isp_irq,
  474. IRQF_TRIGGER_RISING | IRQF_SHARED, "ISP_IRQ", (char *)pdriver_dev);
  475. if (ret) {
  476. pr_err("%s[%d]:request irq error!\n", __func__, __LINE__);
  477. return ret;
  478. }
  479. ret = devm_request_irq(&pdev->dev, pdriver_dev->irq_num[1], vvcam_ry_mi_irq,
  480. IRQF_TRIGGER_RISING, "MI_IRQ", (char *)pdriver_dev);
  481. if (ret) {
  482. pr_err("%s[%d]:request irq error!\n", __func__, __LINE__);
  483. return ret;
  484. }
  485. init_waitqueue_head(&pdriver_dev->irq_wait);
  486. /*parse clk info from dts*/
  487. pdriver_dev->aclk = devm_clk_get(&pdev->dev, "aclk");
  488. if (IS_ERR(pdriver_dev->aclk)) {
  489. dev_err(&pdev->dev, "failed to get aclk");
  490. //return -1;
  491. }
  492. pdriver_dev->hclk = devm_clk_get(&pdev->dev, "hclk");
  493. if (IS_ERR(pdriver_dev->hclk)) {
  494. dev_err(&pdev->dev, "failed to get hclk");
  495. //return -1;
  496. }
  497. pdriver_dev->cclk = devm_clk_get(&pdev->dev, "cclk");
  498. if (IS_ERR(pdriver_dev->aclk)) {
  499. dev_err(&pdev->dev, "failed to get core_clk");
  500. //return -1;
  501. }
  502. dev_err(&pdev->dev, "parse clk success");
  503. if ((devise_register_index == 0)) {
  504. int ret;
  505. if (vvcam_isp_major == 0) {
  506. ret = alloc_chrdev_region(&pdriver_dev->devt, 0, VIVCAM_ISP_MAXCNT, VIVCAM_ISP_NAME);
  507. if (ret != 0)
  508. {
  509. pr_err("%s:alloc_chrdev_region error\n", __func__);
  510. return ret;
  511. }
  512. vvcam_isp_major = MAJOR(pdriver_dev->devt);
  513. vvcam_isp_minor = MINOR(pdriver_dev->devt);
  514. }
  515. else
  516. {
  517. pdriver_dev->devt = MKDEV(vvcam_isp_major, vvcam_isp_minor);
  518. ret = register_chrdev_region(pdriver_dev->devt, VIVCAM_ISP_MAXCNT, VIVCAM_ISP_NAME);
  519. if (ret)
  520. {
  521. pr_err("%s:register_chrdev_region error\n", __func__);
  522. return ret;
  523. }
  524. }
  525. vvcam_isp_class = class_create(THIS_MODULE, VIVCAM_ISP_NAME);
  526. if (IS_ERR(vvcam_isp_class))
  527. {
  528. pr_err("%s[%d]:class_create error!\n", __func__, __LINE__);
  529. return -EINVAL;
  530. }
  531. }
  532. pdriver_dev->devt = MKDEV(vvcam_isp_major, vvcam_isp_minor + pdev->id);
  533. cdev_init(&pdriver_dev->cdev, &vvcam_isp_fops);
  534. ret = cdev_add(&pdriver_dev->cdev, pdriver_dev->devt, 1);
  535. if ( ret )
  536. {
  537. pr_err("%s[%d]:cdev_add error!\n", __func__, __LINE__);
  538. return ret;
  539. }
  540. pdriver_dev->class = vvcam_isp_class;
  541. device_create(pdriver_dev->class, NULL, pdriver_dev->devt,
  542. pdriver_dev, "%s%d", VIVCAM_ISP_NAME, pdev->id);
  543. struct device *dev = &pdriver_dev->pdev->dev;
  544. pm_runtime_enable(dev);
  545. ret = pm_runtime_resume_and_get(dev);
  546. if (ret < 0) {
  547. dev_err(dev, "fail to resume isp ry\n");
  548. }
  549. ret = pm_runtime_put_sync(dev);
  550. if (ret < 0) {
  551. dev_err(dev, "fail to suspend isp ry\n");
  552. }
  553. devise_register_index++;
  554. pr_info("exit %s\n", __func__);
  555. return ret;
  556. }
  557. static int vvcam_isp_remove(struct platform_device *pdev)
  558. {
  559. struct vvcam_isp_driver_dev *pdriver_dev;
  560. struct isp_ic_dev * pisp_dev;
  561. pr_info("enter %s\n", __func__);
  562. devise_register_index--;
  563. pdriver_dev = platform_get_drvdata(pdev);
  564. pisp_dev = pdriver_dev->private;
  565. if (pisp_dev->ut_addr != NULL) {
  566. #define UT_USED_SIZE 0x01000000
  567. dma_free_coherent(&pdev->dev, UT_USED_SIZE,
  568. pisp_dev->ut_addr, pisp_dev->ut_phy_addr);
  569. pisp_dev->ut_addr = NULL;
  570. }
  571. free_irq(pdriver_dev->irq_num[0], pdriver_dev);
  572. free_irq(pdriver_dev->irq_num[1], pdriver_dev);
  573. isp_irq_destroy_circle_queue(&(pisp_dev->circle_list));
  574. struct device *dev = &pdev->dev;
  575. pm_runtime_disable(dev);
  576. cdev_del(&pdriver_dev->cdev);
  577. device_destroy(pdriver_dev->class, pdriver_dev->devt);
  578. unregister_chrdev_region(pdriver_dev->devt, VIVCAM_ISP_MAXCNT);
  579. if (devise_register_index == 0)
  580. {
  581. class_destroy(pdriver_dev->class);
  582. }
  583. return 0;
  584. }
  585. static const struct of_device_id isp_of_match[] = {
  586. { .compatible = "thead,light-isp_ry", },
  587. { /* sentinel */ },
  588. };
  589. static struct platform_driver vvcam_isp_driver = {
  590. .probe = vvcam_isp_probe,
  591. .remove = vvcam_isp_remove,
  592. .driver = {
  593. .name = VIVCAM_ISP_NAME,
  594. .owner = THIS_MODULE,
  595. .of_match_table = of_match_ptr(isp_of_match),
  596. .pm = &vvcam_isp_runtime_pm_ops,
  597. }
  598. };
  599. static int __init vvcam_isp_init_module(void)
  600. {
  601. int ret = 0;
  602. pr_info("enter %s\n", __func__);
  603. ret = platform_driver_register(&vvcam_isp_driver);
  604. if (ret)
  605. {
  606. pr_err("register platform driver failed.\n");
  607. return ret;
  608. }
  609. return ret;
  610. }
  611. static void __exit vvcam_isp_exit_module(void)
  612. {
  613. pr_info("enter %s\n", __func__);
  614. platform_driver_unregister(&vvcam_isp_driver);
  615. }
  616. module_init(vvcam_isp_init_module);
  617. module_exit(vvcam_isp_exit_module);
  618. MODULE_DESCRIPTION("ISP");
  619. MODULE_LICENSE("GPL");