vvcam_isp_driver_of.c 24 KB

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  1. /****************************************************************************
  2. *
  3. * The MIT License (MIT)
  4. *
  5. * Copyright (c) 2020 VeriSilicon Holdings Co., Ltd.
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a
  8. * copy of this software and associated documentation files (the "Software"),
  9. * to deal in the Software without restriction, including without limitation
  10. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11. * and/or sell copies of the Software, and to permit persons to whom the
  12. * Software is furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in
  15. * all copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  20. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. *****************************************************************************
  26. *
  27. * The GPL License (GPL)
  28. *
  29. * Copyright (c) 2020 VeriSilicon Holdings Co., Ltd.
  30. *
  31. * This program is free software; you can redistribute it and/or
  32. * modify it under the terms of the GNU General Public License
  33. * as published by the Free Software Foundation; either version 2
  34. * of the License, or (at your option) any later version.
  35. *
  36. * This program is distributed in the hope that it will be useful,
  37. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  38. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  39. * GNU General Public License for more details.
  40. *
  41. * You should have received a copy of the GNU General Public License
  42. * along with this program;
  43. *
  44. *****************************************************************************
  45. *
  46. * Note: This software is released under dual MIT and GPL licenses. A
  47. * recipient may use this file under the terms of either the MIT license or
  48. * GPL License. If you wish to use only one license not the other, you can
  49. * indicate your decision by deleting one of the above license notices in your
  50. * version of this file.
  51. *
  52. *****************************************************************************/
  53. #include <asm/io.h>
  54. #include <linux/cdev.h>
  55. #include <linux/module.h>
  56. #include <linux/platform_device.h>
  57. #include <linux/delay.h>
  58. #include <linux/clk.h>
  59. #include <linux/io.h>
  60. #include <linux/mm.h>
  61. #include <linux/timer.h>
  62. #include <linux/kernel.h>
  63. #include <linux/init.h>
  64. #include <linux/workqueue.h>
  65. #include <linux/slab.h>
  66. #include <linux/proc_fs.h>
  67. #include <linux/debugfs.h>
  68. #include <linux/miscdevice.h>
  69. #include <linux/uaccess.h>
  70. #include <linux/interrupt.h>
  71. #include <linux/of_reserved_mem.h>
  72. #include <linux/pm_runtime.h>
  73. #include <linux/of.h>
  74. #include <linux/of_address.h>
  75. #include <linux/dma-mapping.h>
  76. #include <linux/dma-buf.h>
  77. #include "isp_ioctl.h"
  78. #include "mrv_all_regs.h"
  79. #include "isp_wdr.h"
  80. extern MrvAllRegister_t *all_regs;
  81. #define VIVCAM_ISP_NAME "vivisp"
  82. #define VIVCAM_ISP_MAXCNT 2
  83. #define VIVCAM_ISP_IRQ_NUMBER 16
  84. typedef struct {
  85. volatile uint64_t frame_irq_cnt;
  86. volatile uint64_t frame_time_us;
  87. volatile int x[2];
  88. } frame_mark_t;
  89. struct vvcam_isp_driver_dev
  90. {
  91. struct cdev cdev;
  92. dev_t devt;
  93. struct class *class;
  94. struct mutex vvmutex;
  95. unsigned int device_idx;
  96. struct timer_list isp_timer;
  97. struct work_struct vvnative_wq;
  98. wait_queue_head_t irq_wait;
  99. void *private;
  100. struct clk *aclk;
  101. struct clk *hclk;
  102. struct clk *isp0_pclk;
  103. struct clk *cclk;
  104. struct clk *isp1_pclk;
  105. struct platform_device *pdev;
  106. frame_mark_t *frame_mark;
  107. };
  108. static unsigned int vvcam_isp_major = 0;
  109. static unsigned int vvcam_isp_minor = 0;
  110. static struct class *vvcam_isp_class;
  111. static unsigned int devise_register_index = 0;
  112. static bool isp_irq = false;
  113. static unsigned int vvnative_isp_poll(struct file * filp, poll_table *wait)
  114. {
  115. unsigned int mask = 0;
  116. struct vvcam_isp_driver_dev *pdriver_dev = filp->private_data;
  117. poll_wait(filp, &pdriver_dev->irq_wait, wait);
  118. //pr_info("poll isp_irq %d\n", isp_irq);
  119. if (isp_irq) {
  120. mask |= POLLIN |POLLRDNORM;
  121. isp_irq = false;
  122. }
  123. return mask;
  124. }
  125. static uint64_t get_us_time(void)
  126. {
  127. struct timespec64 ts;
  128. static uint64_t us = 0;
  129. ktime_get_real_ts64(&ts);
  130. us = timespec64_to_ns(&ts) / 1000UL;
  131. return us;
  132. }
  133. static void vvnative_isp_work(struct work_struct *work)
  134. {
  135. /*Todo update those module that does not have shandow register*/
  136. struct vvcam_isp_driver_dev *pdriver_dev = container_of(work, struct vvcam_isp_driver_dev, vvnative_wq);
  137. struct isp_ic_dev * pisp_dev = pdriver_dev->private;
  138. isp_irq = true;
  139. wake_up_interruptible(&pdriver_dev->irq_wait);
  140. if (pisp_dev->isp_mis & MRV_ISP_MIS_FRAME_MASK) {
  141. if (pisp_dev->wdr.changed) {
  142. pr_info("%s pisp_dev->wdr.changed %d\n", __func__,
  143. pisp_dev->wdr.changed);
  144. isp_s_wdr(pisp_dev);
  145. }
  146. if (pisp_dev->flt.changed) {
  147. pr_info("%s pisp_dev->flt.changed %d\n", __func__,
  148. pisp_dev->flt.changed);
  149. isp_s_flt(pisp_dev);
  150. }
  151. #ifndef ISP_CPROC_SHD
  152. if (pisp_dev->cproc.changed) {
  153. pr_info("%s pisp_dev->cproc.changed %d\n", __func__,
  154. pisp_dev->cproc.changed);
  155. isp_s_cproc(pisp_dev);
  156. }
  157. #endif
  158. if (pisp_dev->gamma_out.changed) {
  159. pr_info("%s pisp_dev->gamma_out.changed %d\n", __func__,
  160. pisp_dev->gamma_out.changed);
  161. isp_s_gamma_out(pisp_dev);
  162. }
  163. if (pisp_dev->rgbgamma.data_changed) {
  164. //pr_info("%s pisp_dev->rgbgamma.data_changed %d\n", __func__,
  165. //pisp_dev->rgbgamma.data_changed);
  166. isp_s_rgbgamma(pisp_dev);
  167. }
  168. if (pisp_dev->rgbgamma.changed) {
  169. //pr_info("%s pisp_dev->rgbgamma.changed %d\n", __func__,pisp_dev->rgbgamma.changed);
  170. if (pisp_dev->rgbgamma.enable) {
  171. isp_enable_rgbgamma(pisp_dev);
  172. } else {
  173. isp_disable_rgbgamma(pisp_dev);
  174. }
  175. }
  176. if (pisp_dev->dgain.changed) {
  177. isp_s_digital_gain(pisp_dev);
  178. }
  179. }
  180. }
  181. static irqreturn_t vvcam_isp_irq(int irq, void *dev_id)
  182. {
  183. struct vvcam_isp_driver_dev *pdriver_dev ;
  184. struct isp_ic_dev * pisp_dev;
  185. u64 isp_mis, mi_mis = 0;
  186. pdriver_dev = (struct vvcam_isp_driver_dev *)dev_id;
  187. pisp_dev = pdriver_dev->private;
  188. isp_mis = isp_read_reg(pisp_dev, REG_ADDR(isp_mis));
  189. if (isp_mis & MRV_ISP_MIS_FLASH_ON_MASK) {
  190. mi_mis |= 0x4;
  191. }
  192. volatile frame_mark_t *frame_mark = pdriver_dev->frame_mark;
  193. if (isp_mis & MRV_ISP_MIS_FRAME_IN_MASK) {
  194. frame_mark->frame_time_us = get_us_time();
  195. frame_mark->frame_irq_cnt += 1;
  196. }
  197. if (mi_mis) {
  198. isp_mis_t mis_data;
  199. mis_data.irq_src = SRC_MI_IRQ;
  200. mis_data.val = mi_mis;
  201. isp_irq_write_circle_queue(&mis_data, &pisp_dev->circle_list);
  202. }
  203. if (isp_mis) {
  204. isp_mis_t mis_data;
  205. mis_data.irq_src = SRC_ISP_IRQ;
  206. mis_data.val = isp_mis;
  207. pisp_dev->isp_mis = isp_mis;
  208. isp_irq_write_circle_queue(&mis_data, &pisp_dev->circle_list);
  209. isp_write_reg(pisp_dev, REG_ADDR(isp_icr), isp_mis);
  210. if(isp_mis & MRV_ISP_MIS_ISP_OFF_MASK) {
  211. isp_write_reg(pisp_dev, REG_ADDR(isp_imsc), isp_read_reg(pisp_dev, REG_ADDR(isp_imsc))&(~MRV_ISP_MIS_ISP_OFF_MASK));
  212. }
  213. }
  214. if (isp_mis != 0 ||mi_mis != 0 ) {
  215. schedule_work(&pdriver_dev->vvnative_wq);
  216. } else {
  217. return IRQ_HANDLED; // return IRQ_NONE;
  218. }
  219. return IRQ_HANDLED;
  220. }
  221. static irqreturn_t vvcam_mi_irq(int irq, void *dev_id)
  222. {
  223. struct vvcam_isp_driver_dev *pdriver_dev ;
  224. struct isp_ic_dev * pisp_dev;
  225. u32 mi_mis, mi_mis_addr, mi_icr_addr;
  226. #ifdef ISP_MIV2
  227. u32 miv2_mis1, miv2_mis3;
  228. #endif
  229. #if defined(ISP_MI_PP_READ) || defined (ISP_3DNR_V3) || defined (ISP_MI_PP_WRITE) || defined (ISP_MI_HDR)
  230. u32 miv2_mis2;
  231. #endif
  232. pdriver_dev = (struct vvcam_isp_driver_dev *)dev_id;
  233. pisp_dev = pdriver_dev->private;
  234. #ifdef ISP_MIV2
  235. mi_icr_addr = REG_ADDR(miv2_icr);
  236. mi_mis_addr = REG_ADDR(miv2_mis);
  237. miv2_mis1 = isp_read_reg(pisp_dev, REG_ADDR(miv2_mis1));
  238. if (miv2_mis1) {
  239. /*pr_info("%s mi mis1 0x%08x\n", __func__, miv2_mis1);*/
  240. isp_write_reg(pisp_dev, REG_ADDR(miv2_icr1), miv2_mis1);
  241. }
  242. /*u32 miv2_mis3 = isp_read_reg(pisp_dev, REG_ADDR(miv2_mis3));
  243. if (miv2_mis3) {
  244. pr_info("%s mi mis3 0x%08x\n", __func__, miv2_mis3);
  245. isp_write_reg(pisp_dev, REG_ADDR(miv2_icr3), miv2_mis3);
  246. }*/
  247. #elif defined(ISP_MIV1)
  248. mi_icr_addr = REG_ADDR(mi_icr);
  249. mi_mis_addr = REG_ADDR(mi_mis);
  250. #endif
  251. mi_mis = isp_read_reg(pisp_dev, mi_mis_addr);
  252. #if defined(ISP_MI_PP_READ) || defined (ISP_3DNR_V3) || defined (ISP_MI_PP_WRITE) || defined (ISP_MI_HDR)
  253. miv2_mis2 = isp_read_reg(pisp_dev, REG_ADDR(miv2_mis2));
  254. miv2_mis2 &= (~PPW_FRAME_END_MASK);
  255. /*pr_info("%s isp mis 0x%08x, mi mis 0x%08x post mis 0x%08x\n", __func__, \
  256. isp_mis, mi_mis, miv2_mis2);*/
  257. #else
  258. /*pr_info("%s isp mis 0x%08x, mi mis 0x%08x\n", __func__, \
  259. isp_mis, mi_mis);*/
  260. #endif
  261. if (mi_mis) {
  262. isp_mis_t mis_data;
  263. mis_data.irq_src = SRC_MI_IRQ;
  264. mis_data.val = mi_mis;
  265. isp_irq_write_circle_queue(&mis_data, &pisp_dev->circle_list);
  266. isp_write_reg(pisp_dev, mi_icr_addr, mi_mis);
  267. }
  268. #ifdef ISP_MIV2
  269. if (miv2_mis1) {
  270. isp_mis_t mis_data;
  271. mis_data.irq_src = SRC_MI1_IRQ;
  272. mis_data.val = mi_mis;
  273. isp_irq_write_circle_queue(&mis_data, &pisp_dev->circle_list);
  274. isp_write_reg(pisp_dev, mi_icr_addr, mi_mis);
  275. }
  276. #endif
  277. #if defined(ISP_MI_PP_READ) || defined (ISP_3DNR_V3) || defined (ISP_MI_PP_WRITE) || defined (ISP_MI_HDR)
  278. if (miv2_mis2) {
  279. isp_mis_t mis_data;
  280. mis_data.irq_src = SRC_MI2_IRQ;
  281. mis_data.val = miv2_mis2;
  282. isp_irq_write_circle_queue(&mis_data, &pisp_dev->circle_list);
  283. isp_write_reg(pisp_dev, REG_ADDR(miv2_icr2), miv2_mis2);
  284. }
  285. #endif
  286. #if defined(ISP_MI_PP_READ) || defined (ISP_3DNR_V3) || defined (ISP_MI_PP_WRITE) || defined (ISP_MI_HDR)
  287. if (mi_mis != 0 || miv2_mis2 != 0) {
  288. #else
  289. if (mi_mis != 0 ) {
  290. #endif
  291. schedule_work(&pdriver_dev->vvnative_wq);
  292. } else {
  293. return IRQ_HANDLED;
  294. }
  295. return IRQ_HANDLED;
  296. }
  297. static int vvcam_isp_runtime_suspend(struct device *dev)
  298. {
  299. struct vvcam_isp_driver_dev *pdriver_dev = dev_get_drvdata(dev);
  300. clk_disable_unprepare(pdriver_dev->aclk);
  301. clk_disable_unprepare(pdriver_dev->hclk);
  302. clk_disable_unprepare(pdriver_dev->isp0_pclk);
  303. clk_disable_unprepare(pdriver_dev->cclk);
  304. if (!IS_ERR_OR_NULL(pdriver_dev->isp1_pclk)) {
  305. clk_disable_unprepare(pdriver_dev->isp1_pclk);
  306. }
  307. pr_info("isp %s\n", __func__);
  308. return 0;
  309. }
  310. static int vvcam_isp_runtime_resume(struct device *dev)
  311. {
  312. struct vvcam_isp_driver_dev *pdriver_dev = dev_get_drvdata(dev);
  313. int ret = 0;
  314. ret = clk_prepare_enable(pdriver_dev->isp0_pclk);
  315. if (ret < 0) {
  316. dev_err(dev, "could not prepare or enable isp0 pixel clock\n");
  317. }
  318. ret = clk_prepare_enable(pdriver_dev->cclk);
  319. if (ret < 0) {
  320. dev_err(dev, "could not prepare or enable core clock\n");
  321. clk_disable_unprepare(pdriver_dev->isp0_pclk);
  322. //return ret;
  323. }
  324. ret = clk_prepare_enable(pdriver_dev->hclk);
  325. if (ret < 0) {
  326. dev_err(dev, "could not prepare or enable ahb clock\n");
  327. clk_disable_unprepare(pdriver_dev->isp0_pclk);
  328. clk_disable_unprepare(pdriver_dev->cclk);
  329. //return ret;
  330. }
  331. ret = clk_prepare_enable(pdriver_dev->aclk);
  332. if (ret < 0) {
  333. dev_err(dev, "could not prepare or enable axi clock\n");
  334. clk_disable_unprepare(pdriver_dev->isp0_pclk);
  335. clk_disable_unprepare(pdriver_dev->cclk);
  336. clk_disable_unprepare(pdriver_dev->hclk);
  337. //return ret;
  338. }
  339. if (IS_ERR(pdriver_dev->isp1_pclk)) {
  340. dev_err(dev, "isp1_pclk is null\n");
  341. } else {
  342. ret = clk_prepare_enable(pdriver_dev->isp1_pclk);
  343. if (ret < 0) {
  344. clk_disable_unprepare(pdriver_dev->isp0_pclk);
  345. clk_disable_unprepare(pdriver_dev->cclk);
  346. clk_disable_unprepare(pdriver_dev->hclk);
  347. dev_err(dev, "could not prepare or enable isp1 pixel clock\n");
  348. }
  349. }
  350. pr_info("%s isp Enabled clock\n", __func__);
  351. return ret;
  352. }
  353. static const struct dev_pm_ops vvcam_isp_runtime_pm_ops = {
  354. SET_RUNTIME_PM_OPS(vvcam_isp_runtime_suspend, vvcam_isp_runtime_resume, NULL)
  355. };
  356. int vvcam_free_isp_irq(struct isp_ic_dev *dev)
  357. {
  358. if (dev->irq_is_request[1] == 0) {
  359. return 0;
  360. }
  361. free_irq(dev->irq_num[1], dev->isp_driver_dev);
  362. dev->irq_is_request[1] = 0;
  363. pr_info("%s isp free irq\n", __func__);
  364. return 0;
  365. }
  366. int vvcam_request_isp_irq(struct isp_ic_dev *dev)
  367. {
  368. if (dev->irq_is_request[1] == 1) {
  369. return 0;
  370. }
  371. uint32_t irq_mask0 = isp_read_reg(dev, REG_ADDR(miv2_imsc));
  372. uint32_t irq_mask1 = isp_read_reg(dev, REG_ADDR(miv2_imsc1));
  373. uint32_t irq_mask2 = isp_read_reg(dev, REG_ADDR(miv2_imsc2));
  374. isp_write_reg(dev, REG_ADDR(miv2_icr), 0xfffffff);
  375. isp_write_reg(dev, REG_ADDR(miv2_icr1), 0xfffffff);
  376. isp_write_reg(dev, REG_ADDR(miv2_icr2), 0xfffffff);
  377. int ret = devm_request_irq(dev->device, dev->irq_num[1], vvcam_mi_irq,
  378. IRQF_TRIGGER_RISING, "MI_IRQ", (char *)dev->isp_driver_dev);
  379. if (ret) {
  380. pr_err("%s, %d:request irq error, 0x%lx!\n", __func__, __LINE__, ret);
  381. return ret;
  382. }
  383. isp_write_reg(dev, REG_ADDR(miv2_imsc), irq_mask0);
  384. isp_write_reg(dev, REG_ADDR(miv2_imsc1), irq_mask1);
  385. isp_write_reg(dev, REG_ADDR(miv2_imsc2), irq_mask2);
  386. dev->irq_is_request[1] = 1;
  387. pr_info("%s isp request irq\n", __func__);
  388. return ret;
  389. }
  390. static int vvcam_isp_open(struct inode * inode, struct file * file)
  391. {
  392. struct vvcam_isp_driver_dev *pdriver_dev;
  393. struct isp_ic_dev * pisp_dev;
  394. int ret = 0;
  395. pdriver_dev = container_of(inode->i_cdev, struct vvcam_isp_driver_dev, cdev);
  396. file->private_data = pdriver_dev;
  397. pisp_dev = pdriver_dev->private;
  398. struct device *dev = &pdriver_dev->pdev->dev;
  399. isp_irq_reset_circle_queue(&(pisp_dev->circle_list));
  400. if (pm_runtime_get_sync(dev)) {
  401. ret = vvcam_isp_runtime_resume(dev);
  402. if (ret)
  403. pr_err("fail to resume isp %s %d\n", __func__, __LINE__);
  404. }
  405. return 0;
  406. };
  407. static long vvcam_isp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  408. {
  409. long ret = 0;
  410. struct vvcam_isp_driver_dev *pdriver_dev;
  411. struct isp_ic_dev * pisp_dev;
  412. pdriver_dev = file->private_data;
  413. if (pdriver_dev == NULL)
  414. {
  415. pr_err("%s:file private is null point error\n", __func__);
  416. return -ENOMEM;
  417. }
  418. pisp_dev = pdriver_dev->private;
  419. //pr_info("%s:isp[%d] pdriver_dev =0x%px\n", __func__,pdriver_dev->device_idx,pdriver_dev);
  420. //pr_info("%s:pisp_dev =0x%px\n", __func__,pisp_dev);
  421. mutex_lock(&pdriver_dev->vvmutex);
  422. ret = isp_priv_ioctl(pisp_dev, cmd ,(void __user *)arg);
  423. mutex_unlock(&pdriver_dev->vvmutex);
  424. return ret;
  425. };
  426. static int vvcam_isp_release(struct inode * inode, struct file * file)
  427. {
  428. int ret = 0;
  429. struct vvcam_isp_driver_dev *pdriver_dev;
  430. struct isp_ic_dev *pisp_dev;
  431. pr_info("enter %s\n", __func__);
  432. if ((inode == NULL) || (file == NULL) ) {
  433. pr_info("%s: %dx\n", __func__, __LINE__);
  434. return 0;
  435. }
  436. pdriver_dev = container_of(inode->i_cdev, struct vvcam_isp_driver_dev, cdev);
  437. struct device *dev = &pdriver_dev->pdev->dev;
  438. file->private_data = pdriver_dev;
  439. pisp_dev = pdriver_dev->private;
  440. isp_force_stop(pisp_dev);
  441. if (pisp_dev->ut_addr != NULL) {
  442. #define UT_USED_SIZE 0x01000000
  443. dma_free_coherent(dev, UT_USED_SIZE,
  444. pisp_dev->ut_addr, pisp_dev->ut_phy_addr);
  445. pisp_dev->ut_addr = NULL;
  446. }
  447. ret = pm_runtime_put_sync(dev);
  448. if (ret) {
  449. pr_err("fail to suspen isp %s %d ret = %d\n", __func__, __LINE__, ret);
  450. }
  451. pr_info("exit %s\n", __func__);
  452. return 0;
  453. };
  454. static int vvcam_isp_mmap(struct file *pFile, struct vm_area_struct *vma)
  455. {
  456. int ret = 0;
  457. ulong phy_base_addr = 0;
  458. unsigned long pfn_start = (phy_base_addr >> PAGE_SHIFT) + vma->vm_pgoff;
  459. unsigned long size = vma->vm_end - vma->vm_start;
  460. /*pr_info("phy: 0x%lx, size: 0x%lx\n", pfn_start << PAGE_SHIFT, size);*/
  461. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  462. if (remap_pfn_range(vma, vma->vm_start,pfn_start,size, vma->vm_page_prot))
  463. {
  464. pr_err("-->%s: remap_pfn_range error!\n", __func__);
  465. return -EIO;
  466. }
  467. return ret;
  468. };
  469. static struct file_operations vvcam_isp_fops = {
  470. .owner = THIS_MODULE,
  471. .open = vvcam_isp_open,
  472. .release = vvcam_isp_release,
  473. .unlocked_ioctl = vvcam_isp_ioctl,
  474. .mmap = vvcam_isp_mmap,
  475. .poll = vvnative_isp_poll,
  476. };
  477. static int vvcam_isp_probe(struct platform_device *pdev)
  478. {
  479. int ret = 0;
  480. struct device_node *np;
  481. struct vvcam_isp_driver_dev *pdriver_dev;
  482. struct isp_ic_dev * pisp_dev;
  483. struct resource *mem;
  484. pr_info("enter %s\n", __func__);
  485. pdev->id = devise_register_index;
  486. if (pdev->id >= VIVCAM_ISP_MAXCNT)
  487. {
  488. pr_err("%s:pdev id is %d error\n", __func__,pdev->id);
  489. return -EINVAL;
  490. }
  491. pdriver_dev = devm_kzalloc(&pdev->dev,sizeof(struct vvcam_isp_driver_dev), GFP_KERNEL);
  492. if (pdriver_dev == NULL)
  493. {
  494. pr_err("%s:alloc struct vvcam_isp_driver_dev error\n", __func__);
  495. return -ENOMEM;
  496. }
  497. memset(pdriver_dev,0,sizeof(struct vvcam_isp_driver_dev ));
  498. pr_info("%s:isp[%d]: pdriver_dev =0x%px\n", __func__,pdev->id,pdriver_dev);
  499. pisp_dev = devm_kzalloc(&pdev->dev,sizeof(struct isp_ic_dev), GFP_KERNEL);
  500. if (pisp_dev == NULL)
  501. {
  502. pr_err("%s:alloc struct isp_ic_dev error\n", __func__);
  503. return -ENOMEM;
  504. }
  505. memset(pisp_dev,0,sizeof(struct isp_ic_dev ));
  506. isp_irq_create_circle_queue(&(pisp_dev->circle_list), QUEUE_NODE_COUNT);
  507. pr_info("%s:isp[%d]: psensor_dev =0x%px\n", __func__,pdev->id,pisp_dev);
  508. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  509. pisp_dev->base = devm_ioremap_resource(&pdev->dev, mem);
  510. if (IS_ERR(pisp_dev->base))
  511. return PTR_ERR(pisp_dev->base);
  512. pr_info("%s:isp[%d]: pisp_dev->base=0x%px, phy_addr base=0x%llx\n", __func__,
  513. pdev->id, pisp_dev->base, mem->start);
  514. pisp_dev->reset = NULL;
  515. pisp_dev->device = &pdev->dev;
  516. pdriver_dev->private = pisp_dev;
  517. pdriver_dev->device_idx = pdev->id;
  518. mutex_init(&pdriver_dev->vvmutex);
  519. frame_mark_t *frame_mark = dma_alloc_coherent(&pdev->dev, sizeof(frame_mark_t),
  520. &pisp_dev->frame_mark_info_addr, GFP_KERNEL);
  521. if (frame_mark == NULL ) {
  522. pr_err("dma_alloc_coherent error\n");
  523. return -1;
  524. }
  525. pr_info("isp_frame_mark_info_addr = 0x%lx\n", pisp_dev->frame_mark_info_addr);
  526. memset(frame_mark, 0, sizeof(frame_mark_t));
  527. pdriver_dev->frame_mark = frame_mark;
  528. platform_set_drvdata(pdev, pdriver_dev);
  529. pdriver_dev->pdev = pdev;
  530. pisp_dev->irq_num[0] = platform_get_irq(pdev, 0);
  531. if (pisp_dev->irq_num[0] == 0) {
  532. pr_err("%s:isp[%d]: could not map IRQ\n", __func__, pdev->id);
  533. dev_err(&pdev->dev, "could not map IRQ.\n");
  534. return -ENXIO;
  535. }
  536. pr_info("%s:isp[%d]: pisp_dev->irq_num[0]=%d\n", __func__, pdev->id, pisp_dev->irq_num[0]);
  537. pisp_dev->irq_num[1] = platform_get_irq(pdev, 1);
  538. if (pisp_dev->irq_num[1] == 0) {
  539. pr_err("%s:isp[%d]: could not map IRQ\n", __func__, pdev->id);
  540. dev_err(&pdev->dev, "could not map IRQ.\n");
  541. return -ENXIO;
  542. }
  543. pr_info("%s:isp[%d]: pisp_dev->irq_num[1]=%d\n", __func__, pdev->id, pisp_dev->irq_num[1]);
  544. /*init work queue*/
  545. INIT_WORK(&pdriver_dev->vvnative_wq, vvnative_isp_work);
  546. ret = devm_request_irq(&pdev->dev, pisp_dev->irq_num[0], vvcam_isp_irq,
  547. IRQF_TRIGGER_RISING | IRQF_SHARED, "ISP_IRQ", (char *)pdriver_dev);
  548. if (ret) {
  549. pr_err("%s[%d]:request irq error!\n", __func__, __LINE__);
  550. return ret;
  551. }
  552. pisp_dev->irq_is_request[0] = 1;
  553. pisp_dev->isp_driver_dev = pdriver_dev;
  554. ret = devm_request_irq(&pdev->dev, pisp_dev->irq_num[1], vvcam_mi_irq,
  555. IRQF_TRIGGER_RISING, "MI_IRQ", (char *)pdriver_dev);
  556. if (ret) {
  557. pr_err("%s[%d]:request irq error!\n", __func__, __LINE__);
  558. return ret;
  559. }
  560. pisp_dev->irq_is_request[1] = 1;
  561. init_waitqueue_head(&pdriver_dev->irq_wait);
  562. /*parse clk info from dts*/
  563. pdriver_dev->aclk = devm_clk_get(&pdev->dev, "aclk");
  564. if (IS_ERR(pdriver_dev->aclk)) {
  565. dev_err(&pdev->dev, "failed to get aclk");
  566. //return -1;
  567. }
  568. pdriver_dev->hclk = devm_clk_get(&pdev->dev, "hclk");
  569. if (IS_ERR(pdriver_dev->hclk)) {
  570. dev_err(&pdev->dev, "failed to get hclk");
  571. //return -1;
  572. }
  573. pdriver_dev->isp0_pclk = devm_clk_get(&pdev->dev, "isp0_pclk");
  574. if (IS_ERR(pdriver_dev->isp0_pclk)) {
  575. dev_err(&pdev->dev, "failed to get isp0_pclk");
  576. //return -1;
  577. }
  578. pdriver_dev->cclk = devm_clk_get(&pdev->dev, "cclk");
  579. if (IS_ERR(pdriver_dev->cclk)) {
  580. dev_err(&pdev->dev, "failed to get core_clk");
  581. //return -1;
  582. }
  583. if (pdriver_dev->device_idx == 1) {
  584. pdriver_dev->isp1_pclk = devm_clk_get(&pdev->dev, "isp1_pclk");
  585. if (IS_ERR(pdriver_dev->isp1_pclk)) {
  586. dev_err(&pdev->dev, "failed to get isp1_pclk");
  587. //return -1;
  588. }
  589. }
  590. if ((devise_register_index == 0)) {
  591. int ret;
  592. if (vvcam_isp_major == 0) {
  593. ret = alloc_chrdev_region(&pdriver_dev->devt, 0, VIVCAM_ISP_MAXCNT, VIVCAM_ISP_NAME);
  594. if (ret != 0)
  595. {
  596. pr_err("%s:alloc_chrdev_region error\n", __func__);
  597. return ret;
  598. }
  599. vvcam_isp_major = MAJOR(pdriver_dev->devt);
  600. vvcam_isp_minor = MINOR(pdriver_dev->devt);
  601. }
  602. else
  603. {
  604. pdriver_dev->devt = MKDEV(vvcam_isp_major, vvcam_isp_minor);
  605. ret = register_chrdev_region(pdriver_dev->devt, VIVCAM_ISP_MAXCNT, VIVCAM_ISP_NAME);
  606. if (ret)
  607. {
  608. pr_err("%s:register_chrdev_region error\n", __func__);
  609. return ret;
  610. }
  611. }
  612. vvcam_isp_class = class_create(THIS_MODULE, VIVCAM_ISP_NAME);
  613. if (IS_ERR(vvcam_isp_class))
  614. {
  615. pr_err("%s[%d]:class_create error!\n", __func__, __LINE__);
  616. return -EINVAL;
  617. }
  618. }
  619. pdriver_dev->devt = MKDEV(vvcam_isp_major, vvcam_isp_minor + pdev->id);
  620. cdev_init(&pdriver_dev->cdev, &vvcam_isp_fops);
  621. ret = cdev_add(&pdriver_dev->cdev, pdriver_dev->devt, 1);
  622. if ( ret )
  623. {
  624. pr_err("%s[%d]:cdev_add error!\n", __func__, __LINE__);
  625. return ret;
  626. }
  627. pdriver_dev->class = vvcam_isp_class;
  628. device_create(pdriver_dev->class, NULL, pdriver_dev->devt,
  629. pdriver_dev, "%s%d", VIVCAM_ISP_NAME, pdev->id);
  630. struct device *dev = &pdriver_dev->pdev->dev;
  631. pm_runtime_enable(dev);
  632. ret = pm_runtime_resume_and_get(dev);
  633. if (ret < 0) {
  634. dev_err(dev, "fail to resume isp\n");
  635. }
  636. ret = pm_runtime_put_sync(dev);
  637. if (ret < 0) {
  638. dev_err(dev, "fail to suspend isp\n");
  639. }
  640. devise_register_index++;
  641. pr_info("exit %s\n", __func__);
  642. return ret;
  643. }
  644. static int vvcam_isp_remove(struct platform_device *pdev)
  645. {
  646. struct vvcam_isp_driver_dev *pdriver_dev;
  647. struct isp_ic_dev * pisp_dev;
  648. pr_info("enter %s\n", __func__);
  649. devise_register_index--;
  650. pdriver_dev = platform_get_drvdata(pdev);
  651. pisp_dev = pdriver_dev->private;
  652. dma_free_coherent(&pdev->dev, sizeof(*pdriver_dev->frame_mark),
  653. pdriver_dev->frame_mark, pisp_dev->frame_mark_info_addr);
  654. if (pisp_dev->ut_addr != NULL) {
  655. #define UT_USED_SIZE 0x01000000
  656. dma_free_coherent(&pdev->dev, UT_USED_SIZE,
  657. pisp_dev->ut_addr, pisp_dev->ut_phy_addr);
  658. pisp_dev->ut_addr =NULL;
  659. }
  660. free_irq(pisp_dev->irq_num[0], pdriver_dev);
  661. free_irq(pisp_dev->irq_num[1], pdriver_dev);
  662. pisp_dev->irq_is_request[0] = 0;
  663. pisp_dev->irq_is_request[1] = 0;
  664. isp_irq_destroy_circle_queue(&(pisp_dev->circle_list));
  665. struct device *dev = &pdev->dev;
  666. pm_runtime_disable(dev);
  667. cdev_del(&pdriver_dev->cdev);
  668. device_destroy(pdriver_dev->class, pdriver_dev->devt);
  669. unregister_chrdev_region(pdriver_dev->devt, VIVCAM_ISP_MAXCNT);
  670. if (devise_register_index == 0)
  671. {
  672. class_destroy(pdriver_dev->class);
  673. }
  674. return 0;
  675. }
  676. static const struct of_device_id isp_of_match[] = {
  677. { .compatible = "thead,light-isp", },
  678. { /* sentinel */ },
  679. };
  680. static struct platform_driver vvcam_isp_driver = {
  681. .probe = vvcam_isp_probe,
  682. .remove = vvcam_isp_remove,
  683. .driver = {
  684. .name = VIVCAM_ISP_NAME,
  685. .owner = THIS_MODULE,
  686. .of_match_table = of_match_ptr(isp_of_match),
  687. .pm = &vvcam_isp_runtime_pm_ops,
  688. }
  689. };
  690. static int __init vvcam_isp_init_module(void)
  691. {
  692. int ret = 0;
  693. pr_info("enter %s\n", __func__);
  694. ret = platform_driver_register(&vvcam_isp_driver);
  695. if (ret)
  696. {
  697. pr_err("register platform driver failed.\n");
  698. return ret;
  699. }
  700. return ret;
  701. }
  702. static void __exit vvcam_isp_exit_module(void)
  703. {
  704. pr_info("enter %s\n", __func__);
  705. platform_driver_unregister(&vvcam_isp_driver);
  706. }
  707. module_init(vvcam_isp_init_module);
  708. module_exit(vvcam_isp_exit_module);
  709. MODULE_DESCRIPTION("ISP");
  710. MODULE_LICENSE("GPL");