isp_compand.c 6.6 KB

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  1. /****************************************************************************
  2. *
  3. * The MIT License (MIT)
  4. *
  5. * Copyright (c) 2020 VeriSilicon Holdings Co., Ltd.
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a
  8. * copy of this software and associated documentation files (the "Software"),
  9. * to deal in the Software without restriction, including without limitation
  10. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11. * and/or sell copies of the Software, and to permit persons to whom the
  12. * Software is furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in
  15. * all copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  20. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. *****************************************************************************
  26. *
  27. * The GPL License (GPL)
  28. *
  29. * Copyright (c) 2020 VeriSilicon Holdings Co., Ltd.
  30. *
  31. * This program is free software; you can redistribute it and/or
  32. * modify it under the terms of the GNU General Public License
  33. * as published by the Free Software Foundation; either version 2
  34. * of the License, or (at your option) any later version.
  35. *
  36. * This program is distributed in the hope that it will be useful,
  37. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  38. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  39. * GNU General Public License for more details.
  40. *
  41. * You should have received a copy of the GNU General Public License
  42. * along with this program;
  43. *
  44. *****************************************************************************
  45. *
  46. * Note: This software is released under dual MIT and GPL licenses. A
  47. * recipient may use this file under the terms of either the MIT license or
  48. * GPL License. If you wish to use only one license not the other, you can
  49. * indicate your decision by deleting one of the above license notices in your
  50. * version of this file.
  51. *
  52. *****************************************************************************/
  53. #ifdef __KERNEL__
  54. #include <linux/io.h>
  55. #include <linux/module.h>
  56. #endif
  57. #include "mrv_all_bits.h"
  58. #include "isp_ioctl.h"
  59. #include "isp_types.h"
  60. extern MrvAllRegister_t *all_regs;
  61. int isp_s_comp(struct isp_ic_dev *dev)
  62. {
  63. #ifndef ISP_COMPAND
  64. pr_err("unsupported function: %s", __func__);
  65. return -EINVAL;
  66. #else
  67. struct isp_comp_context *comp = &dev->comp;
  68. int ri, valr;
  69. uint32_t x_data;
  70. uint32_t y_data;
  71. u32 isp_compand_ctrl = isp_read_reg(dev, REG_ADDR(isp_compand_ctrl));
  72. /*pr_debug("enter %s\n", __func__);*/
  73. if (comp->bls.enable) {
  74. isp_write_reg(dev, REG_ADDR(isp_compand_bls_a_fixed), comp->bls.a << (20 - comp->bls.bit_width));
  75. isp_write_reg(dev, REG_ADDR(isp_compand_bls_b_fixed), comp->bls.b << (20 - comp->bls.bit_width));
  76. isp_write_reg(dev, REG_ADDR(isp_compand_bls_c_fixed), comp->bls.c << (20 - comp->bls.bit_width));
  77. isp_write_reg(dev, REG_ADDR(isp_compand_bls_d_fixed), comp->bls.d << (20 - comp->bls.bit_width));
  78. }
  79. if (!comp->enable) {
  80. REG_SET_SLICE(isp_compand_ctrl, COMPAND_CTRL_BLS_ENABLE, 0);
  81. REG_SET_SLICE(isp_compand_ctrl, COMPAND_CTRL_COMPRESS_ENABLE, 0);
  82. REG_SET_SLICE(isp_compand_ctrl, COMPAND_CTRL_EXPAND_ENABLE, 0);
  83. isp_write_reg(dev, REG_ADDR(isp_compand_ctrl), isp_compand_ctrl);
  84. return 0;
  85. }
  86. if (comp->expand.enable && comp->expand.update_curve) {
  87. for (ri = 0; ri < 10; ri++) {
  88. valr = (comp->expand.px[ri * 6 + 0] + (20-comp->expand.in_bit)) |
  89. ((comp->expand.px[ri * 6 + 1] + (20-comp->expand.in_bit)) << 5) |
  90. ((comp->expand.px[ri * 6 + 2] + (20-comp->expand.in_bit)) << 10) |
  91. ((comp->expand.px[ri * 6 + 3] + (20-comp->expand.in_bit)) << 15) |
  92. ((comp->expand.px[ri * 6 + 4] + (20-comp->expand.in_bit)) << 20) |
  93. ((comp->expand.px[ri * 6 + 5] + (20-comp->expand.in_bit)) << 25);
  94. isp_write_reg(dev, REG_ADDR(isp_compand_expand_px_0) + ri * 4, valr);
  95. }
  96. valr = ( comp->expand.px[60] + (20-comp->expand.in_bit)) |
  97. ((comp->expand.px[61] + (20-comp->expand.in_bit)) << 5) |
  98. ((comp->expand.px[62] + (20-comp->expand.in_bit)) << 10) |
  99. ((comp->expand.px[63] + (20-comp->expand.in_bit)) << 15);
  100. isp_write_reg(dev, REG_ADDR(isp_compand_expand_px_10), valr);
  101. isp_write_reg(dev, REG_ADDR(isp_compand_expand_x_addr), 0x0);
  102. for (ri = 0; ri < 63; ri++) {
  103. x_data = (comp->expand.x_data[ri] << (20 - comp->expand.in_bit));
  104. isp_write_reg(dev, REG_ADDR(isp_compand_expand_x_write_data), x_data);
  105. }
  106. isp_write_reg(dev, REG_ADDR(isp_compand_expand_y_addr), 0x0);
  107. for (ri = 0; ri < 64; ri++) {
  108. y_data = (comp->expand.y_data[ri] << (20 - comp->expand.out_bit));
  109. isp_write_reg(dev, REG_ADDR(isp_compand_expand_y_write_data), y_data);
  110. }
  111. }
  112. if (comp->compress.enable && comp->compress.update_curve) {
  113. for (ri = 0; ri < 10; ri++) {
  114. valr = comp->compress.px[ri * 6 + 0] |
  115. (comp->compress.px[ri * 6 + 1] << 5) |
  116. (comp->compress.px[ri * 6 + 2] << 10) |
  117. (comp->compress.px[ri * 6 + 3] << 15) |
  118. (comp->compress.px[ri * 6 + 4] << 20) |
  119. (comp->compress.px[ri * 6 + 5] << 25);
  120. isp_write_reg(dev, REG_ADDR(isp_compand_compress_px_0) + ri * 4, valr);
  121. }
  122. valr = comp->compress.px[60] | (comp->compress.px[61] << 5) | (comp->compress.px[62] << 10) | (comp->compress.px[63] << 15);
  123. isp_write_reg(dev, REG_ADDR(isp_compand_compress_px_10), valr);
  124. isp_write_reg(dev, REG_ADDR(isp_compand_compress_x_addr), 0x0);
  125. for (ri = 0; ri < 63; ri++) {
  126. x_data = (comp->compress.x_data[ri] << (20 - comp->compress.in_bit));
  127. isp_write_reg(dev, REG_ADDR(isp_compand_compress_x_write_data), x_data);
  128. }
  129. isp_write_reg(dev, REG_ADDR(isp_compand_compress_y_addr), 0x0);
  130. for (ri = 0; ri < 64; ri++) {
  131. y_data = (comp->compress.y_data[ri] << (20 - comp->compress.out_bit));
  132. isp_write_reg(dev, REG_ADDR(isp_compand_compress_y_write_data), y_data);
  133. }
  134. }
  135. REG_SET_SLICE(isp_compand_ctrl, COMPAND_CTRL_BLS_ENABLE, comp->bls.enable);
  136. REG_SET_SLICE(isp_compand_ctrl, COMPAND_CTRL_COMPRESS_ENABLE, comp->compress.enable);
  137. REG_SET_SLICE(isp_compand_ctrl, COMPAND_CTRL_EXPAND_ENABLE, comp->expand.enable);
  138. REG_SET_SLICE(isp_compand_ctrl, COMPAND_CTRL_EXPAND_ENABLE, 0);
  139. isp_write_reg(dev, REG_ADDR(isp_compand_ctrl), isp_compand_ctrl);
  140. return 0;
  141. #endif
  142. }