memory.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2002
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. */
  6. #include <common.h>
  7. /* Memory test
  8. *
  9. * General observations:
  10. * o The recommended test sequence is to test the data lines: if they are
  11. * broken, nothing else will work properly. Then test the address
  12. * lines. Finally, test the cells in the memory now that the test
  13. * program knows that the address and data lines work properly.
  14. * This sequence also helps isolate and identify what is faulty.
  15. *
  16. * o For the address line test, it is a good idea to use the base
  17. * address of the lowest memory location, which causes a '1' bit to
  18. * walk through a field of zeros on the address lines and the highest
  19. * memory location, which causes a '0' bit to walk through a field of
  20. * '1's on the address line.
  21. *
  22. * o Floating buses can fool memory tests if the test routine writes
  23. * a value and then reads it back immediately. The problem is, the
  24. * write will charge the residual capacitance on the data bus so the
  25. * bus retains its state briefely. When the test program reads the
  26. * value back immediately, the capacitance of the bus can allow it
  27. * to read back what was written, even though the memory circuitry
  28. * is broken. To avoid this, the test program should write a test
  29. * pattern to the target location, write a different pattern elsewhere
  30. * to charge the residual capacitance in a differnt manner, then read
  31. * the target location back.
  32. *
  33. * o Always read the target location EXACTLY ONCE and save it in a local
  34. * variable. The problem with reading the target location more than
  35. * once is that the second and subsequent reads may work properly,
  36. * resulting in a failed test that tells the poor technician that
  37. * "Memory error at 00000000, wrote aaaaaaaa, read aaaaaaaa" which
  38. * doesn't help him one bit and causes puzzled phone calls. Been there,
  39. * done that.
  40. *
  41. * Data line test:
  42. * ---------------
  43. * This tests data lines for shorts and opens by forcing adjacent data
  44. * to opposite states. Because the data lines could be routed in an
  45. * arbitrary manner the must ensure test patterns ensure that every case
  46. * is tested. By using the following series of binary patterns every
  47. * combination of adjacent bits is test regardless of routing.
  48. *
  49. * ...101010101010101010101010
  50. * ...110011001100110011001100
  51. * ...111100001111000011110000
  52. * ...111111110000000011111111
  53. *
  54. * Carrying this out, gives us six hex patterns as follows:
  55. *
  56. * 0xaaaaaaaaaaaaaaaa
  57. * 0xcccccccccccccccc
  58. * 0xf0f0f0f0f0f0f0f0
  59. * 0xff00ff00ff00ff00
  60. * 0xffff0000ffff0000
  61. * 0xffffffff00000000
  62. *
  63. * To test for short and opens to other signals on our boards, we
  64. * simply test with the 1's complemnt of the paterns as well, resulting
  65. * in twelve patterns total.
  66. *
  67. * After writing a test pattern. a special pattern 0x0123456789ABCDEF is
  68. * written to a different address in case the data lines are floating.
  69. * Thus, if a byte lane fails, you will see part of the special
  70. * pattern in that byte lane when the test runs. For example, if the
  71. * xx__xxxxxxxxxxxx byte line fails, you will see aa23aaaaaaaaaaaa
  72. * (for the 'a' test pattern).
  73. *
  74. * Address line test:
  75. * ------------------
  76. * This function performs a test to verify that all the address lines
  77. * hooked up to the RAM work properly. If there is an address line
  78. * fault, it usually shows up as two different locations in the address
  79. * map (related by the faulty address line) mapping to one physical
  80. * memory storage location. The artifact that shows up is writing to
  81. * the first location "changes" the second location.
  82. *
  83. * To test all address lines, we start with the given base address and
  84. * xor the address with a '1' bit to flip one address line. For each
  85. * test, we shift the '1' bit left to test the next address line.
  86. *
  87. * In the actual code, we start with address sizeof(ulong) since our
  88. * test pattern we use is a ulong and thus, if we tried to test lower
  89. * order address bits, it wouldn't work because our pattern would
  90. * overwrite itself.
  91. *
  92. * Example for a 4 bit address space with the base at 0000:
  93. * 0000 <- base
  94. * 0001 <- test 1
  95. * 0010 <- test 2
  96. * 0100 <- test 3
  97. * 1000 <- test 4
  98. * Example for a 4 bit address space with the base at 0010:
  99. * 0010 <- base
  100. * 0011 <- test 1
  101. * 0000 <- (below the base address, skipped)
  102. * 0110 <- test 2
  103. * 1010 <- test 3
  104. *
  105. * The test locations are successively tested to make sure that they are
  106. * not "mirrored" onto the base address due to a faulty address line.
  107. * Note that the base and each test location are related by one address
  108. * line flipped. Note that the base address need not be all zeros.
  109. *
  110. * Memory tests 1-4:
  111. * -----------------
  112. * These tests verify RAM using sequential writes and reads
  113. * to/from RAM. There are several test cases that use different patterns to
  114. * verify RAM. Each test case fills a region of RAM with one pattern and
  115. * then reads the region back and compares its contents with the pattern.
  116. * The following patterns are used:
  117. *
  118. * 1a) zero pattern (0x00000000)
  119. * 1b) negative pattern (0xffffffff)
  120. * 1c) checkerboard pattern (0x55555555)
  121. * 1d) checkerboard pattern (0xaaaaaaaa)
  122. * 2) bit-flip pattern ((1 << (offset % 32))
  123. * 3) address pattern (offset)
  124. * 4) address pattern (~offset)
  125. *
  126. * Being run in normal mode, the test verifies only small 4Kb
  127. * regions of RAM around each 1Mb boundary. For example, for 64Mb
  128. * RAM the following areas are verified: 0x00000000-0x00000800,
  129. * 0x000ff800-0x00100800, 0x001ff800-0x00200800, ..., 0x03fff800-
  130. * 0x04000000. If the test is run in slow-test mode, it verifies
  131. * the whole RAM.
  132. */
  133. #include <post.h>
  134. #include <watchdog.h>
  135. #if CONFIG_POST & (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_MEM_REGIONS)
  136. DECLARE_GLOBAL_DATA_PTR;
  137. /*
  138. * Define INJECT_*_ERRORS for testing error detection in the presence of
  139. * _good_ hardware.
  140. */
  141. #undef INJECT_DATA_ERRORS
  142. #undef INJECT_ADDRESS_ERRORS
  143. #ifdef INJECT_DATA_ERRORS
  144. #warning "Injecting data line errors for testing purposes"
  145. #endif
  146. #ifdef INJECT_ADDRESS_ERRORS
  147. #warning "Injecting address line errors for testing purposes"
  148. #endif
  149. /*
  150. * This function performs a double word move from the data at
  151. * the source pointer to the location at the destination pointer.
  152. * This is helpful for testing memory on processors which have a 64 bit
  153. * wide data bus.
  154. *
  155. * On those PowerPC with FPU, use assembly and a floating point move:
  156. * this does a 64 bit move.
  157. *
  158. * For other processors, let the compiler generate the best code it can.
  159. */
  160. static void move64(const unsigned long long *src, unsigned long long *dest)
  161. {
  162. *dest = *src;
  163. }
  164. /*
  165. * This is 64 bit wide test patterns. Note that they reside in ROM
  166. * (which presumably works) and the tests write them to RAM which may
  167. * not work.
  168. *
  169. * The "otherpattern" is written to drive the data bus to values other
  170. * than the test pattern. This is for detecting floating bus lines.
  171. *
  172. */
  173. const static unsigned long long pattern[] = {
  174. 0xaaaaaaaaaaaaaaaaULL,
  175. 0xccccccccccccccccULL,
  176. 0xf0f0f0f0f0f0f0f0ULL,
  177. 0xff00ff00ff00ff00ULL,
  178. 0xffff0000ffff0000ULL,
  179. 0xffffffff00000000ULL,
  180. 0x00000000ffffffffULL,
  181. 0x0000ffff0000ffffULL,
  182. 0x00ff00ff00ff00ffULL,
  183. 0x0f0f0f0f0f0f0f0fULL,
  184. 0x3333333333333333ULL,
  185. 0x5555555555555555ULL
  186. };
  187. const unsigned long long otherpattern = 0x0123456789abcdefULL;
  188. static int memory_post_dataline(unsigned long long * pmem)
  189. {
  190. unsigned long long temp64 = 0;
  191. int num_patterns = ARRAY_SIZE(pattern);
  192. int i;
  193. unsigned int hi, lo, pathi, patlo;
  194. int ret = 0;
  195. for ( i = 0; i < num_patterns; i++) {
  196. move64(&(pattern[i]), pmem++);
  197. /*
  198. * Put a different pattern on the data lines: otherwise they
  199. * may float long enough to read back what we wrote.
  200. */
  201. move64(&otherpattern, pmem--);
  202. move64(pmem, &temp64);
  203. #ifdef INJECT_DATA_ERRORS
  204. temp64 ^= 0x00008000;
  205. #endif
  206. if (temp64 != pattern[i]){
  207. pathi = (pattern[i]>>32) & 0xffffffff;
  208. patlo = pattern[i] & 0xffffffff;
  209. hi = (temp64>>32) & 0xffffffff;
  210. lo = temp64 & 0xffffffff;
  211. post_log("Memory (data line) error at %08x, "
  212. "wrote %08x%08x, read %08x%08x !\n",
  213. pmem, pathi, patlo, hi, lo);
  214. ret = -1;
  215. }
  216. }
  217. return ret;
  218. }
  219. static int memory_post_addrline(ulong *testaddr, ulong *base, ulong size)
  220. {
  221. ulong *target;
  222. ulong *end;
  223. ulong readback;
  224. ulong xor;
  225. int ret = 0;
  226. end = (ulong *)((ulong)base + size); /* pointer arith! */
  227. xor = 0;
  228. for(xor = sizeof(ulong); xor > 0; xor <<= 1) {
  229. target = (ulong *)((ulong)testaddr ^ xor);
  230. if((target >= base) && (target < end)) {
  231. *testaddr = ~*target;
  232. readback = *target;
  233. #ifdef INJECT_ADDRESS_ERRORS
  234. if(xor == 0x00008000) {
  235. readback = *testaddr;
  236. }
  237. #endif
  238. if(readback == *testaddr) {
  239. post_log("Memory (address line) error at %08x<->%08x, "
  240. "XOR value %08x !\n",
  241. testaddr, target, xor);
  242. ret = -1;
  243. }
  244. }
  245. }
  246. return ret;
  247. }
  248. static int memory_post_test1(unsigned long start,
  249. unsigned long size,
  250. unsigned long val)
  251. {
  252. unsigned long i;
  253. ulong *mem = (ulong *) start;
  254. ulong readback;
  255. int ret = 0;
  256. for (i = 0; i < size / sizeof (ulong); i++) {
  257. mem[i] = val;
  258. if (i % 1024 == 0)
  259. WATCHDOG_RESET();
  260. }
  261. for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
  262. readback = mem[i];
  263. if (readback != val) {
  264. post_log("Memory error at %08x, "
  265. "wrote %08x, read %08x !\n",
  266. mem + i, val, readback);
  267. ret = -1;
  268. break;
  269. }
  270. if (i % 1024 == 0)
  271. WATCHDOG_RESET();
  272. }
  273. return ret;
  274. }
  275. static int memory_post_test2(unsigned long start, unsigned long size)
  276. {
  277. unsigned long i;
  278. ulong *mem = (ulong *) start;
  279. ulong readback;
  280. int ret = 0;
  281. for (i = 0; i < size / sizeof (ulong); i++) {
  282. mem[i] = 1 << (i % 32);
  283. if (i % 1024 == 0)
  284. WATCHDOG_RESET();
  285. }
  286. for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
  287. readback = mem[i];
  288. if (readback != (1 << (i % 32))) {
  289. post_log("Memory error at %08x, "
  290. "wrote %08x, read %08x !\n",
  291. mem + i, 1 << (i % 32), readback);
  292. ret = -1;
  293. break;
  294. }
  295. if (i % 1024 == 0)
  296. WATCHDOG_RESET();
  297. }
  298. return ret;
  299. }
  300. static int memory_post_test3(unsigned long start, unsigned long size)
  301. {
  302. unsigned long i;
  303. ulong *mem = (ulong *) start;
  304. ulong readback;
  305. int ret = 0;
  306. for (i = 0; i < size / sizeof (ulong); i++) {
  307. mem[i] = i;
  308. if (i % 1024 == 0)
  309. WATCHDOG_RESET();
  310. }
  311. for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
  312. readback = mem[i];
  313. if (readback != i) {
  314. post_log("Memory error at %08x, "
  315. "wrote %08x, read %08x !\n",
  316. mem + i, i, readback);
  317. ret = -1;
  318. break;
  319. }
  320. if (i % 1024 == 0)
  321. WATCHDOG_RESET();
  322. }
  323. return ret;
  324. }
  325. static int memory_post_test4(unsigned long start, unsigned long size)
  326. {
  327. unsigned long i;
  328. ulong *mem = (ulong *) start;
  329. ulong readback;
  330. int ret = 0;
  331. for (i = 0; i < size / sizeof (ulong); i++) {
  332. mem[i] = ~i;
  333. if (i % 1024 == 0)
  334. WATCHDOG_RESET();
  335. }
  336. for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
  337. readback = mem[i];
  338. if (readback != ~i) {
  339. post_log("Memory error at %08x, "
  340. "wrote %08x, read %08x !\n",
  341. mem + i, ~i, readback);
  342. ret = -1;
  343. break;
  344. }
  345. if (i % 1024 == 0)
  346. WATCHDOG_RESET();
  347. }
  348. return ret;
  349. }
  350. static int memory_post_test_lines(unsigned long start, unsigned long size)
  351. {
  352. int ret = 0;
  353. ret = memory_post_dataline((unsigned long long *)start);
  354. WATCHDOG_RESET();
  355. if (!ret)
  356. ret = memory_post_addrline((ulong *)start, (ulong *)start,
  357. size);
  358. WATCHDOG_RESET();
  359. if (!ret)
  360. ret = memory_post_addrline((ulong *)(start+size-8),
  361. (ulong *)start, size);
  362. WATCHDOG_RESET();
  363. return ret;
  364. }
  365. static int memory_post_test_patterns(unsigned long start, unsigned long size)
  366. {
  367. int ret = 0;
  368. ret = memory_post_test1(start, size, 0x00000000);
  369. WATCHDOG_RESET();
  370. if (!ret)
  371. ret = memory_post_test1(start, size, 0xffffffff);
  372. WATCHDOG_RESET();
  373. if (!ret)
  374. ret = memory_post_test1(start, size, 0x55555555);
  375. WATCHDOG_RESET();
  376. if (!ret)
  377. ret = memory_post_test1(start, size, 0xaaaaaaaa);
  378. WATCHDOG_RESET();
  379. if (!ret)
  380. ret = memory_post_test2(start, size);
  381. WATCHDOG_RESET();
  382. if (!ret)
  383. ret = memory_post_test3(start, size);
  384. WATCHDOG_RESET();
  385. if (!ret)
  386. ret = memory_post_test4(start, size);
  387. WATCHDOG_RESET();
  388. return ret;
  389. }
  390. static int memory_post_test_regions(unsigned long start, unsigned long size)
  391. {
  392. unsigned long i;
  393. int ret = 0;
  394. for (i = 0; i < (size >> 20) && (!ret); i++) {
  395. if (!ret)
  396. ret = memory_post_test_patterns(start + (i << 20),
  397. 0x800);
  398. if (!ret)
  399. ret = memory_post_test_patterns(start + (i << 20) +
  400. 0xff800, 0x800);
  401. }
  402. return ret;
  403. }
  404. static int memory_post_tests(unsigned long start, unsigned long size)
  405. {
  406. int ret = 0;
  407. ret = memory_post_test_lines(start, size);
  408. if (!ret)
  409. ret = memory_post_test_patterns(start, size);
  410. return ret;
  411. }
  412. /*
  413. * !! this is only valid, if you have contiguous memory banks !!
  414. */
  415. __attribute__((weak))
  416. int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
  417. {
  418. bd_t *bd = gd->bd;
  419. *vstart = CONFIG_SYS_SDRAM_BASE;
  420. *size = (gd->ram_size >= 256 << 20 ?
  421. 256 << 20 : gd->ram_size) - (1 << 20);
  422. /* Limit area to be tested with the board info struct */
  423. if ((*vstart) + (*size) > (ulong)bd)
  424. *size = (ulong)bd - *vstart;
  425. return 0;
  426. }
  427. __attribute__((weak))
  428. int arch_memory_test_advance(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
  429. {
  430. return 1;
  431. }
  432. __attribute__((weak))
  433. int arch_memory_test_cleanup(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
  434. {
  435. return 0;
  436. }
  437. __attribute__((weak))
  438. void arch_memory_failure_handle(void)
  439. {
  440. return;
  441. }
  442. int memory_regions_post_test(int flags)
  443. {
  444. int ret = 0;
  445. phys_addr_t phys_offset = 0;
  446. u32 memsize, vstart;
  447. arch_memory_test_prepare(&vstart, &memsize, &phys_offset);
  448. ret = memory_post_test_lines(vstart, memsize);
  449. if (!ret)
  450. ret = memory_post_test_regions(vstart, memsize);
  451. return ret;
  452. }
  453. int memory_post_test(int flags)
  454. {
  455. int ret = 0;
  456. phys_addr_t phys_offset = 0;
  457. u32 memsize, vstart;
  458. arch_memory_test_prepare(&vstart, &memsize, &phys_offset);
  459. do {
  460. if (flags & POST_SLOWTEST) {
  461. ret = memory_post_tests(vstart, memsize);
  462. } else { /* POST_NORMAL */
  463. ret = memory_post_test_regions(vstart, memsize);
  464. }
  465. } while (!ret &&
  466. !arch_memory_test_advance(&vstart, &memsize, &phys_offset));
  467. arch_memory_test_cleanup(&vstart, &memsize, &phys_offset);
  468. if (ret)
  469. arch_memory_failure_handle();
  470. return ret;
  471. }
  472. #endif /* CONFIG_POST&(CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS) */