fdtdec.c 40 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. #ifndef USE_HOSTCC
  6. #include <common.h>
  7. #include <boot_fit.h>
  8. #include <dm.h>
  9. #include <dm/of_extra.h>
  10. #include <env.h>
  11. #include <errno.h>
  12. #include <fdtdec.h>
  13. #include <fdt_support.h>
  14. #include <gzip.h>
  15. #include <mapmem.h>
  16. #include <linux/libfdt.h>
  17. #include <serial.h>
  18. #include <asm/sections.h>
  19. #include <linux/ctype.h>
  20. #include <linux/lzo.h>
  21. DECLARE_GLOBAL_DATA_PTR;
  22. /*
  23. * Here are the type we know about. One day we might allow drivers to
  24. * register. For now we just put them here. The COMPAT macro allows us to
  25. * turn this into a sparse list later, and keeps the ID with the name.
  26. *
  27. * NOTE: This list is basically a TODO list for things that need to be
  28. * converted to driver model. So don't add new things here unless there is a
  29. * good reason why driver-model conversion is infeasible. Examples include
  30. * things which are used before driver model is available.
  31. */
  32. #define COMPAT(id, name) name
  33. static const char * const compat_names[COMPAT_COUNT] = {
  34. COMPAT(UNKNOWN, "<none>"),
  35. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  36. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  37. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  38. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  39. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  40. COMPAT(SMSC_LAN9215, "smsc,lan9215"),
  41. COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
  42. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  43. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  44. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  45. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  46. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  47. COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
  48. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  49. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  50. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  51. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  52. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  53. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  54. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  55. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  56. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  57. COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  58. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  59. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  60. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  61. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  62. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  63. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  64. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  65. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  66. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  67. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  68. COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
  69. };
  70. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  71. {
  72. /* We allow reading of the 'unknown' ID for testing purposes */
  73. assert(id >= 0 && id < COMPAT_COUNT);
  74. return compat_names[id];
  75. }
  76. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  77. const char *prop_name, int index, int na,
  78. int ns, fdt_size_t *sizep,
  79. bool translate)
  80. {
  81. const fdt32_t *prop, *prop_end;
  82. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  83. int len;
  84. fdt_addr_t addr;
  85. debug("%s: %s: ", __func__, prop_name);
  86. prop = fdt_getprop(blob, node, prop_name, &len);
  87. if (!prop) {
  88. debug("(not found)\n");
  89. return FDT_ADDR_T_NONE;
  90. }
  91. prop_end = prop + (len / sizeof(*prop));
  92. prop_addr = prop + (index * (na + ns));
  93. prop_size = prop_addr + na;
  94. prop_after_size = prop_size + ns;
  95. if (prop_after_size > prop_end) {
  96. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  97. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  98. return FDT_ADDR_T_NONE;
  99. }
  100. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  101. if (translate)
  102. addr = fdt_translate_address(blob, node, prop_addr);
  103. else
  104. #endif
  105. addr = fdtdec_get_number(prop_addr, na);
  106. if (sizep) {
  107. *sizep = fdtdec_get_number(prop_size, ns);
  108. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  109. (unsigned long long)*sizep);
  110. } else {
  111. debug("addr=%08llx\n", (unsigned long long)addr);
  112. }
  113. return addr;
  114. }
  115. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  116. int node, const char *prop_name,
  117. int index, fdt_size_t *sizep,
  118. bool translate)
  119. {
  120. int na, ns;
  121. debug("%s: ", __func__);
  122. na = fdt_address_cells(blob, parent);
  123. if (na < 1) {
  124. debug("(bad #address-cells)\n");
  125. return FDT_ADDR_T_NONE;
  126. }
  127. ns = fdt_size_cells(blob, parent);
  128. if (ns < 0) {
  129. debug("(bad #size-cells)\n");
  130. return FDT_ADDR_T_NONE;
  131. }
  132. debug("na=%d, ns=%d, ", na, ns);
  133. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  134. ns, sizep, translate);
  135. }
  136. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  137. const char *prop_name, int index,
  138. fdt_size_t *sizep,
  139. bool translate)
  140. {
  141. int parent;
  142. debug("%s: ", __func__);
  143. parent = fdt_parent_offset(blob, node);
  144. if (parent < 0) {
  145. debug("(no parent found)\n");
  146. return FDT_ADDR_T_NONE;
  147. }
  148. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  149. index, sizep, translate);
  150. }
  151. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  152. const char *prop_name, fdt_size_t *sizep)
  153. {
  154. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  155. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  156. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  157. ns, sizep, false);
  158. }
  159. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  160. {
  161. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  162. }
  163. #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
  164. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  165. {
  166. const char *list, *end;
  167. int len;
  168. list = fdt_getprop(blob, node, "compatible", &len);
  169. if (!list)
  170. return -ENOENT;
  171. end = list + len;
  172. while (list < end) {
  173. len = strlen(list);
  174. if (len >= strlen("pciVVVV,DDDD")) {
  175. char *s = strstr(list, "pci");
  176. /*
  177. * check if the string is something like pciVVVV,DDDD.RR
  178. * or just pciVVVV,DDDD
  179. */
  180. if (s && s[7] == ',' &&
  181. (s[12] == '.' || s[12] == 0)) {
  182. s += 3;
  183. *vendor = simple_strtol(s, NULL, 16);
  184. s += 5;
  185. *device = simple_strtol(s, NULL, 16);
  186. return 0;
  187. }
  188. }
  189. list += (len + 1);
  190. }
  191. return -ENOENT;
  192. }
  193. int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
  194. u32 *bar)
  195. {
  196. int barnum;
  197. /* extract the bar number from fdt_pci_addr */
  198. barnum = addr->phys_hi & 0xff;
  199. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  200. return -EINVAL;
  201. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  202. *bar = dm_pci_read_bar32(dev, barnum);
  203. return 0;
  204. }
  205. #endif
  206. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  207. uint64_t default_val)
  208. {
  209. const unaligned_fdt64_t *cell64;
  210. int length;
  211. cell64 = fdt_getprop(blob, node, prop_name, &length);
  212. if (!cell64 || length < sizeof(*cell64))
  213. return default_val;
  214. return fdt64_to_cpu(*cell64);
  215. }
  216. int fdtdec_get_is_enabled(const void *blob, int node)
  217. {
  218. const char *cell;
  219. /*
  220. * It should say "okay", so only allow that. Some fdts use "ok" but
  221. * this is a bug. Please fix your device tree source file. See here
  222. * for discussion:
  223. *
  224. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  225. */
  226. cell = fdt_getprop(blob, node, "status", NULL);
  227. if (cell)
  228. return strcmp(cell, "okay") == 0;
  229. return 1;
  230. }
  231. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  232. {
  233. enum fdt_compat_id id;
  234. /* Search our drivers */
  235. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  236. if (fdt_node_check_compatible(blob, node,
  237. compat_names[id]) == 0)
  238. return id;
  239. return COMPAT_UNKNOWN;
  240. }
  241. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  242. {
  243. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  244. }
  245. int fdtdec_next_compatible_subnode(const void *blob, int node,
  246. enum fdt_compat_id id, int *depthp)
  247. {
  248. do {
  249. node = fdt_next_node(blob, node, depthp);
  250. } while (*depthp > 1);
  251. /* If this is a direct subnode, and compatible, return it */
  252. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  253. blob, node, compat_names[id]))
  254. return node;
  255. return -FDT_ERR_NOTFOUND;
  256. }
  257. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  258. int *upto)
  259. {
  260. #define MAX_STR_LEN 20
  261. char str[MAX_STR_LEN + 20];
  262. int node, err;
  263. /* snprintf() is not available */
  264. assert(strlen(name) < MAX_STR_LEN);
  265. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  266. node = fdt_path_offset(blob, str);
  267. if (node < 0)
  268. return node;
  269. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  270. if (err < 0)
  271. return err;
  272. if (err)
  273. return -FDT_ERR_NOTFOUND;
  274. (*upto)++;
  275. return node;
  276. }
  277. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  278. enum fdt_compat_id id, int *node_list,
  279. int maxcount)
  280. {
  281. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  282. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  283. }
  284. /* TODO: Can we tighten this code up a little? */
  285. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  286. enum fdt_compat_id id, int *node_list,
  287. int maxcount)
  288. {
  289. int name_len = strlen(name);
  290. int nodes[maxcount];
  291. int num_found = 0;
  292. int offset, node;
  293. int alias_node;
  294. int count;
  295. int i, j;
  296. /* find the alias node if present */
  297. alias_node = fdt_path_offset(blob, "/aliases");
  298. /*
  299. * start with nothing, and we can assume that the root node can't
  300. * match
  301. */
  302. memset(nodes, '\0', sizeof(nodes));
  303. /* First find all the compatible nodes */
  304. for (node = count = 0; node >= 0 && count < maxcount;) {
  305. node = fdtdec_next_compatible(blob, node, id);
  306. if (node >= 0)
  307. nodes[count++] = node;
  308. }
  309. if (node >= 0)
  310. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  311. __func__, name);
  312. /* Now find all the aliases */
  313. for (offset = fdt_first_property_offset(blob, alias_node);
  314. offset > 0;
  315. offset = fdt_next_property_offset(blob, offset)) {
  316. const struct fdt_property *prop;
  317. const char *path;
  318. int number;
  319. int found;
  320. node = 0;
  321. prop = fdt_get_property_by_offset(blob, offset, NULL);
  322. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  323. if (prop->len && 0 == strncmp(path, name, name_len))
  324. node = fdt_path_offset(blob, prop->data);
  325. if (node <= 0)
  326. continue;
  327. /* Get the alias number */
  328. number = simple_strtoul(path + name_len, NULL, 10);
  329. if (number < 0 || number >= maxcount) {
  330. debug("%s: warning: alias '%s' is out of range\n",
  331. __func__, path);
  332. continue;
  333. }
  334. /* Make sure the node we found is actually in our list! */
  335. found = -1;
  336. for (j = 0; j < count; j++)
  337. if (nodes[j] == node) {
  338. found = j;
  339. break;
  340. }
  341. if (found == -1) {
  342. debug("%s: warning: alias '%s' points to a node "
  343. "'%s' that is missing or is not compatible "
  344. " with '%s'\n", __func__, path,
  345. fdt_get_name(blob, node, NULL),
  346. compat_names[id]);
  347. continue;
  348. }
  349. /*
  350. * Add this node to our list in the right place, and mark
  351. * it as done.
  352. */
  353. if (fdtdec_get_is_enabled(blob, node)) {
  354. if (node_list[number]) {
  355. debug("%s: warning: alias '%s' requires that "
  356. "a node be placed in the list in a "
  357. "position which is already filled by "
  358. "node '%s'\n", __func__, path,
  359. fdt_get_name(blob, node, NULL));
  360. continue;
  361. }
  362. node_list[number] = node;
  363. if (number >= num_found)
  364. num_found = number + 1;
  365. }
  366. nodes[found] = 0;
  367. }
  368. /* Add any nodes not mentioned by an alias */
  369. for (i = j = 0; i < maxcount; i++) {
  370. if (!node_list[i]) {
  371. for (; j < maxcount; j++)
  372. if (nodes[j] &&
  373. fdtdec_get_is_enabled(blob, nodes[j]))
  374. break;
  375. /* Have we run out of nodes to add? */
  376. if (j == maxcount)
  377. break;
  378. assert(!node_list[i]);
  379. node_list[i] = nodes[j++];
  380. if (i >= num_found)
  381. num_found = i + 1;
  382. }
  383. }
  384. return num_found;
  385. }
  386. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  387. int *seqp)
  388. {
  389. int base_len = strlen(base);
  390. const char *find_name;
  391. int find_namelen;
  392. int prop_offset;
  393. int aliases;
  394. find_name = fdt_get_name(blob, offset, &find_namelen);
  395. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  396. aliases = fdt_path_offset(blob, "/aliases");
  397. for (prop_offset = fdt_first_property_offset(blob, aliases);
  398. prop_offset > 0;
  399. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  400. const char *prop;
  401. const char *name;
  402. const char *slash;
  403. int len, val;
  404. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  405. debug(" - %s, %s\n", name, prop);
  406. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  407. strncmp(name, base, base_len))
  408. continue;
  409. slash = strrchr(prop, '/');
  410. if (strcmp(slash + 1, find_name))
  411. continue;
  412. val = trailing_strtol(name);
  413. if (val != -1) {
  414. *seqp = val;
  415. debug("Found seq %d\n", *seqp);
  416. return 0;
  417. }
  418. }
  419. debug("Not found\n");
  420. return -ENOENT;
  421. }
  422. int fdtdec_get_alias_highest_id(const void *blob, const char *base)
  423. {
  424. int base_len = strlen(base);
  425. int prop_offset;
  426. int aliases;
  427. int max = -1;
  428. debug("Looking for highest alias id for '%s'\n", base);
  429. aliases = fdt_path_offset(blob, "/aliases");
  430. for (prop_offset = fdt_first_property_offset(blob, aliases);
  431. prop_offset > 0;
  432. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  433. const char *prop;
  434. const char *name;
  435. int len, val;
  436. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  437. debug(" - %s, %s\n", name, prop);
  438. if (*prop != '/' || prop[len - 1] ||
  439. strncmp(name, base, base_len))
  440. continue;
  441. val = trailing_strtol(name);
  442. if (val > max) {
  443. debug("Found seq %d\n", val);
  444. max = val;
  445. }
  446. }
  447. return max;
  448. }
  449. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  450. {
  451. int chosen_node;
  452. if (!blob)
  453. return NULL;
  454. chosen_node = fdt_path_offset(blob, "/chosen");
  455. return fdt_getprop(blob, chosen_node, name, NULL);
  456. }
  457. int fdtdec_get_chosen_node(const void *blob, const char *name)
  458. {
  459. const char *prop;
  460. prop = fdtdec_get_chosen_prop(blob, name);
  461. if (!prop)
  462. return -FDT_ERR_NOTFOUND;
  463. return fdt_path_offset(blob, prop);
  464. }
  465. int fdtdec_check_fdt(void)
  466. {
  467. /*
  468. * We must have an FDT, but we cannot panic() yet since the console
  469. * is not ready. So for now, just assert(). Boards which need an early
  470. * FDT (prior to console ready) will need to make their own
  471. * arrangements and do their own checks.
  472. */
  473. assert(!fdtdec_prepare_fdt());
  474. return 0;
  475. }
  476. /*
  477. * This function is a little odd in that it accesses global data. At some
  478. * point if the architecture board.c files merge this will make more sense.
  479. * Even now, it is common code.
  480. */
  481. int fdtdec_prepare_fdt(void)
  482. {
  483. if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
  484. fdt_check_header(gd->fdt_blob)) {
  485. #ifdef CONFIG_SPL_BUILD
  486. puts("Missing DTB\n");
  487. #else
  488. puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
  489. # ifdef DEBUG
  490. if (gd->fdt_blob) {
  491. printf("fdt_blob=%p\n", gd->fdt_blob);
  492. print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
  493. 32, 0);
  494. }
  495. # endif
  496. #endif
  497. return -1;
  498. }
  499. return 0;
  500. }
  501. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  502. {
  503. const u32 *phandle;
  504. int lookup;
  505. debug("%s: %s\n", __func__, prop_name);
  506. phandle = fdt_getprop(blob, node, prop_name, NULL);
  507. if (!phandle)
  508. return -FDT_ERR_NOTFOUND;
  509. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  510. return lookup;
  511. }
  512. /**
  513. * Look up a property in a node and check that it has a minimum length.
  514. *
  515. * @param blob FDT blob
  516. * @param node node to examine
  517. * @param prop_name name of property to find
  518. * @param min_len minimum property length in bytes
  519. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  520. found, or -FDT_ERR_BADLAYOUT if not enough data
  521. * @return pointer to cell, which is only valid if err == 0
  522. */
  523. static const void *get_prop_check_min_len(const void *blob, int node,
  524. const char *prop_name, int min_len,
  525. int *err)
  526. {
  527. const void *cell;
  528. int len;
  529. debug("%s: %s\n", __func__, prop_name);
  530. cell = fdt_getprop(blob, node, prop_name, &len);
  531. if (!cell)
  532. *err = -FDT_ERR_NOTFOUND;
  533. else if (len < min_len)
  534. *err = -FDT_ERR_BADLAYOUT;
  535. else
  536. *err = 0;
  537. return cell;
  538. }
  539. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  540. u32 *array, int count)
  541. {
  542. const u32 *cell;
  543. int err = 0;
  544. debug("%s: %s\n", __func__, prop_name);
  545. cell = get_prop_check_min_len(blob, node, prop_name,
  546. sizeof(u32) * count, &err);
  547. if (!err) {
  548. int i;
  549. for (i = 0; i < count; i++)
  550. array[i] = fdt32_to_cpu(cell[i]);
  551. }
  552. return err;
  553. }
  554. int fdtdec_get_int_array_count(const void *blob, int node,
  555. const char *prop_name, u32 *array, int count)
  556. {
  557. const u32 *cell;
  558. int len, elems;
  559. int i;
  560. debug("%s: %s\n", __func__, prop_name);
  561. cell = fdt_getprop(blob, node, prop_name, &len);
  562. if (!cell)
  563. return -FDT_ERR_NOTFOUND;
  564. elems = len / sizeof(u32);
  565. if (count > elems)
  566. count = elems;
  567. for (i = 0; i < count; i++)
  568. array[i] = fdt32_to_cpu(cell[i]);
  569. return count;
  570. }
  571. const u32 *fdtdec_locate_array(const void *blob, int node,
  572. const char *prop_name, int count)
  573. {
  574. const u32 *cell;
  575. int err;
  576. cell = get_prop_check_min_len(blob, node, prop_name,
  577. sizeof(u32) * count, &err);
  578. return err ? NULL : cell;
  579. }
  580. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  581. {
  582. const s32 *cell;
  583. int len;
  584. debug("%s: %s\n", __func__, prop_name);
  585. cell = fdt_getprop(blob, node, prop_name, &len);
  586. return cell != NULL;
  587. }
  588. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  589. const char *list_name,
  590. const char *cells_name,
  591. int cell_count, int index,
  592. struct fdtdec_phandle_args *out_args)
  593. {
  594. const __be32 *list, *list_end;
  595. int rc = 0, size, cur_index = 0;
  596. uint32_t count = 0;
  597. int node = -1;
  598. int phandle;
  599. /* Retrieve the phandle list property */
  600. list = fdt_getprop(blob, src_node, list_name, &size);
  601. if (!list)
  602. return -ENOENT;
  603. list_end = list + size / sizeof(*list);
  604. /* Loop over the phandles until all the requested entry is found */
  605. while (list < list_end) {
  606. rc = -EINVAL;
  607. count = 0;
  608. /*
  609. * If phandle is 0, then it is an empty entry with no
  610. * arguments. Skip forward to the next entry.
  611. */
  612. phandle = be32_to_cpup(list++);
  613. if (phandle) {
  614. /*
  615. * Find the provider node and parse the #*-cells
  616. * property to determine the argument length.
  617. *
  618. * This is not needed if the cell count is hard-coded
  619. * (i.e. cells_name not set, but cell_count is set),
  620. * except when we're going to return the found node
  621. * below.
  622. */
  623. if (cells_name || cur_index == index) {
  624. node = fdt_node_offset_by_phandle(blob,
  625. phandle);
  626. if (!node) {
  627. debug("%s: could not find phandle\n",
  628. fdt_get_name(blob, src_node,
  629. NULL));
  630. goto err;
  631. }
  632. }
  633. if (cells_name) {
  634. count = fdtdec_get_int(blob, node, cells_name,
  635. -1);
  636. if (count == -1) {
  637. debug("%s: could not get %s for %s\n",
  638. fdt_get_name(blob, src_node,
  639. NULL),
  640. cells_name,
  641. fdt_get_name(blob, node,
  642. NULL));
  643. goto err;
  644. }
  645. } else {
  646. count = cell_count;
  647. }
  648. /*
  649. * Make sure that the arguments actually fit in the
  650. * remaining property data length
  651. */
  652. if (list + count > list_end) {
  653. debug("%s: arguments longer than property\n",
  654. fdt_get_name(blob, src_node, NULL));
  655. goto err;
  656. }
  657. }
  658. /*
  659. * All of the error cases above bail out of the loop, so at
  660. * this point, the parsing is successful. If the requested
  661. * index matches, then fill the out_args structure and return,
  662. * or return -ENOENT for an empty entry.
  663. */
  664. rc = -ENOENT;
  665. if (cur_index == index) {
  666. if (!phandle)
  667. goto err;
  668. if (out_args) {
  669. int i;
  670. if (count > MAX_PHANDLE_ARGS) {
  671. debug("%s: too many arguments %d\n",
  672. fdt_get_name(blob, src_node,
  673. NULL), count);
  674. count = MAX_PHANDLE_ARGS;
  675. }
  676. out_args->node = node;
  677. out_args->args_count = count;
  678. for (i = 0; i < count; i++) {
  679. out_args->args[i] =
  680. be32_to_cpup(list++);
  681. }
  682. }
  683. /* Found it! return success */
  684. return 0;
  685. }
  686. node = -1;
  687. list += count;
  688. cur_index++;
  689. }
  690. /*
  691. * Result will be one of:
  692. * -ENOENT : index is for empty phandle
  693. * -EINVAL : parsing error on data
  694. * [1..n] : Number of phandle (count mode; when index = -1)
  695. */
  696. rc = index < 0 ? cur_index : -ENOENT;
  697. err:
  698. return rc;
  699. }
  700. int fdtdec_get_child_count(const void *blob, int node)
  701. {
  702. int subnode;
  703. int num = 0;
  704. fdt_for_each_subnode(subnode, blob, node)
  705. num++;
  706. return num;
  707. }
  708. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  709. u8 *array, int count)
  710. {
  711. const u8 *cell;
  712. int err;
  713. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  714. if (!err)
  715. memcpy(array, cell, count);
  716. return err;
  717. }
  718. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  719. const char *prop_name, int count)
  720. {
  721. const u8 *cell;
  722. int err;
  723. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  724. if (err)
  725. return NULL;
  726. return cell;
  727. }
  728. int fdtdec_get_config_int(const void *blob, const char *prop_name,
  729. int default_val)
  730. {
  731. int config_node;
  732. debug("%s: %s\n", __func__, prop_name);
  733. config_node = fdt_path_offset(blob, "/config");
  734. if (config_node < 0)
  735. return default_val;
  736. return fdtdec_get_int(blob, config_node, prop_name, default_val);
  737. }
  738. int fdtdec_get_config_bool(const void *blob, const char *prop_name)
  739. {
  740. int config_node;
  741. const void *prop;
  742. debug("%s: %s\n", __func__, prop_name);
  743. config_node = fdt_path_offset(blob, "/config");
  744. if (config_node < 0)
  745. return 0;
  746. prop = fdt_get_property(blob, config_node, prop_name, NULL);
  747. return prop != NULL;
  748. }
  749. char *fdtdec_get_config_string(const void *blob, const char *prop_name)
  750. {
  751. const char *nodep;
  752. int nodeoffset;
  753. int len;
  754. debug("%s: %s\n", __func__, prop_name);
  755. nodeoffset = fdt_path_offset(blob, "/config");
  756. if (nodeoffset < 0)
  757. return NULL;
  758. nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
  759. if (!nodep)
  760. return NULL;
  761. return (char *)nodep;
  762. }
  763. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  764. {
  765. u64 number = 0;
  766. while (cells--)
  767. number = (number << 32) | fdt32_to_cpu(*ptr++);
  768. return number;
  769. }
  770. int fdt_get_resource(const void *fdt, int node, const char *property,
  771. unsigned int index, struct fdt_resource *res)
  772. {
  773. const fdt32_t *ptr, *end;
  774. int na, ns, len, parent;
  775. unsigned int i = 0;
  776. parent = fdt_parent_offset(fdt, node);
  777. if (parent < 0)
  778. return parent;
  779. na = fdt_address_cells(fdt, parent);
  780. ns = fdt_size_cells(fdt, parent);
  781. ptr = fdt_getprop(fdt, node, property, &len);
  782. if (!ptr)
  783. return len;
  784. end = ptr + len / sizeof(*ptr);
  785. while (ptr + na + ns <= end) {
  786. if (i == index) {
  787. res->start = fdtdec_get_number(ptr, na);
  788. res->end = res->start;
  789. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  790. return 0;
  791. }
  792. ptr += na + ns;
  793. i++;
  794. }
  795. return -FDT_ERR_NOTFOUND;
  796. }
  797. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  798. const char *prop_names, const char *name,
  799. struct fdt_resource *res)
  800. {
  801. int index;
  802. index = fdt_stringlist_search(fdt, node, prop_names, name);
  803. if (index < 0)
  804. return index;
  805. return fdt_get_resource(fdt, node, property, index, res);
  806. }
  807. static int decode_timing_property(const void *blob, int node, const char *name,
  808. struct timing_entry *result)
  809. {
  810. int length, ret = 0;
  811. const u32 *prop;
  812. prop = fdt_getprop(blob, node, name, &length);
  813. if (!prop) {
  814. debug("%s: could not find property %s\n",
  815. fdt_get_name(blob, node, NULL), name);
  816. return length;
  817. }
  818. if (length == sizeof(u32)) {
  819. result->typ = fdtdec_get_int(blob, node, name, 0);
  820. result->min = result->typ;
  821. result->max = result->typ;
  822. } else {
  823. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  824. }
  825. return ret;
  826. }
  827. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  828. struct display_timing *dt)
  829. {
  830. int i, node, timings_node;
  831. u32 val = 0;
  832. int ret = 0;
  833. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  834. if (timings_node < 0)
  835. return timings_node;
  836. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  837. node > 0 && i != index;
  838. node = fdt_next_subnode(blob, node))
  839. i++;
  840. if (node < 0)
  841. return node;
  842. memset(dt, 0, sizeof(*dt));
  843. ret |= decode_timing_property(blob, node, "hback-porch",
  844. &dt->hback_porch);
  845. ret |= decode_timing_property(blob, node, "hfront-porch",
  846. &dt->hfront_porch);
  847. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  848. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  849. ret |= decode_timing_property(blob, node, "vback-porch",
  850. &dt->vback_porch);
  851. ret |= decode_timing_property(blob, node, "vfront-porch",
  852. &dt->vfront_porch);
  853. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  854. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  855. ret |= decode_timing_property(blob, node, "clock-frequency",
  856. &dt->pixelclock);
  857. dt->flags = 0;
  858. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  859. if (val != -1) {
  860. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  861. DISPLAY_FLAGS_VSYNC_LOW;
  862. }
  863. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  864. if (val != -1) {
  865. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  866. DISPLAY_FLAGS_HSYNC_LOW;
  867. }
  868. val = fdtdec_get_int(blob, node, "de-active", -1);
  869. if (val != -1) {
  870. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  871. DISPLAY_FLAGS_DE_LOW;
  872. }
  873. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  874. if (val != -1) {
  875. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  876. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  877. }
  878. if (fdtdec_get_bool(blob, node, "interlaced"))
  879. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  880. if (fdtdec_get_bool(blob, node, "doublescan"))
  881. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  882. if (fdtdec_get_bool(blob, node, "doubleclk"))
  883. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  884. return ret;
  885. }
  886. int fdtdec_setup_mem_size_base_fdt(const void *blob)
  887. {
  888. int ret, mem;
  889. struct fdt_resource res;
  890. mem = fdt_path_offset(blob, "/memory");
  891. if (mem < 0) {
  892. debug("%s: Missing /memory node\n", __func__);
  893. return -EINVAL;
  894. }
  895. ret = fdt_get_resource(blob, mem, "reg", 0, &res);
  896. if (ret != 0) {
  897. debug("%s: Unable to decode first memory bank\n", __func__);
  898. return -EINVAL;
  899. }
  900. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  901. gd->ram_base = (unsigned long)res.start;
  902. debug("%s: Initial DRAM size %llx\n", __func__,
  903. (unsigned long long)gd->ram_size);
  904. return 0;
  905. }
  906. int fdtdec_setup_mem_size_base(void)
  907. {
  908. return fdtdec_setup_mem_size_base_fdt(gd->fdt_blob);
  909. }
  910. #if defined(CONFIG_NR_DRAM_BANKS)
  911. static int get_next_memory_node(const void *blob, int mem)
  912. {
  913. do {
  914. mem = fdt_node_offset_by_prop_value(blob, mem,
  915. "device_type", "memory", 7);
  916. } while (!fdtdec_get_is_enabled(blob, mem));
  917. return mem;
  918. }
  919. int fdtdec_setup_memory_banksize_fdt(const void *blob)
  920. {
  921. int bank, ret, mem, reg = 0;
  922. struct fdt_resource res;
  923. mem = get_next_memory_node(blob, -1);
  924. if (mem < 0) {
  925. debug("%s: Missing /memory node\n", __func__);
  926. return -EINVAL;
  927. }
  928. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  929. ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
  930. if (ret == -FDT_ERR_NOTFOUND) {
  931. reg = 0;
  932. mem = get_next_memory_node(blob, mem);
  933. if (mem == -FDT_ERR_NOTFOUND)
  934. break;
  935. ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
  936. if (ret == -FDT_ERR_NOTFOUND)
  937. break;
  938. }
  939. if (ret != 0) {
  940. return -EINVAL;
  941. }
  942. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  943. gd->bd->bi_dram[bank].size =
  944. (phys_size_t)(res.end - res.start + 1);
  945. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  946. __func__, bank,
  947. (unsigned long long)gd->bd->bi_dram[bank].start,
  948. (unsigned long long)gd->bd->bi_dram[bank].size);
  949. }
  950. return 0;
  951. }
  952. int fdtdec_setup_memory_banksize(void)
  953. {
  954. return fdtdec_setup_memory_banksize_fdt(gd->fdt_blob);
  955. }
  956. #endif
  957. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  958. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  959. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  960. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  961. {
  962. size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
  963. bool gzip = 0, lzo = 0;
  964. ulong sz_in = sz_src;
  965. void *dst;
  966. int rc;
  967. if (CONFIG_IS_ENABLED(GZIP))
  968. if (gzip_parse_header(src, sz_in) >= 0)
  969. gzip = 1;
  970. if (CONFIG_IS_ENABLED(LZO))
  971. if (!gzip && lzop_is_valid_header(src))
  972. lzo = 1;
  973. if (!gzip && !lzo)
  974. return -EBADMSG;
  975. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  976. dst = malloc(sz_out);
  977. if (!dst) {
  978. puts("uncompress_blob: Unable to allocate memory\n");
  979. return -ENOMEM;
  980. }
  981. } else {
  982. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  983. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  984. # else
  985. return -ENOTSUPP;
  986. # endif
  987. }
  988. if (CONFIG_IS_ENABLED(GZIP) && gzip)
  989. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  990. else if (CONFIG_IS_ENABLED(LZO) && lzo)
  991. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  992. else
  993. hang();
  994. if (rc < 0) {
  995. /* not a valid compressed blob */
  996. puts("uncompress_blob: Unable to uncompress\n");
  997. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  998. free(dst);
  999. return -EBADMSG;
  1000. }
  1001. *dstp = dst;
  1002. return 0;
  1003. }
  1004. # else
  1005. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1006. {
  1007. *dstp = (void *)src;
  1008. return 0;
  1009. }
  1010. # endif
  1011. #endif
  1012. #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1013. /*
  1014. * For CONFIG_OF_SEPARATE, the board may optionally implement this to
  1015. * provide and/or fixup the fdt.
  1016. */
  1017. __weak void *board_fdt_blob_setup(void)
  1018. {
  1019. void *fdt_blob = NULL;
  1020. #ifdef CONFIG_SPL_BUILD
  1021. /* FDT is at end of BSS unless it is in a different memory region */
  1022. if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
  1023. fdt_blob = (ulong *)&_image_binary_end;
  1024. else
  1025. fdt_blob = (ulong *)&__bss_end;
  1026. #else
  1027. /* FDT is at end of image */
  1028. fdt_blob = (ulong *)&_end;
  1029. #endif
  1030. return fdt_blob;
  1031. }
  1032. #endif
  1033. int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
  1034. {
  1035. const char *path;
  1036. int offset, err;
  1037. if (!is_valid_ethaddr(mac))
  1038. return -EINVAL;
  1039. path = fdt_get_alias(fdt, "ethernet");
  1040. if (!path)
  1041. return 0;
  1042. debug("ethernet alias found: %s\n", path);
  1043. offset = fdt_path_offset(fdt, path);
  1044. if (offset < 0) {
  1045. debug("ethernet alias points to absent node %s\n", path);
  1046. return -ENOENT;
  1047. }
  1048. err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
  1049. if (err < 0)
  1050. return err;
  1051. debug("MAC address: %pM\n", mac);
  1052. return 0;
  1053. }
  1054. static int fdtdec_init_reserved_memory(void *blob)
  1055. {
  1056. int na, ns, node, err;
  1057. fdt32_t value;
  1058. /* inherit #address-cells and #size-cells from the root node */
  1059. na = fdt_address_cells(blob, 0);
  1060. ns = fdt_size_cells(blob, 0);
  1061. node = fdt_add_subnode(blob, 0, "reserved-memory");
  1062. if (node < 0)
  1063. return node;
  1064. err = fdt_setprop(blob, node, "ranges", NULL, 0);
  1065. if (err < 0)
  1066. return err;
  1067. value = cpu_to_fdt32(ns);
  1068. err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
  1069. if (err < 0)
  1070. return err;
  1071. value = cpu_to_fdt32(na);
  1072. err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
  1073. if (err < 0)
  1074. return err;
  1075. return node;
  1076. }
  1077. int fdtdec_add_reserved_memory(void *blob, const char *basename,
  1078. const struct fdt_memory *carveout,
  1079. uint32_t *phandlep)
  1080. {
  1081. fdt32_t cells[4] = {}, *ptr = cells;
  1082. uint32_t upper, lower, phandle;
  1083. int parent, node, na, ns, err;
  1084. fdt_size_t size;
  1085. char name[64];
  1086. /* create an empty /reserved-memory node if one doesn't exist */
  1087. parent = fdt_path_offset(blob, "/reserved-memory");
  1088. if (parent < 0) {
  1089. parent = fdtdec_init_reserved_memory(blob);
  1090. if (parent < 0)
  1091. return parent;
  1092. }
  1093. /* only 1 or 2 #address-cells and #size-cells are supported */
  1094. na = fdt_address_cells(blob, parent);
  1095. if (na < 1 || na > 2)
  1096. return -FDT_ERR_BADNCELLS;
  1097. ns = fdt_size_cells(blob, parent);
  1098. if (ns < 1 || ns > 2)
  1099. return -FDT_ERR_BADNCELLS;
  1100. /* find a matching node and return the phandle to that */
  1101. fdt_for_each_subnode(node, blob, parent) {
  1102. const char *name = fdt_get_name(blob, node, NULL);
  1103. phys_addr_t addr, size;
  1104. addr = fdtdec_get_addr_size(blob, node, "reg", &size);
  1105. if (addr == FDT_ADDR_T_NONE) {
  1106. debug("failed to read address/size for %s\n", name);
  1107. continue;
  1108. }
  1109. if (addr == carveout->start && (addr + size) == carveout->end) {
  1110. if (phandlep)
  1111. *phandlep = fdt_get_phandle(blob, node);
  1112. return 0;
  1113. }
  1114. }
  1115. /*
  1116. * Unpack the start address and generate the name of the new node
  1117. * base on the basename and the unit-address.
  1118. */
  1119. upper = upper_32_bits(carveout->start);
  1120. lower = lower_32_bits(carveout->start);
  1121. if (na > 1 && upper > 0)
  1122. snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
  1123. lower);
  1124. else {
  1125. if (upper > 0) {
  1126. debug("address %08x:%08x exceeds addressable space\n",
  1127. upper, lower);
  1128. return -FDT_ERR_BADVALUE;
  1129. }
  1130. snprintf(name, sizeof(name), "%s@%x", basename, lower);
  1131. }
  1132. node = fdt_add_subnode(blob, parent, name);
  1133. if (node < 0)
  1134. return node;
  1135. if (phandlep) {
  1136. err = fdt_generate_phandle(blob, &phandle);
  1137. if (err < 0)
  1138. return err;
  1139. err = fdtdec_set_phandle(blob, node, phandle);
  1140. if (err < 0)
  1141. return err;
  1142. }
  1143. /* store one or two address cells */
  1144. if (na > 1)
  1145. *ptr++ = cpu_to_fdt32(upper);
  1146. *ptr++ = cpu_to_fdt32(lower);
  1147. /* store one or two size cells */
  1148. size = carveout->end - carveout->start + 1;
  1149. upper = upper_32_bits(size);
  1150. lower = lower_32_bits(size);
  1151. if (ns > 1)
  1152. *ptr++ = cpu_to_fdt32(upper);
  1153. *ptr++ = cpu_to_fdt32(lower);
  1154. err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
  1155. if (err < 0)
  1156. return err;
  1157. /* return the phandle for the new node for the caller to use */
  1158. if (phandlep)
  1159. *phandlep = phandle;
  1160. return 0;
  1161. }
  1162. int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
  1163. unsigned int index, struct fdt_memory *carveout)
  1164. {
  1165. const fdt32_t *prop;
  1166. uint32_t phandle;
  1167. int offset, len;
  1168. fdt_size_t size;
  1169. offset = fdt_path_offset(blob, node);
  1170. if (offset < 0)
  1171. return offset;
  1172. prop = fdt_getprop(blob, offset, name, &len);
  1173. if (!prop) {
  1174. debug("failed to get %s for %s\n", name, node);
  1175. return -FDT_ERR_NOTFOUND;
  1176. }
  1177. if ((len % sizeof(phandle)) != 0) {
  1178. debug("invalid phandle property\n");
  1179. return -FDT_ERR_BADPHANDLE;
  1180. }
  1181. if (len < (sizeof(phandle) * (index + 1))) {
  1182. debug("invalid phandle index\n");
  1183. return -FDT_ERR_BADPHANDLE;
  1184. }
  1185. phandle = fdt32_to_cpu(prop[index]);
  1186. offset = fdt_node_offset_by_phandle(blob, phandle);
  1187. if (offset < 0) {
  1188. debug("failed to find node for phandle %u\n", phandle);
  1189. return offset;
  1190. }
  1191. carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
  1192. "reg", 0, &size,
  1193. true);
  1194. if (carveout->start == FDT_ADDR_T_NONE) {
  1195. debug("failed to read address/size from \"reg\" property\n");
  1196. return -FDT_ERR_NOTFOUND;
  1197. }
  1198. carveout->end = carveout->start + size - 1;
  1199. return 0;
  1200. }
  1201. int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
  1202. unsigned int index, const char *name,
  1203. const struct fdt_memory *carveout)
  1204. {
  1205. uint32_t phandle;
  1206. int err, offset;
  1207. fdt32_t value;
  1208. /* XXX implement support for multiple phandles */
  1209. if (index > 0) {
  1210. debug("invalid index %u\n", index);
  1211. return -FDT_ERR_BADOFFSET;
  1212. }
  1213. err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle);
  1214. if (err < 0) {
  1215. debug("failed to add reserved memory: %d\n", err);
  1216. return err;
  1217. }
  1218. offset = fdt_path_offset(blob, node);
  1219. if (offset < 0) {
  1220. debug("failed to find offset for node %s: %d\n", node, offset);
  1221. return offset;
  1222. }
  1223. value = cpu_to_fdt32(phandle);
  1224. err = fdt_setprop(blob, offset, prop_name, &value, sizeof(value));
  1225. if (err < 0) {
  1226. debug("failed to set %s property for node %s: %d\n", prop_name,
  1227. node, err);
  1228. return err;
  1229. }
  1230. return 0;
  1231. }
  1232. int fdtdec_setup(void)
  1233. {
  1234. #if CONFIG_IS_ENABLED(OF_CONTROL)
  1235. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1236. void *fdt_blob;
  1237. # endif
  1238. # ifdef CONFIG_OF_EMBED
  1239. /* Get a pointer to the FDT */
  1240. # ifdef CONFIG_SPL_BUILD
  1241. gd->fdt_blob = __dtb_dt_spl_begin;
  1242. # else
  1243. gd->fdt_blob = __dtb_dt_begin;
  1244. # endif
  1245. # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1246. /* Allow the board to override the fdt address. */
  1247. gd->fdt_blob = board_fdt_blob_setup();
  1248. # elif defined(CONFIG_OF_HOSTFILE)
  1249. if (sandbox_read_fdt_from_file()) {
  1250. puts("Failed to read control FDT\n");
  1251. return -1;
  1252. }
  1253. # elif defined(CONFIG_OF_PRIOR_STAGE)
  1254. gd->fdt_blob = (void *)prior_stage_fdt_address;
  1255. # endif
  1256. # ifndef CONFIG_SPL_BUILD
  1257. /* Allow the early environment to override the fdt address */
  1258. gd->fdt_blob = map_sysmem
  1259. (env_get_ulong("fdtcontroladdr", 16,
  1260. (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
  1261. # endif
  1262. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1263. /*
  1264. * Try and uncompress the blob.
  1265. * Unfortunately there is no way to know how big the input blob really
  1266. * is. So let us set the maximum input size arbitrarily high. 16MB
  1267. * ought to be more than enough for packed DTBs.
  1268. */
  1269. if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
  1270. gd->fdt_blob = fdt_blob;
  1271. /*
  1272. * Check if blob is a FIT images containings DTBs.
  1273. * If so, pick the most relevant
  1274. */
  1275. fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
  1276. if (fdt_blob) {
  1277. gd->multi_dtb_fit = gd->fdt_blob;
  1278. gd->fdt_blob = fdt_blob;
  1279. }
  1280. # endif
  1281. #endif
  1282. return fdtdec_prepare_fdt();
  1283. }
  1284. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1285. int fdtdec_resetup(int *rescan)
  1286. {
  1287. void *fdt_blob;
  1288. /*
  1289. * If the current DTB is part of a compressed FIT image,
  1290. * try to locate the best match from the uncompressed
  1291. * FIT image stillpresent there. Save the time and space
  1292. * required to uncompress it again.
  1293. */
  1294. if (gd->multi_dtb_fit) {
  1295. fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
  1296. if (fdt_blob == gd->fdt_blob) {
  1297. /*
  1298. * The best match did not change. no need to tear down
  1299. * the DM and rescan the fdt.
  1300. */
  1301. *rescan = 0;
  1302. return 0;
  1303. }
  1304. *rescan = 1;
  1305. gd->fdt_blob = fdt_blob;
  1306. return fdtdec_prepare_fdt();
  1307. }
  1308. /*
  1309. * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
  1310. * not a FIT image containings DTB, but a single DTB. There is no need
  1311. * to teard down DM and rescan the DT in this case.
  1312. */
  1313. *rescan = 0;
  1314. return 0;
  1315. }
  1316. #endif
  1317. #ifdef CONFIG_NR_DRAM_BANKS
  1318. int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
  1319. phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
  1320. {
  1321. int addr_cells, size_cells;
  1322. const u32 *cell, *end;
  1323. u64 total_size, size, addr;
  1324. int node, child;
  1325. bool auto_size;
  1326. int bank;
  1327. int len;
  1328. debug("%s: board_id=%d\n", __func__, board_id);
  1329. if (!area)
  1330. area = "/memory";
  1331. node = fdt_path_offset(blob, area);
  1332. if (node < 0) {
  1333. debug("No %s node found\n", area);
  1334. return -ENOENT;
  1335. }
  1336. cell = fdt_getprop(blob, node, "reg", &len);
  1337. if (!cell) {
  1338. debug("No reg property found\n");
  1339. return -ENOENT;
  1340. }
  1341. addr_cells = fdt_address_cells(blob, node);
  1342. size_cells = fdt_size_cells(blob, node);
  1343. /* Check the board id and mask */
  1344. for (child = fdt_first_subnode(blob, node);
  1345. child >= 0;
  1346. child = fdt_next_subnode(blob, child)) {
  1347. int match_mask, match_value;
  1348. match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
  1349. match_value = fdtdec_get_int(blob, child, "match-value", -1);
  1350. if (match_value >= 0 &&
  1351. ((board_id & match_mask) == match_value)) {
  1352. /* Found matching mask */
  1353. debug("Found matching mask %d\n", match_mask);
  1354. node = child;
  1355. cell = fdt_getprop(blob, node, "reg", &len);
  1356. if (!cell) {
  1357. debug("No memory-banks property found\n");
  1358. return -EINVAL;
  1359. }
  1360. break;
  1361. }
  1362. }
  1363. /* Note: if no matching subnode was found we use the parent node */
  1364. if (bd) {
  1365. memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
  1366. CONFIG_NR_DRAM_BANKS);
  1367. }
  1368. auto_size = fdtdec_get_bool(blob, node, "auto-size");
  1369. total_size = 0;
  1370. end = cell + len / 4 - addr_cells - size_cells;
  1371. debug("cell at %p, end %p\n", cell, end);
  1372. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1373. if (cell > end)
  1374. break;
  1375. addr = 0;
  1376. if (addr_cells == 2)
  1377. addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1378. addr += fdt32_to_cpu(*cell++);
  1379. if (bd)
  1380. bd->bi_dram[bank].start = addr;
  1381. if (basep && !bank)
  1382. *basep = (phys_addr_t)addr;
  1383. size = 0;
  1384. if (size_cells == 2)
  1385. size += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1386. size += fdt32_to_cpu(*cell++);
  1387. if (auto_size) {
  1388. u64 new_size;
  1389. debug("Auto-sizing %llx, size %llx: ", addr, size);
  1390. new_size = get_ram_size((long *)(uintptr_t)addr, size);
  1391. if (new_size == size) {
  1392. debug("OK\n");
  1393. } else {
  1394. debug("sized to %llx\n", new_size);
  1395. size = new_size;
  1396. }
  1397. }
  1398. if (bd)
  1399. bd->bi_dram[bank].size = size;
  1400. total_size += size;
  1401. }
  1402. debug("Memory size %llu\n", total_size);
  1403. if (sizep)
  1404. *sizep = (phys_size_t)total_size;
  1405. return 0;
  1406. }
  1407. #endif /* CONFIG_NR_DRAM_BANKS */
  1408. #endif /* !USE_HOSTCC */