zynqmppl.h 953 B

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * (C) Copyright 2015 Xilinx, Inc,
  4. * Michal Simek <michal.simek@xilinx.com>
  5. */
  6. #ifndef _ZYNQMPPL_H_
  7. #define _ZYNQMPPL_H_
  8. #include <xilinx.h>
  9. #define ZYNQMP_SIP_SVC_CSU_DMA_CHIPID 0xC2000018
  10. #define ZYNQMP_SIP_SVC_PM_FPGA_LOAD 0xC2000016
  11. #define ZYNQMP_SIP_SVC_PM_FPGA_STATUS 0xC2000017
  12. #define ZYNQMP_FPGA_OP_INIT (1 << 0)
  13. #define ZYNQMP_FPGA_OP_LOAD (1 << 1)
  14. #define ZYNQMP_FPGA_OP_DONE (1 << 2)
  15. #define ZYNQMP_FPGA_FLAG_AUTHENTICATED BIT(2)
  16. #define ZYNQMP_FPGA_FLAG_ENCRYPTED BIT(3)
  17. #define ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT 15
  18. #define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK (0xf << \
  19. ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT)
  20. #define ZYNQMP_CSU_IDCODE_SVD_SHIFT 12
  21. #define ZYNQMP_CSU_IDCODE_SVD_MASK (0x7 << ZYNQMP_CSU_IDCODE_SVD_SHIFT)
  22. extern struct xilinx_fpga_op zynqmp_op;
  23. #define XILINX_ZYNQMP_DESC \
  24. { xilinx_zynqmp, csu_dma, 1, &zynqmp_op, 0, &zynqmp_op }
  25. #endif /* _ZYNQMPPL_H_ */