spartan2.h 3.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2002
  4. * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  5. */
  6. #ifndef _SPARTAN2_H_
  7. #define _SPARTAN2_H_
  8. #include <xilinx.h>
  9. /* Slave Parallel Implementation function table */
  10. typedef struct {
  11. xilinx_pre_fn pre;
  12. xilinx_pgm_fn pgm;
  13. xilinx_init_fn init;
  14. xilinx_err_fn err;
  15. xilinx_done_fn done;
  16. xilinx_clk_fn clk;
  17. xilinx_cs_fn cs;
  18. xilinx_wr_fn wr;
  19. xilinx_rdata_fn rdata;
  20. xilinx_wdata_fn wdata;
  21. xilinx_busy_fn busy;
  22. xilinx_abort_fn abort;
  23. xilinx_post_fn post;
  24. } xilinx_spartan2_slave_parallel_fns;
  25. /* Slave Serial Implementation function table */
  26. typedef struct {
  27. xilinx_pre_fn pre;
  28. xilinx_pgm_fn pgm;
  29. xilinx_clk_fn clk;
  30. xilinx_init_fn init;
  31. xilinx_done_fn done;
  32. xilinx_wr_fn wr;
  33. xilinx_post_fn post;
  34. } xilinx_spartan2_slave_serial_fns;
  35. #if defined(CONFIG_FPGA_SPARTAN2)
  36. extern struct xilinx_fpga_op spartan2_op;
  37. # define FPGA_SPARTAN2_OPS &spartan2_op
  38. #else
  39. # define FPGA_SPARTAN2_OPS NULL
  40. #endif
  41. /* Device Image Sizes
  42. *********************************************************************/
  43. /* Spartan-II (2.5V) */
  44. #define XILINX_XC2S15_SIZE 197728/8
  45. #define XILINX_XC2S30_SIZE 336800/8
  46. #define XILINX_XC2S50_SIZE 559232/8
  47. #define XILINX_XC2S100_SIZE 781248/8
  48. #define XILINX_XC2S150_SIZE 1040128/8
  49. #define XILINX_XC2S200_SIZE 1335872/8
  50. /* Spartan-IIE (1.8V) */
  51. #define XILINX_XC2S50E_SIZE 630048/8
  52. #define XILINX_XC2S100E_SIZE 863840/8
  53. #define XILINX_XC2S150E_SIZE 1134496/8
  54. #define XILINX_XC2S200E_SIZE 1442016/8
  55. #define XILINX_XC2S300E_SIZE 1875648/8
  56. /* Descriptor Macros
  57. *********************************************************************/
  58. /* Spartan-II devices */
  59. #define XILINX_XC2S15_DESC(iface, fn_table, cookie) \
  60. { xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie, \
  61. FPGA_SPARTAN2_OPS }
  62. #define XILINX_XC2S30_DESC(iface, fn_table, cookie) \
  63. { xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie, \
  64. FPGA_SPARTAN2_OPS }
  65. #define XILINX_XC2S50_DESC(iface, fn_table, cookie) \
  66. { xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie, \
  67. FPGA_SPARTAN2_OPS }
  68. #define XILINX_XC2S100_DESC(iface, fn_table, cookie) \
  69. { xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie, \
  70. FPGA_SPARTAN2_OPS }
  71. #define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
  72. { xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie, \
  73. FPGA_SPARTAN2_OPS }
  74. #define XILINX_XC2S200_DESC(iface, fn_table, cookie) \
  75. { xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie, \
  76. FPGA_SPARTAN2_OPS }
  77. #define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \
  78. { xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie, \
  79. FPGA_SPARTAN2_OPS }
  80. #define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \
  81. { xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie, \
  82. FPGA_SPARTAN2_OPS }
  83. #define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \
  84. { xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie, \
  85. FPGA_SPARTAN2_OPS }
  86. #define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \
  87. { xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie, \
  88. FPGA_SPARTAN2_OPS }
  89. #define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \
  90. { xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie, \
  91. FPGA_SPARTAN2_OPS }
  92. #endif /* _SPARTAN2_H_ */