sh_pfc.h 5.7 KB

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  1. /*
  2. * SuperH Pin Function Controller Support
  3. * Copy from Linux kernel. (include/linux/sh_pfc.h)
  4. *
  5. * Copyright (C) 2015 Renesas Electronics Corporation
  6. * Copyright (c) 2008 Magnus Damm
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #ifndef __SH_PFC_H
  13. #define __SH_PFC_H
  14. typedef unsigned short pinmux_enum_t;
  15. typedef unsigned short pinmux_flag_t;
  16. #define PINMUX_TYPE_NONE 0
  17. #define PINMUX_TYPE_FUNCTION 1
  18. #define PINMUX_TYPE_GPIO 2
  19. #define PINMUX_TYPE_OUTPUT 3
  20. #define PINMUX_TYPE_INPUT 4
  21. #define PINMUX_TYPE_INPUT_PULLUP 5
  22. #define PINMUX_TYPE_INPUT_PULLDOWN 6
  23. #define PINMUX_FLAG_TYPE (0x7)
  24. #define PINMUX_FLAG_WANT_PULLUP (1 << 3)
  25. #define PINMUX_FLAG_WANT_PULLDOWN (1 << 4)
  26. #define PINMUX_FLAG_DBIT_SHIFT 5
  27. #define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT)
  28. #define PINMUX_FLAG_DREG_SHIFT 10
  29. #define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT)
  30. struct pinmux_gpio {
  31. pinmux_enum_t enum_id;
  32. pinmux_flag_t flags;
  33. };
  34. #define PINMUX_GPIO(gpio, data_or_mark)[gpio] = { data_or_mark }
  35. #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
  36. struct pinmux_cfg_reg {
  37. unsigned long reg, reg_width, field_width;
  38. unsigned long *cnt;
  39. pinmux_enum_t *enum_ids;
  40. unsigned long *var_field_width;
  41. };
  42. #define PINMUX_CFG_REG(name, r, r_width, f_width) \
  43. .reg = r, .reg_width = r_width, .field_width = f_width, \
  44. .cnt = (unsigned long [r_width / f_width]) {}, \
  45. .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)])
  46. #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
  47. .reg = r, .reg_width = r_width, \
  48. .cnt = (unsigned long [r_width]) {}, \
  49. .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \
  50. .enum_ids = (pinmux_enum_t [])
  51. struct pinmux_data_reg {
  52. unsigned long reg, reg_width, reg_shadow;
  53. pinmux_enum_t *enum_ids;
  54. void *mapped_reg;
  55. };
  56. #define PINMUX_DATA_REG(name, r, r_width) \
  57. .reg = r, .reg_width = r_width, \
  58. .enum_ids = (pinmux_enum_t [r_width]) \
  59. struct pinmux_irq {
  60. int irq;
  61. pinmux_enum_t *enum_ids;
  62. };
  63. #define PINMUX_IRQ(irq_nr, ids...) \
  64. { .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } } \
  65. struct pinmux_range {
  66. pinmux_enum_t begin;
  67. pinmux_enum_t end;
  68. pinmux_enum_t force;
  69. };
  70. struct pinmux_info {
  71. char *name;
  72. pinmux_enum_t reserved_id;
  73. struct pinmux_range data;
  74. struct pinmux_range input;
  75. struct pinmux_range input_pd;
  76. struct pinmux_range input_pu;
  77. struct pinmux_range output;
  78. struct pinmux_range mark;
  79. struct pinmux_range function;
  80. unsigned first_gpio, last_gpio;
  81. struct pinmux_gpio *gpios;
  82. struct pinmux_cfg_reg *cfg_regs;
  83. struct pinmux_data_reg *data_regs;
  84. pinmux_enum_t *gpio_data;
  85. unsigned int gpio_data_size;
  86. struct pinmux_irq *gpio_irq;
  87. unsigned int gpio_irq_size;
  88. struct resource *resource;
  89. unsigned int num_resources;
  90. unsigned long unlock_reg;
  91. };
  92. int register_pinmux(struct pinmux_info *pip);
  93. int unregister_pinmux(struct pinmux_info *pip);
  94. /* helper macro for port */
  95. #define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
  96. #define PORT_10(fn, pfx, sfx) \
  97. PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
  98. PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
  99. PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
  100. PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
  101. PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
  102. #define PORT_90(fn, pfx, sfx) \
  103. PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \
  104. PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \
  105. PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \
  106. PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \
  107. PORT_10(fn, pfx##9, sfx)
  108. #define _PORT_ALL(pfx, sfx) pfx##_##sfx
  109. #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
  110. #define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str)
  111. #define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
  112. #define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
  113. #define GPIO_GFN(str) PINMUX_GPIO(GPIO_GFN_##str, str##_GMARK)
  114. #define GPIO_IFN(str) PINMUX_GPIO(GPIO_IFN_##str, str##_IMARK)
  115. /* helper macro for pinmux_enum_t */
  116. #define PORT_DATA_I(nr) \
  117. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
  118. #define PORT_DATA_I_PD(nr) \
  119. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
  120. PORT##nr##_IN, PORT##nr##_IN_PD)
  121. #define PORT_DATA_I_PU(nr) \
  122. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
  123. PORT##nr##_IN, PORT##nr##_IN_PU)
  124. #define PORT_DATA_I_PU_PD(nr) \
  125. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
  126. PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
  127. #define PORT_DATA_O(nr) \
  128. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
  129. #define PORT_DATA_IO(nr) \
  130. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
  131. PORT##nr##_IN)
  132. #define PORT_DATA_IO_PD(nr) \
  133. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
  134. PORT##nr##_IN, PORT##nr##_IN_PD)
  135. #define PORT_DATA_IO_PU(nr) \
  136. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
  137. PORT##nr##_IN, PORT##nr##_IN_PU)
  138. #define PORT_DATA_IO_PU_PD(nr) \
  139. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
  140. PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
  141. /* helper macro for top 4 bits in PORTnCR */
  142. #define _PCRH(in, in_pd, in_pu, out) \
  143. 0, (out), (in), 0, \
  144. 0, 0, 0, 0, \
  145. 0, 0, (in_pd), 0, \
  146. 0, 0, (in_pu), 0
  147. #define PORTCR(nr, reg) \
  148. { \
  149. PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
  150. _PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
  151. PORT##nr##_IN_PU, PORT##nr##_OUT), \
  152. PORT##nr##_FN0, PORT##nr##_FN1, \
  153. PORT##nr##_FN2, PORT##nr##_FN3, \
  154. PORT##nr##_FN4, PORT##nr##_FN5, \
  155. PORT##nr##_FN6, PORT##nr##_FN7 } \
  156. }
  157. #endif /* __SH_PFC_H */