tps65910.h 2.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2011-2013
  4. * Texas Instruments, <www.ti.com>
  5. *
  6. * For more details, please see the TRM at http://www.ti.com/product/tps65910
  7. */
  8. #ifndef __POWER_TPS65910_H__
  9. #define __POWER_TPS65910_H__
  10. #define MPU 0
  11. #define CORE 1
  12. #define TPS65910_SR_I2C_ADDR 0x12
  13. #define TPS65910_CTRL_I2C_ADDR 0x2D
  14. /* PMIC Register offsets */
  15. enum {
  16. TPS65910_VDD1_REG = 0x21,
  17. TPS65910_VDD1_OP_REG = 0x22,
  18. TPS65910_VDD2_REG = 0x24,
  19. TPS65910_VDD2_OP_REG = 0x25,
  20. TPS65910_DEVCTRL_REG = 0x3F,
  21. };
  22. /* VDD2 & VDD1 control register (VDD2_REG & VDD1_REG) */
  23. #define TPS65910_VGAIN_SEL_MASK (0x3 << 6)
  24. #define TPS65910_ILMAX_MASK (0x1 << 5)
  25. #define TPS65910_TSTEP_MASK (0x7 << 2)
  26. #define TPS65910_ST_MASK (0x3)
  27. #define TPS65910_REG_VGAIN_SEL_X1 (0x0 << 6)
  28. #define TPS65910_REG_VGAIN_SEL_X1_0 (0x1 << 6)
  29. #define TPS65910_REG_VGAIN_SEL_X3 (0x2 << 6)
  30. #define TPS65910_REG_VGAIN_SEL_X4 (0x3 << 6)
  31. #define TPS65910_REG_ILMAX_1_0_A (0x0 << 5)
  32. #define TPS65910_REG_ILMAX_1_5_A (0x1 << 5)
  33. #define TPS65910_REG_TSTEP_ (0x0 << 2)
  34. #define TPS65910_REG_TSTEP_12_5 (0x1 << 2)
  35. #define TPS65910_REG_TSTEP_9_4 (0x2 << 2)
  36. #define TPS65910_REG_TSTEP_7_5 (0x3 << 2)
  37. #define TPS65910_REG_TSTEP_6_25 (0x4 << 2)
  38. #define TPS65910_REG_TSTEP_4_7 (0x5 << 2)
  39. #define TPS65910_REG_TSTEP_3_12 (0x6 << 2)
  40. #define TPS65910_REG_TSTEP_2_5 (0x7 << 2)
  41. #define TPS65910_REG_ST_OFF (0x0)
  42. #define TPS65910_REG_ST_ON_HI_POW (0x1)
  43. #define TPS65910_REG_ST_OFF_1 (0x2)
  44. #define TPS65910_REG_ST_ON_LOW_POW (0x3)
  45. /* VDD2 & VDD1 voltage selection register. (VDD2_OP_REG & VDD1_OP_REG) */
  46. #define TPS65910_OP_REG_SEL (0x7F)
  47. #define TPS65910_OP_REG_CMD_MASK (0x1 << 7)
  48. #define TPS65910_OP_REG_CMD_OP (0x0 << 7)
  49. #define TPS65910_OP_REG_CMD_SR (0x1 << 7)
  50. #define TPS65910_OP_REG_SEL_MASK (0x7F)
  51. #define TPS65910_OP_REG_SEL_0_9_5 (0x1F) /* 0.9500 V */
  52. #define TPS65910_OP_REG_SEL_1_1_0 (0x2B) /* 1.1000 V */
  53. #define TPS65910_OP_REG_SEL_1_1_3 (0x2E) /* 1.1375 V */
  54. #define TPS65910_OP_REG_SEL_1_2_0 (0x33) /* 1.2000 V */
  55. #define TPS65910_OP_REG_SEL_1_2_6 (0x38) /* 1.2625 V */
  56. #define TPS65910_OP_REG_SEL_1_3_2_5 (0x3D) /* 1.3250 V */
  57. /* Device control register . (DEVCTRL_REG) */
  58. #define TPS65910_DEVCTRL_REG_SR_CTL_I2C_MASK (0x1 << 4)
  59. #define TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_SR_I2C (0x0 << 4)
  60. #define TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C (0x1 << 4)
  61. int power_tps65910_init(unsigned char bus);
  62. int tps65910_set_i2c_control(void);
  63. int tps65910_voltage_update(unsigned int module, unsigned char vddx_op_vol_sel);
  64. #endif /* __POWER_TPS65910_H__ */