phy.h 12 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2011 Freescale Semiconductor, Inc.
  4. * Andy Fleming <afleming@gmail.com>
  5. *
  6. * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
  7. */
  8. #ifndef _PHY_H
  9. #define _PHY_H
  10. #include <dm.h>
  11. #include <linux/list.h>
  12. #include <linux/mii.h>
  13. #include <linux/ethtool.h>
  14. #include <linux/mdio.h>
  15. #include <phy_interface.h>
  16. #define PHY_FIXED_ID 0xa5a55a5a
  17. /*
  18. * There is no actual id for this.
  19. * This is just a dummy id for gmii2rgmmi converter.
  20. */
  21. #define PHY_GMII2RGMII_ID 0x5a5a5a5a
  22. #define PHY_MAX_ADDR 32
  23. #define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
  24. #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
  25. SUPPORTED_TP | \
  26. SUPPORTED_MII)
  27. #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
  28. SUPPORTED_10baseT_Full)
  29. #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
  30. SUPPORTED_100baseT_Full)
  31. #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
  32. SUPPORTED_1000baseT_Full)
  33. #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
  34. PHY_100BT_FEATURES | \
  35. PHY_DEFAULT_FEATURES)
  36. #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
  37. PHY_1000BT_FEATURES)
  38. #define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
  39. SUPPORTED_10000baseT_Full)
  40. #ifndef PHY_ANEG_TIMEOUT
  41. #define PHY_ANEG_TIMEOUT 4000
  42. #endif
  43. struct phy_device;
  44. #define MDIO_NAME_LEN 32
  45. struct mii_dev {
  46. struct list_head link;
  47. char name[MDIO_NAME_LEN];
  48. void *priv;
  49. int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
  50. int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
  51. u16 val);
  52. int (*reset)(struct mii_dev *bus);
  53. struct phy_device *phymap[PHY_MAX_ADDR];
  54. u32 phy_mask;
  55. };
  56. /* struct phy_driver: a structure which defines PHY behavior
  57. *
  58. * uid will contain a number which represents the PHY. During
  59. * startup, the driver will poll the PHY to find out what its
  60. * UID--as defined by registers 2 and 3--is. The 32-bit result
  61. * gotten from the PHY will be masked to
  62. * discard any bits which may change based on revision numbers
  63. * unimportant to functionality
  64. *
  65. */
  66. struct phy_driver {
  67. char *name;
  68. unsigned int uid;
  69. unsigned int mask;
  70. unsigned int mmds;
  71. u32 features;
  72. /* Called to do any driver startup necessities */
  73. /* Will be called during phy_connect */
  74. int (*probe)(struct phy_device *phydev);
  75. /* Called to configure the PHY, and modify the controller
  76. * based on the results. Should be called after phy_connect */
  77. int (*config)(struct phy_device *phydev);
  78. /* Called when starting up the controller */
  79. int (*startup)(struct phy_device *phydev);
  80. /* Called when bringing down the controller */
  81. int (*shutdown)(struct phy_device *phydev);
  82. int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
  83. int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
  84. u16 val);
  85. /* Phy specific driver override for reading a MMD register */
  86. int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
  87. /* Phy specific driver override for writing a MMD register */
  88. int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
  89. u16 val);
  90. struct list_head list;
  91. /* driver private data */
  92. ulong data;
  93. };
  94. struct phy_device {
  95. /* Information about the PHY type */
  96. /* And management functions */
  97. struct mii_dev *bus;
  98. struct phy_driver *drv;
  99. void *priv;
  100. #ifdef CONFIG_DM_ETH
  101. struct udevice *dev;
  102. ofnode node;
  103. #else
  104. struct eth_device *dev;
  105. #endif
  106. /* forced speed & duplex (no autoneg)
  107. * partner speed & duplex & pause (autoneg)
  108. */
  109. int speed;
  110. int duplex;
  111. /* The most recently read link state */
  112. int link;
  113. int port;
  114. phy_interface_t interface;
  115. u32 advertising;
  116. u32 supported;
  117. u32 mmds;
  118. int autoneg;
  119. int addr;
  120. int pause;
  121. int asym_pause;
  122. u32 phy_id;
  123. bool is_c45;
  124. u32 flags;
  125. };
  126. struct fixed_link {
  127. int phy_id;
  128. int duplex;
  129. int link_speed;
  130. int pause;
  131. int asym_pause;
  132. };
  133. static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
  134. {
  135. struct mii_dev *bus = phydev->bus;
  136. return bus->read(bus, phydev->addr, devad, regnum);
  137. }
  138. static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
  139. u16 val)
  140. {
  141. struct mii_dev *bus = phydev->bus;
  142. return bus->write(bus, phydev->addr, devad, regnum, val);
  143. }
  144. static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
  145. int regnum)
  146. {
  147. /* Write the desired MMD Devad */
  148. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
  149. /* Write the desired MMD register address */
  150. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
  151. /* Select the Function : DATA with no post increment */
  152. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
  153. (devad | MII_MMD_CTRL_NOINCR));
  154. }
  155. static inline int phy_read_mmd(struct phy_device *phydev, int devad,
  156. int regnum)
  157. {
  158. struct phy_driver *drv = phydev->drv;
  159. if (regnum > (u16)~0 || devad > 32)
  160. return -EINVAL;
  161. /* driver-specific access */
  162. if (drv->read_mmd)
  163. return drv->read_mmd(phydev, devad, regnum);
  164. /* direct C45 / C22 access */
  165. if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
  166. devad == MDIO_DEVAD_NONE || !devad)
  167. return phy_read(phydev, devad, regnum);
  168. /* indirect C22 access */
  169. phy_mmd_start_indirect(phydev, devad, regnum);
  170. /* Read the content of the MMD's selected register */
  171. return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
  172. }
  173. static inline int phy_write_mmd(struct phy_device *phydev, int devad,
  174. int regnum, u16 val)
  175. {
  176. struct phy_driver *drv = phydev->drv;
  177. if (regnum > (u16)~0 || devad > 32)
  178. return -EINVAL;
  179. /* driver-specific access */
  180. if (drv->write_mmd)
  181. return drv->write_mmd(phydev, devad, regnum, val);
  182. /* direct C45 / C22 access */
  183. if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
  184. devad == MDIO_DEVAD_NONE || !devad)
  185. return phy_write(phydev, devad, regnum, val);
  186. /* indirect C22 access */
  187. phy_mmd_start_indirect(phydev, devad, regnum);
  188. /* Write the data into MMD's selected register */
  189. return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
  190. }
  191. #ifdef CONFIG_PHYLIB_10G
  192. extern struct phy_driver gen10g_driver;
  193. /* For now, XGMII is the only 10G interface */
  194. static inline int is_10g_interface(phy_interface_t interface)
  195. {
  196. return interface == PHY_INTERFACE_MODE_XGMII;
  197. }
  198. #endif
  199. /**
  200. * phy_init() - Initializes the PHY drivers
  201. *
  202. * This function registers all available PHY drivers
  203. *
  204. * @return 0 if OK, -ve on error
  205. */
  206. int phy_init(void);
  207. /**
  208. * phy_reset() - Resets the specified PHY
  209. *
  210. * Issues a reset of the PHY and waits for it to complete
  211. *
  212. * @phydev: PHY to reset
  213. * @return 0 if OK, -ve on error
  214. */
  215. int phy_reset(struct phy_device *phydev);
  216. /**
  217. * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
  218. *
  219. * The function checks the PHY addresses flagged in phy_mask and returns a
  220. * phy_device pointer if it detects a PHY.
  221. * This function should only be called if just one PHY is expected to be present
  222. * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
  223. * it is undefined which of these PHYs is returned.
  224. *
  225. * @bus: MII/MDIO bus to scan
  226. * @phy_mask: bitmap of PYH addresses to scan
  227. * @interface: type of MAC-PHY interface
  228. * @return pointer to phy_device if a PHY is found, or NULL otherwise
  229. */
  230. struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
  231. phy_interface_t interface);
  232. #ifdef CONFIG_DM_ETH
  233. /**
  234. * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
  235. * @phydev: PHY device
  236. * @dev: Ethernet device
  237. */
  238. void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
  239. /**
  240. * phy_connect() - Creates a PHY device for the Ethernet interface
  241. *
  242. * Creates a PHY device for the PHY at the given address, if one doesn't exist
  243. * already, and associates it with the Ethernet device.
  244. * The function may be called with addr <= 0, in this case addr value is ignored
  245. * and the bus is scanned to detect a PHY. Scanning should only be used if only
  246. * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
  247. * which PHY is returned.
  248. *
  249. * @bus: MII/MDIO bus that hosts the PHY
  250. * @addr: PHY address on MDIO bus
  251. * @dev: Ethernet device to associate to the PHY
  252. * @interface: type of MAC-PHY interface
  253. * @return pointer to phy_device if a PHY is found, or NULL otherwise
  254. */
  255. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  256. struct udevice *dev,
  257. phy_interface_t interface);
  258. static inline ofnode phy_get_ofnode(struct phy_device *phydev)
  259. {
  260. if (ofnode_valid(phydev->node))
  261. return phydev->node;
  262. else
  263. return dev_ofnode(phydev->dev);
  264. }
  265. #else
  266. /**
  267. * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
  268. * @phydev: PHY device
  269. * @dev: Ethernet device
  270. */
  271. void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
  272. /**
  273. * phy_connect() - Creates a PHY device for the Ethernet interface
  274. *
  275. * Creates a PHY device for the PHY at the given address, if one doesn't exist
  276. * already, and associates it with the Ethernet device.
  277. * The function may be called with addr <= 0, in this case addr value is ignored
  278. * and the bus is scanned to detect a PHY. Scanning should only be used if only
  279. * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
  280. * which PHY is returned.
  281. *
  282. * @bus: MII/MDIO bus that hosts the PHY
  283. * @addr: PHY address on MDIO bus
  284. * @dev: Ethernet device to associate to the PHY
  285. * @interface: type of MAC-PHY interface
  286. * @return pointer to phy_device if a PHY is found, or NULL otherwise
  287. */
  288. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  289. struct eth_device *dev,
  290. phy_interface_t interface);
  291. static inline ofnode phy_get_ofnode(struct phy_device *phydev)
  292. {
  293. return ofnode_null();
  294. }
  295. #endif
  296. int phy_startup(struct phy_device *phydev);
  297. int phy_config(struct phy_device *phydev);
  298. int phy_shutdown(struct phy_device *phydev);
  299. int phy_register(struct phy_driver *drv);
  300. int phy_set_supported(struct phy_device *phydev, u32 max_speed);
  301. int genphy_config_aneg(struct phy_device *phydev);
  302. int genphy_restart_aneg(struct phy_device *phydev);
  303. int genphy_update_link(struct phy_device *phydev);
  304. int genphy_parse_link(struct phy_device *phydev);
  305. int genphy_config(struct phy_device *phydev);
  306. int genphy_startup(struct phy_device *phydev);
  307. int genphy_shutdown(struct phy_device *phydev);
  308. int gen10g_config(struct phy_device *phydev);
  309. int gen10g_startup(struct phy_device *phydev);
  310. int gen10g_shutdown(struct phy_device *phydev);
  311. int gen10g_discover_mmds(struct phy_device *phydev);
  312. int phy_b53_init(void);
  313. int phy_mv88e61xx_init(void);
  314. int phy_aquantia_init(void);
  315. int phy_atheros_init(void);
  316. int phy_broadcom_init(void);
  317. int phy_cortina_init(void);
  318. int phy_davicom_init(void);
  319. int phy_et1011c_init(void);
  320. int phy_lxt_init(void);
  321. int phy_marvell_init(void);
  322. int phy_micrel_ksz8xxx_init(void);
  323. int phy_micrel_ksz90x1_init(void);
  324. int phy_meson_gxl_init(void);
  325. int phy_natsemi_init(void);
  326. int phy_realtek_init(void);
  327. int phy_smsc_init(void);
  328. int phy_teranetics_init(void);
  329. int phy_ti_init(void);
  330. int phy_vitesse_init(void);
  331. int phy_xilinx_init(void);
  332. int phy_mscc_init(void);
  333. int phy_fixed_init(void);
  334. int phy_xilinx_gmii2rgmii_init(void);
  335. int board_phy_config(struct phy_device *phydev);
  336. int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
  337. /**
  338. * phy_get_interface_by_name() - Look up a PHY interface name
  339. *
  340. * @str: PHY interface name, e.g. "mii"
  341. * @return PHY_INTERFACE_MODE_... value, or -1 if not found
  342. */
  343. int phy_get_interface_by_name(const char *str);
  344. /**
  345. * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
  346. * is RGMII (all variants)
  347. * @phydev: the phy_device struct
  348. */
  349. static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
  350. {
  351. return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
  352. phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
  353. }
  354. /**
  355. * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
  356. * is SGMII (all variants)
  357. * @phydev: the phy_device struct
  358. */
  359. static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
  360. {
  361. return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
  362. phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
  363. }
  364. /* PHY UIDs for various PHYs that are referenced in external code */
  365. #define PHY_UID_CS4340 0x13e51002
  366. #define PHY_UID_CS4223 0x03e57003
  367. #define PHY_UID_TN2020 0x00a19410
  368. #define PHY_UID_IN112525_S03 0x02107440
  369. #endif