mxs_nand.h 2.7 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * NXP GPMI NAND flash driver
  4. *
  5. * Copyright (C) 2018 Toradex
  6. * Authors:
  7. * Stefan Agner <stefan.agner@toradex.com>
  8. */
  9. #include <linux/mtd/mtd.h>
  10. #include <asm/cache.h>
  11. #include <nand.h>
  12. #include <asm/mach-imx/dma.h>
  13. /**
  14. * @gf_len: The length of Galois Field. (e.g., 13 or 14)
  15. * @ecc_strength: A number that describes the strength of the ECC
  16. * algorithm.
  17. * @ecc_chunk_size: The size, in bytes, of a single ECC chunk. Note
  18. * the first chunk in the page includes both data and
  19. * metadata, so it's a bit larger than this value.
  20. * @ecc_chunk_count: The number of ECC chunks in the page,
  21. * @block_mark_byte_offset: The byte offset in the ECC-based page view at
  22. * which the underlying physical block mark appears.
  23. * @block_mark_bit_offset: The bit offset into the ECC-based page view at
  24. * which the underlying physical block mark appears.
  25. */
  26. struct bch_geometry {
  27. unsigned int gf_len;
  28. unsigned int ecc_strength;
  29. unsigned int ecc_chunk_size;
  30. unsigned int ecc_chunk_count;
  31. unsigned int block_mark_byte_offset;
  32. unsigned int block_mark_bit_offset;
  33. };
  34. struct mxs_nand_info {
  35. struct nand_chip chip;
  36. struct udevice *dev;
  37. unsigned int max_ecc_strength_supported;
  38. bool use_minimum_ecc;
  39. int cur_chip;
  40. uint32_t cmd_queue_len;
  41. uint32_t data_buf_size;
  42. struct bch_geometry bch_geometry;
  43. uint8_t *cmd_buf;
  44. uint8_t *data_buf;
  45. uint8_t *oob_buf;
  46. uint8_t marking_block_bad;
  47. uint8_t raw_oob_mode;
  48. struct mxs_gpmi_regs *gpmi_regs;
  49. struct mxs_bch_regs *bch_regs;
  50. /* Functions with altered behaviour */
  51. int (*hooked_read_oob)(struct mtd_info *mtd,
  52. loff_t from, struct mtd_oob_ops *ops);
  53. int (*hooked_write_oob)(struct mtd_info *mtd,
  54. loff_t to, struct mtd_oob_ops *ops);
  55. int (*hooked_block_markbad)(struct mtd_info *mtd,
  56. loff_t ofs);
  57. /* DMA descriptors */
  58. struct mxs_dma_desc **desc;
  59. uint32_t desc_index;
  60. /* Hardware BCH interface and randomizer */
  61. u32 en_randomizer;
  62. u32 writesize;
  63. u32 oobsize;
  64. u32 bch_flash0layout0;
  65. u32 bch_flash0layout1;
  66. };
  67. struct mxs_nand_layout {
  68. u32 nblocks;
  69. u32 meta_size;
  70. u32 data0_size;
  71. u32 ecc0;
  72. u32 datan_size;
  73. u32 eccn;
  74. };
  75. int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info);
  76. int mxs_nand_init_spl(struct nand_chip *nand);
  77. int mxs_nand_setup_ecc(struct mtd_info *mtd);
  78. void mxs_nand_mode_fcb(struct mtd_info *mtd);
  79. void mxs_nand_mode_normal(struct mtd_info *mtd);
  80. u32 mxs_nand_mark_byte_offset(struct mtd_info *mtd);
  81. u32 mxs_nand_mark_bit_offset(struct mtd_info *mtd);
  82. void mxs_nand_get_layout(struct mtd_info *mtd, struct mxs_nand_layout *l);