mpc8xx_irq.h 1.7 KB

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  1. #ifndef _MPC8XX_IRQ_H
  2. #define _MPC8XX_IRQ_H
  3. /* The MPC8xx cores have 16 possible interrupts. There are eight
  4. * possible level sensitive interrupts assigned and generated internally
  5. * from such devices as CPM, PCMCIA, RTC, PIT, TimeBase and Decrementer.
  6. * There are eight external interrupts (IRQs) that can be configured
  7. * as either level or edge sensitive.
  8. *
  9. * On some implementations, there is also the possibility of an 8259
  10. * through the PCI and PCI-ISA bridges.
  11. *
  12. * We don't support the 8259 (yet).
  13. */
  14. #define NR_SIU_INTS 16
  15. #define NR_8259_INTS 0
  16. #define NR_IRQS (NR_SIU_INTS + NR_8259_INTS)
  17. /* These values must be zero-based and map 1:1 with the SIU configuration.
  18. * They are used throughout the 8xx I/O subsystem to generate
  19. * interrupt masks, flags, and other control patterns. This is why the
  20. * current kernel assumption of the 8259 as the base controller is such
  21. * a pain in the butt.
  22. */
  23. #define SIU_IRQ0 (0) /* Highest priority */
  24. #define SIU_LEVEL0 (1)
  25. #define SIU_IRQ1 (2)
  26. #define SIU_LEVEL1 (3)
  27. #define SIU_IRQ2 (4)
  28. #define SIU_LEVEL2 (5)
  29. #define SIU_IRQ3 (6)
  30. #define SIU_LEVEL3 (7)
  31. #define SIU_IRQ4 (8)
  32. #define SIU_LEVEL4 (9)
  33. #define SIU_IRQ5 (10)
  34. #define SIU_LEVEL5 (11)
  35. #define SIU_IRQ6 (12)
  36. #define SIU_LEVEL6 (13)
  37. #define SIU_IRQ7 (14)
  38. #define SIU_LEVEL7 (15)
  39. /* The internal interrupts we can configure as we see fit.
  40. * My personal preference is CPM at level 2, which puts it above the
  41. * MBX PCI/ISA/IDE interrupts.
  42. */
  43. #ifdef CONFIG_SYS_CPM_INTERRUPT
  44. # define CPM_INTERRUPT CONFIG_SYS_CPM_INTERRUPT
  45. #else
  46. # define CPM_INTERRUPT SIU_LEVEL2
  47. #endif
  48. /* Some internal interrupt registers use an 8-bit mask for the interrupt
  49. * level instead of a number.
  50. */
  51. #define mk_int_int_mask(IL) (1 << (7 - (IL/2)))
  52. #endif /* _MPC8XX_IRQ_H */