mc9sdz60.h 2.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2009 Marc Kleine-Budde <mkl@pengutronix.de>
  4. *
  5. * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
  6. */
  7. #ifndef __ASM_ARCH_MC9SDZ60_H
  8. #define __ASM_ARCH_MC9SDZ60_H
  9. /**
  10. * Register addresses for the MC9SDZ60
  11. *
  12. * @note: these match those in the kernel drivers/mxc/mcu_pmic/mc9s08dz60.h
  13. * but not include/linux/mfd/mc9s08dz60/pmic.h
  14. *
  15. */
  16. enum mc9sdz60_reg {
  17. MC9SDZ60_REG_VERSION = 0x00,
  18. /* reserved 0x01 */
  19. MC9SDZ60_REG_SECS = 0x02,
  20. MC9SDZ60_REG_MINS = 0x03,
  21. MC9SDZ60_REG_HRS = 0x04,
  22. MC9SDZ60_REG_DAY = 0x05,
  23. MC9SDZ60_REG_DATE = 0x06,
  24. MC9SDZ60_REG_MONTH = 0x07,
  25. MC9SDZ60_REG_YEAR = 0x08,
  26. MC9SDZ60_REG_ALARM_SECS = 0x09,
  27. MC9SDZ60_REG_ALARM_MINS = 0x0a,
  28. MC9SDZ60_REG_ALARM_HRS = 0x0b,
  29. /* reserved 0x0c */
  30. /* reserved 0x0d */
  31. MC9SDZ60_REG_TS_CONTROL = 0x0e,
  32. MC9SDZ60_REG_X_LOW = 0x0f,
  33. MC9SDZ60_REG_Y_LOW = 0x10,
  34. MC9SDZ60_REG_XY_HIGH = 0x11,
  35. MC9SDZ60_REG_X_LEFT_LOW = 0x12,
  36. MC9SDZ60_REG_X_LEFT_HIGH = 0x13,
  37. MC9SDZ60_REG_X_RIGHT = 0x14,
  38. MC9SDZ60_REG_Y_TOP_LOW = 0x15,
  39. MC9SDZ60_REG_Y_TOP_HIGH = 0x16,
  40. MC9SDZ60_REG_Y_BOTTOM = 0x17,
  41. /* reserved 0x18 */
  42. /* reserved 0x19 */
  43. MC9SDZ60_REG_RESET_1 = 0x1a,
  44. MC9SDZ60_REG_RESET_2 = 0x1b,
  45. MC9SDZ60_REG_POWER_CTL = 0x1c,
  46. MC9SDZ60_REG_DELAY_CONFIG = 0x1d,
  47. /* reserved 0x1e */
  48. /* reserved 0x1f */
  49. MC9SDZ60_REG_GPIO_1 = 0x20,
  50. MC9SDZ60_REG_GPIO_2 = 0x21,
  51. MC9SDZ60_REG_KPD_1 = 0x22,
  52. MC9SDZ60_REG_KPD_2 = 0x23,
  53. MC9SDZ60_REG_KPD_CONTROL = 0x24,
  54. MC9SDZ60_REG_INT_ENABLE_1 = 0x25,
  55. MC9SDZ60_REG_INT_ENABLE_2 = 0x26,
  56. MC9SDZ60_REG_INT_FLAG_1 = 0x27,
  57. MC9SDZ60_REG_INT_FLAG_2 = 0x28,
  58. MC9SDZ60_REG_DES_FLAG = 0x29,
  59. };
  60. extern u8 mc9sdz60_reg_read(enum mc9sdz60_reg reg);
  61. extern void mc9sdz60_reg_write(enum mc9sdz60_reg reg, u8 val);
  62. #endif /* __ASM_ARCH_MC9SDZ60_H */