omap_gpmc.h 2.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
  4. * Rohit Choraria <rohitkc@ti.com>
  5. *
  6. * (C) Copyright 2013 Andreas Bießmann <andreas@biessmann.org>
  7. */
  8. #ifndef __ASM_OMAP_GPMC_H
  9. #define __ASM_OMAP_GPMC_H
  10. #define GPMC_BUF_EMPTY 0
  11. #define GPMC_BUF_FULL 1
  12. #define GPMC_MAX_SECTORS 8
  13. enum omap_ecc {
  14. /* 1-bit ECC calculation by Software, Error detection by Software */
  15. OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */
  16. /* 1-bit ECC calculation by GPMC, Error detection by Software */
  17. /* ECC layout compatible to legacy ROMCODE. */
  18. OMAP_ECC_HAM1_CODE_HW,
  19. /* 4-bit ECC calculation by GPMC, Error detection by Software */
  20. OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
  21. /* 4-bit ECC calculation by GPMC, Error detection by ELM */
  22. OMAP_ECC_BCH4_CODE_HW,
  23. /* 8-bit ECC calculation by GPMC, Error detection by Software */
  24. OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
  25. /* 8-bit ECC calculation by GPMC, Error detection by ELM */
  26. OMAP_ECC_BCH8_CODE_HW,
  27. /* 16-bit ECC calculation by GPMC, Error detection by ELM */
  28. OMAP_ECC_BCH16_CODE_HW,
  29. };
  30. struct gpmc_cs {
  31. u32 config1; /* 0x00 */
  32. u32 config2; /* 0x04 */
  33. u32 config3; /* 0x08 */
  34. u32 config4; /* 0x0C */
  35. u32 config5; /* 0x10 */
  36. u32 config6; /* 0x14 */
  37. u32 config7; /* 0x18 */
  38. u32 nand_cmd; /* 0x1C */
  39. u32 nand_adr; /* 0x20 */
  40. u32 nand_dat; /* 0x24 */
  41. u8 res[8]; /* blow up to 0x30 byte */
  42. };
  43. struct bch_res_0_3 {
  44. u32 bch_result_x[4];
  45. };
  46. struct bch_res_4_6 {
  47. u32 bch_result_x[3];
  48. };
  49. struct gpmc {
  50. u8 res1[0x10];
  51. u32 sysconfig; /* 0x10 */
  52. u8 res2[0x4];
  53. u32 irqstatus; /* 0x18 */
  54. u32 irqenable; /* 0x1C */
  55. u8 res3[0x20];
  56. u32 timeout_control; /* 0x40 */
  57. u8 res4[0xC];
  58. u32 config; /* 0x50 */
  59. u32 status; /* 0x54 */
  60. u8 res5[0x8]; /* 0x58 */
  61. struct gpmc_cs cs[8]; /* 0x60, 0x90, .. */
  62. u32 prefetch_config1; /* 0x1E0 */
  63. u32 prefetch_config2; /* 0x1E4 */
  64. u32 res6; /* 0x1E8 */
  65. u32 prefetch_control; /* 0x1EC */
  66. u32 prefetch_status; /* 0x1F0 */
  67. u32 ecc_config; /* 0x1F4 */
  68. u32 ecc_control; /* 0x1F8 */
  69. u32 ecc_size_config; /* 0x1FC */
  70. u32 ecc1_result; /* 0x200 */
  71. u32 ecc2_result; /* 0x204 */
  72. u32 ecc3_result; /* 0x208 */
  73. u32 ecc4_result; /* 0x20C */
  74. u32 ecc5_result; /* 0x210 */
  75. u32 ecc6_result; /* 0x214 */
  76. u32 ecc7_result; /* 0x218 */
  77. u32 ecc8_result; /* 0x21C */
  78. u32 ecc9_result; /* 0x220 */
  79. u8 res7[12]; /* 0x224 */
  80. u32 testmomde_ctrl; /* 0x230 */
  81. u8 res8[12]; /* 0x234 */
  82. struct bch_res_0_3 bch_result_0_3[GPMC_MAX_SECTORS]; /* 0x240,0x250, */
  83. u8 res9[16 * 4]; /* 0x2C0 - 0x2FF */
  84. struct bch_res_4_6 bch_result_4_6[GPMC_MAX_SECTORS]; /* 0x300,0x310, */
  85. };
  86. /* Used for board specific gpmc initialization */
  87. extern const struct gpmc *gpmc_cfg;
  88. extern char gpmc_cs0_flash;
  89. #endif /* __ASM_OMAP_GPMC_H */