fsl_sec_mon.h 1.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Common internal memory map for some Freescale SoCs
  4. *
  5. * Copyright 2015 Freescale Semiconductor, Inc.
  6. */
  7. #ifndef __FSL_SEC_MON_H
  8. #define __FSL_SEC_MON_H
  9. #include <common.h>
  10. #include <asm/io.h>
  11. #ifdef CONFIG_SYS_FSL_SEC_MON_LE
  12. #define sec_mon_in32(a) in_le32(a)
  13. #define sec_mon_out32(a, v) out_le32(a, v)
  14. #define sec_mon_in16(a) in_le16(a)
  15. #define sec_mon_clrbits32 clrbits_le32
  16. #define sec_mon_setbits32 setbits_le32
  17. #elif defined(CONFIG_SYS_FSL_SEC_MON_BE)
  18. #define sec_mon_in32(a) in_be32(a)
  19. #define sec_mon_out32(a, v) out_be32(a, v)
  20. #define sec_mon_in16(a) in_be16(a)
  21. #define sec_mon_clrbits32 clrbits_be32
  22. #define sec_mon_setbits32 setbits_be32
  23. #else
  24. #error Neither CONFIG_SYS_FSL_SEC_MON_LE nor CONFIG_SYS_FSL_SEC_MON_BE defined
  25. #endif
  26. struct ccsr_sec_mon_regs {
  27. u8 reserved0[0x04];
  28. u32 hp_com; /* 0x04 SEC_MON_HP Command Register */
  29. u8 reserved2[0x0c];
  30. u32 hp_stat; /* 0x08 SEC_MON_HP Status Register */
  31. };
  32. #define HPCOMR_SW_SV 0x100 /* Security Violation bit */
  33. #define HPCOMR_SW_FSV 0x200 /* Fatal Security Violation bit */
  34. #define HPCOMR_SSM_ST 0x1 /* SSM_ST field in SEC_MON command */
  35. #define HPCOMR_SSM_ST_DIS 0x2 /* Disable Secure to Trusted State */
  36. #define HPCOMR_SSM_SFNS_DIS 0x4 /* Disable Soft Fail to Non-Secure */
  37. #define HPSR_SSM_ST_CHECK 0x900 /* SEC_MON is in check state */
  38. #define HPSR_SSM_ST_NON_SECURE 0xb00 /* SEC_MON is in non secure state */
  39. #define HPSR_SSM_ST_TRUST 0xd00 /* SEC_MON is in trusted state */
  40. #define HPSR_SSM_ST_SOFT_FAIL 0x300 /* SEC_MON is in soft fail state */
  41. #define HPSR_SSM_ST_SECURE 0xf00 /* SEC_MON is in secure state */
  42. #define HPSR_SSM_ST_MASK 0xf00 /* Mask for SSM_ST field */
  43. /*
  44. * SEC_MON read. This specifies the possible reads
  45. * from the SEC_MON
  46. */
  47. enum {
  48. SEC_MON_SSM_ST,
  49. SEC_MON_SW_FSV,
  50. SEC_MON_SW_SV,
  51. };
  52. /* Transition SEC_MON state */
  53. int set_sec_mon_state(u32 state);
  54. #endif /* __FSL_SEC_MON_H */