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- /*
- * Synopsys HSDK SDP CGU clock driver dts bindings
- *
- * Copyright (C) 2017 Synopsys
- * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
- #ifndef __DT_BINDINGS_CLK_HSDK_CGU_H_
- #define __DT_BINDINGS_CLK_HSDK_CGU_H_
- #define CLK_ARC_PLL 0
- #define CLK_ARC 1
- #define CLK_DDR_PLL 2
- #define CLK_SYS_PLL 3
- #define CLK_SYS_APB 4
- #define CLK_SYS_AXI 5
- #define CLK_SYS_ETH 6
- #define CLK_SYS_USB 7
- #define CLK_SYS_SDIO 8
- #define CLK_SYS_HDMI 9
- #define CLK_SYS_GFX_CORE 10
- #define CLK_SYS_GFX_DMA 11
- #define CLK_SYS_GFX_CFG 12
- #define CLK_SYS_DMAC_CORE 13
- #define CLK_SYS_DMAC_CFG 14
- #define CLK_SYS_SDIO_REF 15
- #define CLK_SYS_SPI_REF 16
- #define CLK_SYS_I2C_REF 17
- #define CLK_SYS_UART_REF 18
- #define CLK_SYS_EBI_REF 19
- #define CLK_TUN_PLL 20
- #define CLK_TUN_TUN 21
- #define CLK_TUN_ROM 22
- #define CLK_TUN_PWM 23
- #define CLK_HDMI_PLL 24
- #define CLK_HDMI 25
- #endif /* __DT_BINDINGS_CLK_HSDK_CGU_H_ */
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