bcm63268-clock.h 1.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
  4. *
  5. * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
  6. */
  7. #ifndef __DT_BINDINGS_CLOCK_BCM63268_H
  8. #define __DT_BINDINGS_CLOCK_BCM63268_H
  9. #define BCM63268_CLK_GLESS 0
  10. #define BCM63268_CLK_VDSL_QPROC 1
  11. #define BCM63268_CLK_VDSL_AFE 2
  12. #define BCM63268_CLK_VDSL 3
  13. #define BCM63268_CLK_MIPS 4
  14. #define BCM63268_CLK_WLAN_OCP 5
  15. #define BCM63268_CLK_DECT 6
  16. #define BCM63268_CLK_FAP0 7
  17. #define BCM63268_CLK_FAP1 8
  18. #define BCM63268_CLK_SAR 9
  19. #define BCM63268_CLK_ROBOSW 10
  20. #define BCM63268_CLK_PCM 11
  21. #define BCM63268_CLK_USBD 12
  22. #define BCM63268_CLK_USBH 13
  23. #define BCM63268_CLK_IPSEC 14
  24. #define BCM63268_CLK_SPI 15
  25. #define BCM63268_CLK_HSSPI 16
  26. #define BCM63268_CLK_PCIE 17
  27. #define BCM63268_CLK_PHYMIPS 18
  28. #define BCM63268_CLK_GMAC 19
  29. #define BCM63268_CLK_NAND 20
  30. #define BCM63268_CLK_TBUS 27
  31. #define BCM63268_CLK_ROBOSW250 31
  32. #define BCM63268_TCLK_EPHY1 0
  33. #define BCM63268_TCLK_EPHY2 1
  34. #define BCM63268_TCLK_EPHY3 2
  35. #define BCM63268_TCLK_GPHY 3
  36. #define BCM63268_TCLK_DSL 4
  37. #define BCM63268_TCLK_WO_EPHY 5
  38. #define BCM63268_TCLK_WO_DSL 6
  39. #define BCM63268_TCLK_FAP1 11
  40. #define BCM63268_TCLK_FAP2 15
  41. #define BCM63268_TCLK_UTO_50 16
  42. #define BCM63268_TCLK_UTO_EXT 17
  43. #define BCM63268_TCLK_USB_REF 18
  44. #define BCM63268_TCLK_SW_RST 29
  45. #define BCM63268_TCLK_HW_RST 30
  46. #define BCM63268_TCLK_POR_RST 31
  47. #endif /* __DT_BINDINGS_CLOCK_BCM63268_H */