zynq-common.h 7.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
  4. * (C) Copyright 2013 - 2018 Xilinx, Inc.
  5. *
  6. * Common configuration options for all Zynq boards.
  7. */
  8. #ifndef __CONFIG_ZYNQ_COMMON_H
  9. #define __CONFIG_ZYNQ_COMMON_H
  10. /* CPU clock */
  11. #ifndef CONFIG_CPU_FREQ_HZ
  12. # define CONFIG_CPU_FREQ_HZ 800000000
  13. #endif
  14. #define CONFIG_REMAKE_ELF
  15. /* Cache options */
  16. #define CONFIG_SYS_L2CACHE_OFF
  17. #ifndef CONFIG_SYS_L2CACHE_OFF
  18. # define CONFIG_SYS_L2_PL310
  19. # define CONFIG_SYS_PL310_BASE 0xf8f02000
  20. #endif
  21. #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
  22. #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR
  23. #define CONFIG_SYS_TIMER_COUNTS_DOWN
  24. #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
  25. /* Serial drivers */
  26. /* The following table includes the supported baudrates */
  27. #define CONFIG_SYS_BAUDRATE_TABLE \
  28. {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
  29. #define CONFIG_ARM_DCC
  30. /* Ethernet driver */
  31. #if defined(CONFIG_ZYNQ_GEM)
  32. # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  33. # define CONFIG_BOOTP_MAY_FAIL
  34. #endif
  35. /* QSPI */
  36. /* NOR */
  37. #ifdef CONFIG_MTD_NOR_FLASH
  38. # define CONFIG_SYS_FLASH_BASE 0xE2000000
  39. # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
  40. # define CONFIG_SYS_MAX_FLASH_BANKS 1
  41. # define CONFIG_SYS_MAX_FLASH_SECT 512
  42. # define CONFIG_SYS_FLASH_ERASE_TOUT 1000
  43. # define CONFIG_SYS_FLASH_WRITE_TOUT 5000
  44. # define CONFIG_FLASH_SHOW_PROGRESS 10
  45. # undef CONFIG_SYS_FLASH_EMPTY_INFO
  46. #endif
  47. #ifdef CONFIG_NAND_ZYNQ
  48. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  49. #define CONFIG_SYS_NAND_ONFI_DETECTION
  50. #endif
  51. #ifdef CONFIG_USB_EHCI_ZYNQ
  52. # define CONFIG_EHCI_IS_TDI
  53. # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
  54. # define DFU_DEFAULT_POLL_TIMEOUT 300
  55. # define CONFIG_THOR_RESET_OFF
  56. # define DFU_ALT_INFO_RAM \
  57. "dfu_ram_info=" \
  58. "setenv dfu_alt_info " \
  59. "${kernel_image} ram 0x3000000 0x500000\\\\;" \
  60. "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
  61. "${ramdisk_image} ram 0x2000000 0x600000\0" \
  62. "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
  63. "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
  64. # if defined(CONFIG_MMC_SDHCI_ZYNQ)
  65. # define DFU_ALT_INFO_MMC \
  66. "dfu_mmc_info=" \
  67. "setenv dfu_alt_info " \
  68. "${kernel_image} fat 0 1\\\\;" \
  69. "${devicetree_image} fat 0 1\\\\;" \
  70. "${ramdisk_image} fat 0 1\0" \
  71. "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
  72. "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
  73. # define DFU_ALT_INFO \
  74. DFU_ALT_INFO_RAM \
  75. DFU_ALT_INFO_MMC
  76. # else
  77. # define DFU_ALT_INFO \
  78. DFU_ALT_INFO_RAM
  79. # endif
  80. #endif
  81. #if !defined(DFU_ALT_INFO)
  82. # define DFU_ALT_INFO
  83. #endif
  84. /* Allow to overwrite serial and ethaddr */
  85. #define CONFIG_ENV_OVERWRITE
  86. /* enable preboot to be loaded before CONFIG_BOOTDELAY */
  87. /* Boot configuration */
  88. #define CONFIG_SYS_LOAD_ADDR 0 /* default? */
  89. #ifdef CONFIG_SPL_BUILD
  90. #define BOOTENV
  91. #else
  92. #ifdef CONFIG_CMD_MMC
  93. #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
  94. #else
  95. #define BOOT_TARGET_DEVICES_MMC(func)
  96. #endif
  97. #ifdef CONFIG_CMD_USB
  98. #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) func(USB, usb, 1)
  99. #else
  100. #define BOOT_TARGET_DEVICES_USB(func)
  101. #endif
  102. #if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP)
  103. #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
  104. #else
  105. #define BOOT_TARGET_DEVICES_PXE(func)
  106. #endif
  107. #if defined(CONFIG_CMD_DHCP)
  108. #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
  109. #else
  110. #define BOOT_TARGET_DEVICES_DHCP(func)
  111. #endif
  112. #if defined(CONFIG_ZYNQ_QSPI)
  113. # define BOOT_TARGET_DEVICES_QSPI(func) func(QSPI, qspi, na)
  114. #else
  115. # define BOOT_TARGET_DEVICES_QSPI(func)
  116. #endif
  117. #if defined(CONFIG_NAND_ZYNQ)
  118. # define BOOT_TARGET_DEVICES_NAND(func) func(NAND, nand, na)
  119. #else
  120. # define BOOT_TARGET_DEVICES_NAND(func)
  121. #endif
  122. #if defined(CONFIG_MTD_NOR_FLASH)
  123. # define BOOT_TARGET_DEVICES_NOR(func) func(NOR, nor, na)
  124. #else
  125. # define BOOT_TARGET_DEVICES_NOR(func)
  126. #endif
  127. #define BOOTENV_DEV_QSPI(devtypeu, devtypel, instance) \
  128. "bootcmd_qspi=sf probe 0 0 0 && " \
  129. "sf read ${scriptaddr} ${script_offset_f} ${script_size_f} && " \
  130. "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
  131. #define BOOTENV_DEV_NAME_QSPI(devtypeu, devtypel, instance) \
  132. "qspi "
  133. #define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
  134. "bootcmd_nand=nand info && " \
  135. "nand read ${scriptaddr} ${script_offset_f} ${script_size_f} && " \
  136. "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
  137. #define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
  138. "nand "
  139. #define BOOTENV_DEV_NOR(devtypeu, devtypel, instance) \
  140. "script_offset_nor=0xE2FC0000\0" \
  141. "bootcmd_nor=cp.b ${script_offset_nor} ${scriptaddr} ${script_size_f} && " \
  142. "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
  143. #define BOOTENV_DEV_NAME_NOR(devtypeu, devtypel, instance) \
  144. "nor "
  145. #define BOOT_TARGET_DEVICES(func) \
  146. BOOT_TARGET_DEVICES_MMC(func) \
  147. BOOT_TARGET_DEVICES_QSPI(func) \
  148. BOOT_TARGET_DEVICES_NAND(func) \
  149. BOOT_TARGET_DEVICES_NOR(func) \
  150. BOOT_TARGET_DEVICES_USB(func) \
  151. BOOT_TARGET_DEVICES_PXE(func) \
  152. BOOT_TARGET_DEVICES_DHCP(func)
  153. #include <config_distro_bootcmd.h>
  154. #endif /* CONFIG_SPL_BUILD */
  155. /* Default environment */
  156. #ifndef CONFIG_EXTRA_ENV_SETTINGS
  157. #define CONFIG_EXTRA_ENV_SETTINGS \
  158. "fdt_high=0x20000000\0" \
  159. "initrd_high=0x20000000\0" \
  160. "scriptaddr=0x20000\0" \
  161. "script_offset_f=0xFC0000\0" \
  162. "script_size_f=0x40000\0" \
  163. "fdt_addr_r=0x1f00000\0" \
  164. "pxefile_addr_r=0x2000000\0" \
  165. "kernel_addr_r=0x2000000\0" \
  166. "scriptaddr=0x3000000\0" \
  167. "ramdisk_addr_r=0x3100000\0" \
  168. DFU_ALT_INFO \
  169. BOOTENV
  170. #endif
  171. /* Miscellaneous configurable options */
  172. #define CONFIG_CLOCKS
  173. #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
  174. #define CONFIG_SYS_CBSIZE 2048 /* Console I/O Buffer Size */
  175. #define CONFIG_SYS_MEMTEST_START 0
  176. #define CONFIG_SYS_MEMTEST_END 0x1000
  177. #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
  178. #define CONFIG_SYS_INIT_RAM_SIZE 0x2000
  179. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
  180. CONFIG_SYS_INIT_RAM_SIZE - \
  181. GENERATED_GBL_DATA_SIZE)
  182. /* Extend size of kernel image for uncompression */
  183. #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
  184. /* Boot FreeBSD/vxWorks from an ELF image */
  185. #define CONFIG_SYS_MMC_MAX_DEVICE 1
  186. /* MMC support */
  187. #ifdef CONFIG_MMC_SDHCI_ZYNQ
  188. #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
  189. #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
  190. #endif
  191. /* Address in RAM where the parameters must be copied by SPL. */
  192. #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
  193. #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
  194. #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
  195. /* Not using MMC raw mode - just for compilation purpose */
  196. #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
  197. #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
  198. #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
  199. /* qspi mode is working fine */
  200. #ifdef CONFIG_ZYNQ_QSPI
  201. #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
  202. #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
  203. #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \
  204. CONFIG_SYS_SPI_ARGS_SIZE)
  205. #endif
  206. /* SP location before relocation, must use scratch RAM */
  207. /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
  208. #define CONFIG_SPL_MAX_SIZE 0x30000
  209. /* On the top of OCM space */
  210. #define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR
  211. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000
  212. /*
  213. * SPL stack position - and stack goes down
  214. * 0xfffffe00 is used for putting wfi loop.
  215. * Set it up as limit for now.
  216. */
  217. #define CONFIG_SPL_STACK 0xfffffe00
  218. /* BSS setup */
  219. #define CONFIG_SPL_BSS_START_ADDR 0x100000
  220. #define CONFIG_SPL_BSS_MAX_SIZE 0x100000
  221. #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000
  222. #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
  223. #endif /* __CONFIG_ZYNQ_COMMON_H */