wb50n.h 2.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Configuation settings for the WB50N CPU Module.
  4. */
  5. #ifndef __CONFIG_H
  6. #define __CONFIG_H
  7. #include <asm/hardware.h>
  8. /* ARM asynchronous clock */
  9. #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
  10. #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
  11. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  12. #define CONFIG_SETUP_MEMORY_TAGS
  13. #define CONFIG_INITRD_TAG
  14. #ifndef CONFIG_SPL_BUILD
  15. #define CONFIG_SKIP_LOWLEVEL_INIT
  16. #endif
  17. /* general purpose I/O */
  18. #define CONFIG_AT91_GPIO
  19. /* serial console */
  20. #define CONFIG_ATMEL_USART
  21. #define CONFIG_USART_BASE ATMEL_BASE_DBGU
  22. #define CONFIG_USART_ID ATMEL_ID_DBGU
  23. /*
  24. * BOOTP options
  25. */
  26. #define CONFIG_BOOTP_BOOTFILESIZE
  27. /* SDRAM */
  28. #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
  29. #define CONFIG_SYS_SDRAM_SIZE 0x04000000
  30. #ifdef CONFIG_SPL_BUILD
  31. #define CONFIG_SYS_INIT_SP_ADDR 0x310000
  32. #else
  33. #define CONFIG_SYS_INIT_SP_ADDR \
  34. (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
  35. #endif
  36. #define CONFIG_SYS_MEMTEST_START 0x21000000
  37. #define CONFIG_SYS_MEMTEST_END 0x22000000
  38. /* NAND flash */
  39. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  40. #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
  41. /* our ALE is AD21 */
  42. #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
  43. /* our CLE is AD22 */
  44. #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
  45. #define CONFIG_SYS_NAND_ONFI_DETECTION
  46. /* Ethernet Hardware */
  47. #define CONFIG_MACB
  48. #define CONFIG_RMII
  49. #define CONFIG_NET_RETRY_COUNT 20
  50. #define CONFIG_MACB_SEARCH_PHY
  51. #define CONFIG_RGMII
  52. #define CONFIG_ETHADDR C0:EE:40:00:00:00
  53. #define CONFIG_ENV_OVERWRITE 1
  54. #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
  55. #define CONFIG_EXTRA_ENV_SETTINGS \
  56. "autoload=no\0" \
  57. "autostart=no\0"
  58. /* bootstrap + u-boot + env in nandflash */
  59. #define CONFIG_BOOTCOMMAND \
  60. "nand read 0x22000000 0x000e0000 0x500000; " \
  61. "bootm"
  62. #define CONFIG_BOOTARGS \
  63. "rw rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
  64. #define CONFIG_BAUDRATE 115200
  65. #define CONFIG_SYS_CBSIZE 1024
  66. #define CONFIG_SYS_MAXARGS 16
  67. #define CONFIG_SYS_PBSIZE \
  68. (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  69. /* Size of malloc() pool */
  70. #define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
  71. /* SPL */
  72. #define CONFIG_SPL_MAX_SIZE 0x10000
  73. #define CONFIG_SPL_BSS_START_ADDR 0x20000000
  74. #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
  75. #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
  76. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
  77. #define CONFIG_SYS_MONITOR_LEN (512 << 10)
  78. #define CONFIG_SPL_NAND_DRIVERS
  79. #define CONFIG_SPL_NAND_BASE
  80. #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
  81. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  82. #define CONFIG_SYS_NAND_PAGE_SIZE 0x800
  83. #define CONFIG_SYS_NAND_PAGE_COUNT 64
  84. #define CONFIG_SYS_NAND_OOBSIZE 64
  85. #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
  86. #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
  87. #endif