vexpress_common.h 7.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2011 ARM Limited
  4. * (C) Copyright 2010 Linaro
  5. * Matt Waddel, <matt.waddel@linaro.org>
  6. *
  7. * Configuration for Versatile Express. Parts were derived from other ARM
  8. * configurations.
  9. */
  10. #ifndef __VEXPRESS_COMMON_H
  11. #define __VEXPRESS_COMMON_H
  12. /*
  13. * Definitions copied from linux kernel:
  14. * arch/arm/mach-vexpress/include/mach/motherboard.h
  15. */
  16. #ifdef CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP
  17. /* CS register bases for the original memory map. */
  18. #define V2M_PA_CS0 0x40000000
  19. #define V2M_PA_CS1 0x44000000
  20. #define V2M_PA_CS2 0x48000000
  21. #define V2M_PA_CS3 0x4c000000
  22. #define V2M_PA_CS7 0x10000000
  23. #define V2M_PERIPH_OFFSET(x) (x << 12)
  24. #define V2M_SYSREGS (V2M_PA_CS7 + V2M_PERIPH_OFFSET(0))
  25. #define V2M_SYSCTL (V2M_PA_CS7 + V2M_PERIPH_OFFSET(1))
  26. #define V2M_SERIAL_BUS_PCI (V2M_PA_CS7 + V2M_PERIPH_OFFSET(2))
  27. #define V2M_BASE 0x60000000
  28. #elif defined(CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP)
  29. /* CS register bases for the extended memory map. */
  30. #define V2M_PA_CS0 0x08000000
  31. #define V2M_PA_CS1 0x0c000000
  32. #define V2M_PA_CS2 0x14000000
  33. #define V2M_PA_CS3 0x18000000
  34. #define V2M_PA_CS7 0x1c000000
  35. #define V2M_PERIPH_OFFSET(x) (x << 16)
  36. #define V2M_SYSREGS (V2M_PA_CS7 + V2M_PERIPH_OFFSET(1))
  37. #define V2M_SYSCTL (V2M_PA_CS7 + V2M_PERIPH_OFFSET(2))
  38. #define V2M_SERIAL_BUS_PCI (V2M_PA_CS7 + V2M_PERIPH_OFFSET(3))
  39. #define V2M_BASE 0x80000000
  40. #endif
  41. /*
  42. * Physical addresses, offset from V2M_PA_CS0-3
  43. */
  44. #define V2M_NOR0 (V2M_PA_CS0)
  45. #define V2M_NOR1 (V2M_PA_CS1)
  46. #define V2M_SRAM (V2M_PA_CS2)
  47. #define V2M_VIDEO_SRAM (V2M_PA_CS3 + 0x00000000)
  48. #define V2M_ISP1761 (V2M_PA_CS3 + 0x03000000)
  49. /* Common peripherals relative to CS7. */
  50. #define V2M_AACI (V2M_PA_CS7 + V2M_PERIPH_OFFSET(4))
  51. #define V2M_MMCI (V2M_PA_CS7 + V2M_PERIPH_OFFSET(5))
  52. #define V2M_KMI0 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(6))
  53. #define V2M_KMI1 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(7))
  54. #define V2M_UART0 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(9))
  55. #define V2M_UART1 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(10))
  56. #define V2M_UART2 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(11))
  57. #define V2M_UART3 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(12))
  58. #define V2M_WDT (V2M_PA_CS7 + V2M_PERIPH_OFFSET(15))
  59. #define V2M_TIMER01 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(17))
  60. #define V2M_TIMER23 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(18))
  61. #define V2M_SERIAL_BUS_DVI (V2M_PA_CS7 + V2M_PERIPH_OFFSET(22))
  62. #define V2M_RTC (V2M_PA_CS7 + V2M_PERIPH_OFFSET(23))
  63. #define V2M_CF (V2M_PA_CS7 + V2M_PERIPH_OFFSET(26))
  64. #define V2M_CLCD (V2M_PA_CS7 + V2M_PERIPH_OFFSET(31))
  65. #define V2M_SIZE_CS7 V2M_PERIPH_OFFSET(32)
  66. /* System register offsets. */
  67. #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
  68. #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
  69. #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
  70. /*
  71. * Configuration
  72. */
  73. #define SYS_CFG_START (1 << 31)
  74. #define SYS_CFG_WRITE (1 << 30)
  75. #define SYS_CFG_OSC (1 << 20)
  76. #define SYS_CFG_VOLT (2 << 20)
  77. #define SYS_CFG_AMP (3 << 20)
  78. #define SYS_CFG_TEMP (4 << 20)
  79. #define SYS_CFG_RESET (5 << 20)
  80. #define SYS_CFG_SCC (6 << 20)
  81. #define SYS_CFG_MUXFPGA (7 << 20)
  82. #define SYS_CFG_SHUTDOWN (8 << 20)
  83. #define SYS_CFG_REBOOT (9 << 20)
  84. #define SYS_CFG_DVIMODE (11 << 20)
  85. #define SYS_CFG_POWER (12 << 20)
  86. #define SYS_CFG_SITE_MB (0 << 16)
  87. #define SYS_CFG_SITE_DB1 (1 << 16)
  88. #define SYS_CFG_SITE_DB2 (2 << 16)
  89. #define SYS_CFG_STACK(n) ((n) << 12)
  90. #define SYS_CFG_ERR (1 << 1)
  91. #define SYS_CFG_COMPLETE (1 << 0)
  92. /* Board info register */
  93. #define SYS_ID V2M_SYSREGS
  94. #define CONFIG_REVISION_TAG 1
  95. #define CONFIG_SYS_MEMTEST_START V2M_BASE
  96. #define CONFIG_SYS_MEMTEST_END 0x20000000
  97. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  98. #define CONFIG_SETUP_MEMORY_TAGS 1
  99. #define CONFIG_SYS_L2CACHE_OFF 1
  100. #define CONFIG_INITRD_TAG 1
  101. /* Size of malloc() pool */
  102. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 512 * 1024) /* >= 512 KiB */
  103. #define SCTL_BASE V2M_SYSCTL
  104. #define VEXPRESS_FLASHPROG_FLVPPEN (1 << 0)
  105. #define CONFIG_SYS_TIMER_RATE 1000000
  106. #define CONFIG_SYS_TIMER_COUNTER (V2M_TIMER01 + 0x4)
  107. #define CONFIG_SYS_TIMER_COUNTS_DOWN
  108. /* PL011 Serial Configuration */
  109. #define CONFIG_PL011_CLOCK 24000000
  110. #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
  111. (void *)CONFIG_SYS_SERIAL1}
  112. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  113. #define CONFIG_SYS_SERIAL0 V2M_UART0
  114. #define CONFIG_SYS_SERIAL1 V2M_UART1
  115. #define CONFIG_ARM_PL180_MMCI
  116. #define CONFIG_ARM_PL180_MMCI_BASE V2M_MMCI
  117. #define CONFIG_SYS_MMC_MAX_BLK_COUNT 127
  118. #define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 6250000
  119. /* BOOTP options */
  120. #define CONFIG_BOOTP_BOOTFILESIZE
  121. /* Miscellaneous configurable options */
  122. #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x8000)
  123. #define LINUX_BOOT_PARAM_ADDR (V2M_BASE + 0x2000)
  124. /* Physical Memory Map */
  125. #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */
  126. #define PHYS_SDRAM_2 (((unsigned int)V2M_BASE) + \
  127. ((unsigned int)0x20000000))
  128. #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
  129. #define PHYS_SDRAM_2_SIZE 0x20000000 /* 512 MB */
  130. /* additions for new relocation code */
  131. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  132. #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
  133. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
  134. CONFIG_SYS_INIT_RAM_SIZE - \
  135. GENERATED_GBL_DATA_SIZE)
  136. #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
  137. /* Basic environment settings */
  138. #define BOOT_TARGET_DEVICES(func) \
  139. func(MMC, mmc, 1) \
  140. func(MMC, mmc, 0) \
  141. func(PXE, pxe, na) \
  142. func(DHCP, dhcp, na)
  143. #include <config_distro_bootcmd.h>
  144. #ifdef CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP
  145. #define CONFIG_PLATFORM_ENV_SETTINGS \
  146. "loadaddr=0x80008000\0" \
  147. "ramdisk_addr_r=0x61000000\0" \
  148. "kernel_addr=0x44100000\0" \
  149. "ramdisk_addr=0x44800000\0" \
  150. "maxramdisk=0x1800000\0" \
  151. "pxefile_addr_r=0x88000000\0" \
  152. "scriptaddr=0x88000000\0" \
  153. "kernel_addr_r=0x80008000\0"
  154. #elif defined(CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP)
  155. #define CONFIG_PLATFORM_ENV_SETTINGS \
  156. "loadaddr=0xa0008000\0" \
  157. "ramdisk_addr_r=0x81000000\0" \
  158. "kernel_addr=0x0c100000\0" \
  159. "ramdisk_addr=0x0c800000\0" \
  160. "maxramdisk=0x1800000\0" \
  161. "pxefile_addr_r=0xa8000000\0" \
  162. "scriptaddr=0xa8000000\0" \
  163. "kernel_addr_r=0xa0008000\0"
  164. #endif
  165. #define CONFIG_EXTRA_ENV_SETTINGS \
  166. CONFIG_PLATFORM_ENV_SETTINGS \
  167. BOOTENV \
  168. "console=ttyAMA0,38400n8\0" \
  169. "dram=1024M\0" \
  170. "root=/dev/sda1 rw\0" \
  171. "mtd=armflash:1M@0x800000(uboot),7M@0x1000000(kernel)," \
  172. "24M@0x2000000(initrd)\0" \
  173. "flashargs=setenv bootargs root=${root} console=${console} " \
  174. "mem=${dram} mtdparts=${mtd} mmci.fmax=190000 " \
  175. "devtmpfs.mount=0 vmalloc=256M\0" \
  176. "bootflash=run flashargs; " \
  177. "cp ${ramdisk_addr} ${ramdisk_addr_r} ${maxramdisk}; " \
  178. "bootm ${kernel_addr} ${ramdisk_addr_r}\0"
  179. /* FLASH and environment organization */
  180. #define PHYS_FLASH_SIZE 0x04000000 /* 64MB */
  181. #define CONFIG_SYS_FLASH_SIZE 0x04000000
  182. #define CONFIG_SYS_MAX_FLASH_BANKS 2
  183. #define CONFIG_SYS_FLASH_BASE0 V2M_NOR0
  184. #define CONFIG_SYS_FLASH_BASE1 V2M_NOR1
  185. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE0
  186. /* Timeout values in ticks */
  187. #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
  188. #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
  189. /* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */
  190. #define CONFIG_SYS_MAX_FLASH_SECT 259 /* Max sectors */
  191. #define FLASH_MAX_SECTOR_SIZE 0x00040000 /* 256 KB sectors */
  192. /* Room required on the stack for the environment data */
  193. /*
  194. * Amount of flash used for environment:
  195. * We don't know which end has the small erase blocks so we use the penultimate
  196. * sector location for the environment
  197. */
  198. #define CONFIG_ENV_OVERWRITE 1
  199. /* Store environment at top of flash */
  200. #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
  201. #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE0, \
  202. CONFIG_SYS_FLASH_BASE1 }
  203. /* Monitor Command Prompt */
  204. #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
  205. #endif /* VEXPRESS_COMMON_H */