tegra114-common.h 2.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
  4. */
  5. #ifndef _TEGRA114_COMMON_H_
  6. #define _TEGRA114_COMMON_H_
  7. #include "tegra-common.h"
  8. /*
  9. * NS16550 Configuration
  10. */
  11. #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
  12. /*
  13. * Miscellaneous configurable options
  14. */
  15. #define CONFIG_STACKBASE 0x83800000 /* 56MB */
  16. /*-----------------------------------------------------------------------
  17. * Physical Memory Map
  18. */
  19. /*
  20. * Memory layout for where various images get loaded by boot scripts:
  21. *
  22. * scriptaddr can be pretty much anywhere that doesn't conflict with something
  23. * else. Put it above BOOTMAPSZ to eliminate conflicts.
  24. *
  25. * pxefile_addr_r can be pretty much anywhere that doesn't conflict with
  26. * something else. Put it above BOOTMAPSZ to eliminate conflicts.
  27. *
  28. * kernel_addr_r must be within the first 128M of RAM in order for the
  29. * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
  30. * decompress itself to 0x8000 after the start of RAM, kernel_addr_r
  31. * should not overlap that area, or the kernel will have to copy itself
  32. * somewhere else before decompression. Similarly, the address of any other
  33. * data passed to the kernel shouldn't overlap the start of RAM. Pushing
  34. * this up to 32M allows for a sizable kernel to be decompressed below the
  35. * compressed load address.
  36. *
  37. * fdt_addr_r simply shouldn't overlap anything else. Choosing 48M allows for
  38. * the compressed kernel to be up to 32M too.
  39. *
  40. * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows
  41. * for the FDT/DTB to be up to 1M, which is hopefully plenty.
  42. */
  43. #define CONFIG_LOADADDR 0x81000000
  44. #define MEM_LAYOUT_ENV_SETTINGS \
  45. "scriptaddr=0x90000000\0" \
  46. "pxefile_addr_r=0x90100000\0" \
  47. "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
  48. "fdt_addr_r=0x83000000\0" \
  49. "ramdisk_addr_r=0x83100000\0"
  50. /* Defines for SPL */
  51. #define CONFIG_SYS_SPL_MALLOC_START 0x80090000
  52. #define CONFIG_SPL_STACK 0x800ffffc
  53. /* For USB EHCI controller */
  54. #define CONFIG_EHCI_IS_TDI
  55. #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
  56. #endif /* _TEGRA114_COMMON_H_ */