taurus.h 6.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
  4. * (C) Copyright 2013 Siemens AG
  5. *
  6. * Based on:
  7. * U-Boot file: include/configs/at91sam9260ek.h
  8. *
  9. * (C) Copyright 2007-2008
  10. * Stelian Pop <stelian@popies.net>
  11. * Lead Tech Design <www.leadtechdesign.com>
  12. */
  13. #ifndef __CONFIG_H
  14. #define __CONFIG_H
  15. /*
  16. * SoC must be defined first, before hardware.h is included.
  17. * In this case SoC is defined in boards.cfg.
  18. */
  19. #include <asm/hardware.h>
  20. #include <linux/sizes.h>
  21. /*
  22. * Warning: changing CONFIG_SYS_TEXT_BASE requires
  23. * adapting the initial boot program.
  24. * Since the linker has to swallow that define, we must use a pure
  25. * hex number here!
  26. */
  27. /* ARM asynchronous clock */
  28. #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
  29. #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
  30. /* Misc CPU related */
  31. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  32. #define CONFIG_SETUP_MEMORY_TAGS
  33. #define CONFIG_INITRD_TAG
  34. #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
  35. /* general purpose I/O */
  36. #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
  37. #define CONFIG_AT91_GPIO
  38. #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
  39. #define CONFIG_USART_BASE ATMEL_BASE_DBGU
  40. #define CONFIG_USART_ID ATMEL_ID_SYS
  41. /*
  42. * SDRAM: 1 bank, min 32, max 128 MB
  43. * Initialized before u-boot gets started.
  44. */
  45. #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
  46. #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
  47. /*
  48. * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
  49. * leaving the correct space for initial global data structure above
  50. * that address while providing maximum stack area below.
  51. */
  52. #define CONFIG_SYS_INIT_SP_ADDR \
  53. (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
  54. /* NAND flash */
  55. #ifdef CONFIG_CMD_NAND
  56. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  57. #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
  58. #define CONFIG_SYS_NAND_DBW_8
  59. #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
  60. #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
  61. #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
  62. #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
  63. #endif
  64. /* Ethernet */
  65. #define CONFIG_MACB
  66. #define CONFIG_RMII
  67. #define CONFIG_AT91_WANTS_COMMON_PHY
  68. /* USB */
  69. #if defined(CONFIG_BOARD_TAURUS)
  70. #define CONFIG_USB_ATMEL
  71. #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  72. #define CONFIG_USB_OHCI_NEW
  73. #define CONFIG_SYS_USB_OHCI_CPU_INIT
  74. #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
  75. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
  76. #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
  77. /* USB DFU support */
  78. #define CONFIG_USB_GADGET_AT91
  79. /* DFU class support */
  80. #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
  81. #define DFU_MANIFEST_POLL_TIMEOUT 25000
  82. #endif
  83. /* SPI EEPROM */
  84. #define TAURUS_SPI_MASK (1 << 4)
  85. #if defined(CONFIG_SPL_BUILD)
  86. /* SPL related */
  87. #endif
  88. /* load address */
  89. #define CONFIG_SYS_LOAD_ADDR 0x22000000
  90. /* bootstrap in spi flash , u-boot + env + linux in nandflash */
  91. #ifndef CONFIG_SPL_BUILD
  92. #if defined(CONFIG_BOARD_AXM)
  93. #define CONFIG_EXTRA_ENV_SETTINGS \
  94. "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
  95. "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
  96. "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
  97. "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
  98. "boot_retries=0\0" \
  99. "ethact=macb0\0" \
  100. "flash_nfs=run nand_kernel;run nfsargs;run addip;" \
  101. "upgrade_available;bootm ${kernel_ram};reset\0" \
  102. "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
  103. "bootm ${kernel_ram};reset\0" \
  104. "flash_self_test=run nand_kernel;run setbootargs addtest;" \
  105. "upgrade_available;bootm ${kernel_ram};reset\0" \
  106. "hostname=systemone\0" \
  107. "kernel_Off=0x00200000\0" \
  108. "kernel_Off_fallback=0x03800000\0" \
  109. "kernel_ram=0x21500000\0" \
  110. "kernel_size=0x00400000\0" \
  111. "kernel_size_fallback=0x00400000\0" \
  112. "loads_echo=1\0" \
  113. "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
  114. "${kernel_size}\0" \
  115. "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
  116. "run nfsargs;run addip;upgrade_available;" \
  117. "bootm ${kernel_ram};reset\0" \
  118. "netdev=eth0\0" \
  119. "nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs " \
  120. "rw nfsroot=${serverip}:${rootpath} " \
  121. "at91sam9_wdt.wdt_timeout=16\0" \
  122. "partitionset_active=A\0" \
  123. "preboot=echo;echo Type 'run flash_self' to use kernel and root " \
  124. "filesystem on memory;echo Type 'run flash_nfs' to use " \
  125. "kernel from memory and root filesystem over NFS;echo Type " \
  126. "'run net_nfs' to get Kernel over TFTP and mount root " \
  127. "filesystem over NFS;echo\0" \
  128. "project_dir=systemone\0" \
  129. "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0" \
  130. "rootfs=/dev/mtdblock5\0" \
  131. "rootfs_fallback=/dev/mtdblock7\0" \
  132. "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops " \
  133. "root=${rootfs} rootfstype=jffs2 panic=7 " \
  134. "at91sam9_wdt.wdt_timeout=16\0" \
  135. "stderr=serial\0" \
  136. "stdin=serial\0" \
  137. "stdout=serial\0" \
  138. "upgrade_available=0\0"
  139. #endif
  140. #endif /* #ifndef CONFIG_SPL_BUILD */
  141. /*
  142. * Size of malloc() pool
  143. */
  144. #define CONFIG_SYS_MALLOC_LEN \
  145. ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
  146. /* Defines for SPL */
  147. #define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
  148. #define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
  149. #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
  150. CONFIG_SYS_MALLOC_LEN)
  151. #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
  152. #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
  153. #define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
  154. #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
  155. #define CONFIG_SYS_USE_NANDFLASH 1
  156. #define CONFIG_SPL_NAND_DRIVERS
  157. #define CONFIG_SPL_NAND_BASE
  158. #define CONFIG_SPL_NAND_ECC
  159. #define CONFIG_SPL_NAND_RAW_ONLY
  160. #define CONFIG_SPL_NAND_SOFTECC
  161. #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
  162. #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
  163. #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
  164. #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
  165. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  166. #define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
  167. #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
  168. #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
  169. #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
  170. CONFIG_SYS_NAND_PAGE_SIZE)
  171. #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
  172. #define CONFIG_SYS_NAND_ECCSIZE 256
  173. #define CONFIG_SYS_NAND_ECCBYTES 3
  174. #define CONFIG_SYS_NAND_OOBSIZE 64
  175. #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
  176. 48, 49, 50, 51, 52, 53, 54, 55, \
  177. 56, 57, 58, 59, 60, 61, 62, 63, }
  178. #define CONFIG_SPL_ATMEL_SIZE
  179. #define CONFIG_SYS_MASTER_CLOCK 132096000
  180. #define AT91_PLL_LOCK_TIMEOUT 1000000
  181. #define CONFIG_SYS_AT91_PLLA 0x202A3F01
  182. #define CONFIG_SYS_MCKR 0x1300
  183. #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
  184. #define CONFIG_SYS_AT91_PLLB 0x10193F05
  185. #define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS
  186. #define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO
  187. #endif