socfpga_sr1500.h 894 B

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2015 Stefan Roese <sr@denx.de>
  4. */
  5. #ifndef __CONFIG_SOCFPGA_SR1500_H__
  6. #define __CONFIG_SOCFPGA_SR1500_H__
  7. #include <asm/arch/base_addr_ac5.h>
  8. /* Memory configurations */
  9. #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SR1500 */
  10. /* Booting Linux */
  11. #define CONFIG_LOADADDR 0x01000000
  12. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  13. /* Ethernet on SoC (EMAC) */
  14. #define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII
  15. /* The PHY is autodetected, so no MII PHY address is needed here */
  16. #define PHY_ANEG_TIMEOUT 8000
  17. /* Enable SPI NOR flash reset, needed for SPI booting */
  18. #define CONFIG_SPI_N25Q256A_RESET
  19. /*
  20. * Bootcounter
  21. */
  22. #define CONFIG_SYS_BOOTCOUNT_BE
  23. /* Environment setting for SPI flash */
  24. /* The rest of the configuration is shared */
  25. #include <configs/socfpga_common.h>
  26. #endif /* __CONFIG_SOCFPGA_SR1500_H__ */