snapper9g45.h 3.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Bluewater Systems Snapper 9G45 module
  4. *
  5. * (C) Copyright 2011 Bluewater Systems
  6. * Author: Andre Renaud <andre@bluewatersys.com>
  7. * Author: Ryan Mallon <ryan@bluewatersys.com>
  8. */
  9. #ifndef __CONFIG_H
  10. #define __CONFIG_H
  11. /* SoC type is defined in boards.cfg */
  12. #include <asm/hardware.h>
  13. #include <linux/sizes.h>
  14. /* ARM asynchronous clock */
  15. #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
  16. #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
  17. /* CPU */
  18. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  19. #define CONFIG_SETUP_MEMORY_TAGS
  20. #define CONFIG_INITRD_TAG
  21. #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
  22. /* SDRAM */
  23. #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
  24. #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */
  25. #define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM + 0x1000 - \
  26. GENERATED_GBL_DATA_SIZE)
  27. /* Mem test settings */
  28. #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
  29. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
  30. /* NAND Flash */
  31. #define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC
  32. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  33. #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
  34. #define CONFIG_SYS_NAND_DBW_8
  35. #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */
  36. #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */
  37. #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
  38. #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
  39. /* Ethernet */
  40. #define CONFIG_MACB
  41. #define CONFIG_RMII
  42. #define CONFIG_NET_RETRY_COUNT 20
  43. #define CONFIG_RESET_PHY_R
  44. #define CONFIG_AT91_WANTS_COMMON_PHY
  45. #define CONFIG_TFTP_PORT
  46. #define CONFIG_TFTP_TSIZE
  47. /* MMC */
  48. #define CONFIG_GENERIC_ATMEL_MCI
  49. /* LCD */
  50. #define CONFIG_ATMEL_LCD
  51. #define CONFIG_GURNARD_SPLASH
  52. /* GPIOs and IO expander */
  53. #define CONFIG_ATMEL_LEGACY
  54. #define CONFIG_AT91_GPIO
  55. #define CONFIG_AT91_GPIO_PULLUP 1
  56. /* UARTs/Serial console */
  57. #define CONFIG_ATMEL_USART
  58. /* Boot options */
  59. #define CONFIG_SYS_LOAD_ADDR 0x23000000
  60. #define CONFIG_BOOTP_BOOTFILESIZE
  61. /* Environment settings */
  62. #define CONFIG_ENV_OVERWRITE
  63. #define CONFIG_EXTRA_ENV_SETTINGS \
  64. "ethaddr=00:00:00:00:00:00\0" \
  65. "serial=0\0" \
  66. "stdout=serial_atmel\0" \
  67. "stderr=serial_atmel\0" \
  68. "stdin=serial_atmel\0" \
  69. "bootlimit=3\0" \
  70. "loadaddr=0x71000000\0" \
  71. "board_rev=2\0" \
  72. "bootfile=/tftpboot/uImage\0" \
  73. "bootargs_def=console=ttyS0,115200 panic=5 quiet lpj=997376\0" \
  74. "nfsroot=/export/root\0" \
  75. "boot_working=setenv bootargs $bootargs_def; nboot $loadaddr 0 0x20c0000 && bootm\0" \
  76. "boot_safe=setenv bootargs $bootargs_def; nboot $loadaddr 0 0xc0000 && bootm\0" \
  77. "boot_tftp=setenv bootargs $bootargs_def ip=any nfsroot=$nfsroot; setenv autoload y && bootp && bootm\0" \
  78. "boot_usb=setenv bootargs $bootargs_def; usb start && usb storage && fatload usb 0:1 $loadaddr dds-xm200.bin && bootm\0" \
  79. "boot_mmc=setenv bootargs $bootargs_def; mmc rescan && fatload mmc 0:1 $loadaddr dds-xm200.bin && bootm\0" \
  80. "bootcmd=run boot_mmc ; run boot_usb ; run boot_working ; run boot_safe\0" \
  81. "altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0"
  82. /* Console settings */
  83. /* U-Boot memory settings */
  84. #define CONFIG_SYS_MALLOC_LEN (1 << 20)
  85. /* Command line configuration */
  86. #define CONFIG_CMD_MII
  87. #define CONFIG_CMD_MMC
  88. #define CONFIG_CMD_CACHE
  89. #endif /* __CONFIG_H */