smartweb.h 6.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2007-2008
  4. * Stelian Pop <stelian@popies.net>
  5. * Lead Tech Design <www.leadtechdesign.com>
  6. *
  7. * (C) Copyright 2010
  8. * Achim Ehrlich <aehrlich@taskit.de>
  9. * taskit GmbH <www.taskit.de>
  10. *
  11. * (C) Copyright 2012
  12. * Markus Hubig <mhubig@imko.de>
  13. * IMKO GmbH <www.imko.de>
  14. *
  15. * (C) Copyright 2014
  16. * Heiko Schocher <hs@denx.de>
  17. * DENX Software Engineering GmbH
  18. *
  19. * Configuation settings for the smartweb.
  20. */
  21. #ifndef __CONFIG_H
  22. #define __CONFIG_H
  23. /*
  24. * SoC must be defined first, before hardware.h is included.
  25. * In this case SoC is defined in boards.cfg.
  26. */
  27. #include <asm/hardware.h>
  28. #include <linux/sizes.h>
  29. /*
  30. * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
  31. * program. Since the linker has to swallow that define, we must use a pure
  32. * hex number here!
  33. */
  34. /* ARM asynchronous clock */
  35. #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
  36. #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */
  37. /* misc settings */
  38. #define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */
  39. #define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */
  40. #define CONFIG_INITRD_TAG /* pass initrd param to kernel */
  41. #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY /* U-Boot is loaded by a bootloader */
  42. /* We set the max number of command args high to avoid HUSH bugs. */
  43. #define CONFIG_SYS_MAXARGS 32
  44. /* setting board specific options */
  45. #define CONFIG_MACH_TYPE MACH_TYPE_SMARTWEB
  46. #define CONFIG_ENV_OVERWRITE 1 /* Overwrite ethaddr / serial# */
  47. #define CONFIG_SYS_AUTOLOAD "yes"
  48. #define CONFIG_RESET_TO_RETRY
  49. /* The LED PINs */
  50. #define CONFIG_RED_LED AT91_PIN_PA9
  51. #define CONFIG_GREEN_LED AT91_PIN_PA6
  52. /*
  53. * SDRAM: 1 bank, 64 MB, base address 0x20000000
  54. * Already initialized before u-boot gets started.
  55. */
  56. #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
  57. #define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M)
  58. /*
  59. * Perform a SDRAM Memtest from the start of SDRAM
  60. * till the beginning of the U-Boot position in RAM.
  61. */
  62. #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
  63. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
  64. /* Size of malloc() pool */
  65. #define CONFIG_SYS_MALLOC_LEN \
  66. ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000)
  67. /* NAND flash settings */
  68. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  69. #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
  70. #define CONFIG_SYS_NAND_DBW_8
  71. #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
  72. #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
  73. #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
  74. #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
  75. /* general purpose I/O */
  76. #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
  77. #define CONFIG_AT91_GPIO /* enable the GPIO features */
  78. #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
  79. /* serial console */
  80. #define CONFIG_ATMEL_USART
  81. #define CONFIG_USART_BASE ATMEL_BASE_DBGU
  82. #define CONFIG_USART_ID ATMEL_ID_SYS
  83. /*
  84. * Ethernet configuration
  85. *
  86. */
  87. #define CONFIG_MACB
  88. #define CONFIG_RMII /* use reduced MII inteface */
  89. #define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */
  90. #define CONFIG_AT91_WANTS_COMMON_PHY
  91. /* BOOTP and DHCP options */
  92. #define CONFIG_BOOTP_BOOTFILESIZE
  93. #define CONFIG_NFSBOOTCOMMAND \
  94. "setenv autoload yes; setenv autoboot yes; " \
  95. "setenv bootargs ${basicargs} ${mtdparts} " \
  96. "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \
  97. "dhcp"
  98. #if !defined(CONFIG_SPL_BUILD)
  99. /* USB configuration */
  100. #define CONFIG_USB_ATMEL
  101. #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  102. #define CONFIG_USB_OHCI_NEW
  103. #define CONFIG_SYS_USB_OHCI_CPU_INIT
  104. #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
  105. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
  106. #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
  107. /* USB DFU support */
  108. #define CONFIG_USB_GADGET_AT91
  109. /* DFU class support */
  110. #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_1M
  111. #define DFU_MANIFEST_POLL_TIMEOUT 25000
  112. #endif
  113. /* General Boot Parameter */
  114. #define CONFIG_BOOTCOMMAND "run flashboot"
  115. #define CONFIG_SYS_CBSIZE 512
  116. /*
  117. * RAM Memory address where to put the
  118. * Linux Kernel befor starting.
  119. */
  120. #define CONFIG_SYS_LOAD_ADDR 0x22000000
  121. /*
  122. * The NAND Flash partitions:
  123. */
  124. #define CONFIG_ENV_RANGE (SZ_512K)
  125. /*
  126. * Predefined environment variables.
  127. * Usefull to define some easy to use boot commands.
  128. */
  129. #define CONFIG_EXTRA_ENV_SETTINGS \
  130. \
  131. "basicargs=console=ttyS0,115200\0" \
  132. \
  133. "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0"
  134. #ifdef CONFIG_SPL_BUILD
  135. #define CONFIG_SYS_INIT_SP_ADDR 0x301000
  136. #define CONFIG_SPL_STACK_R
  137. #define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE
  138. #else
  139. /*
  140. * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
  141. * leaving the correct space for initial global data structure above that
  142. * address while providing maximum stack area below.
  143. */
  144. #define CONFIG_SYS_INIT_SP_ADDR \
  145. (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
  146. #endif
  147. /* Defines for SPL */
  148. #define CONFIG_SPL_MAX_SIZE (SZ_4K)
  149. #define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE
  150. #define CONFIG_SPL_BSS_MAX_SIZE (SZ_16K)
  151. #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
  152. CONFIG_SPL_BSS_MAX_SIZE)
  153. #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
  154. #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
  155. #define CONFIG_SYS_USE_NANDFLASH 1
  156. #define CONFIG_SPL_NAND_DRIVERS
  157. #define CONFIG_SPL_NAND_BASE
  158. #define CONFIG_SPL_NAND_ECC
  159. #define CONFIG_SPL_NAND_RAW_ONLY
  160. #define CONFIG_SPL_NAND_SOFTECC
  161. #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
  162. #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
  163. #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
  164. #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
  165. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  166. #define CONFIG_SYS_NAND_SIZE (SZ_256M)
  167. #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
  168. #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
  169. #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
  170. CONFIG_SYS_NAND_PAGE_SIZE)
  171. #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
  172. #define CONFIG_SYS_NAND_ECCSIZE 256
  173. #define CONFIG_SYS_NAND_ECCBYTES 3
  174. #define CONFIG_SYS_NAND_OOBSIZE 64
  175. #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
  176. 48, 49, 50, 51, 52, 53, 54, 55, \
  177. 56, 57, 58, 59, 60, 61, 62, 63, }
  178. #define CONFIG_SPL_ATMEL_SIZE
  179. #define CONFIG_SYS_MASTER_CLOCK (198656000/2)
  180. #define AT91_PLL_LOCK_TIMEOUT 1000000
  181. #define CONFIG_SYS_AT91_PLLA 0x2060bf09
  182. #define CONFIG_SYS_MCKR 0x100
  183. #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
  184. #define CONFIG_SYS_AT91_PLLB 0x10483f0e
  185. #define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS
  186. #define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO
  187. #endif /* __CONFIG_H */