sh7763rdp.h 2.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Configuation settings for the Renesas SH7763RDP board
  4. *
  5. * Copyright (C) 2008 Renesas Solutions Corp.
  6. * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
  7. */
  8. #ifndef __SH7763RDP_H
  9. #define __SH7763RDP_H
  10. #define CONFIG_CPU_SH7763 1
  11. #define __LITTLE_ENDIAN 1
  12. #define CONFIG_ENV_OVERWRITE 1
  13. #define CONFIG_DISPLAY_BOARDINFO
  14. /* SCIF */
  15. #define CONFIG_CONS_SCIF2 1
  16. #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
  17. #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate
  18. settings for this board */
  19. /* SDRAM */
  20. #define CONFIG_SYS_SDRAM_BASE (0x8C000000)
  21. #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
  22. #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
  23. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
  24. /* Flash(NOR) */
  25. #define CONFIG_SYS_FLASH_BASE (0xA0000000)
  26. #define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
  27. #define CONFIG_SYS_MAX_FLASH_BANKS (1)
  28. #define CONFIG_SYS_MAX_FLASH_SECT (520)
  29. /* U-Boot setting */
  30. #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
  31. #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
  32. #define CONFIG_SYS_MONITOR_LEN (128 * 1024)
  33. /* Size of DRAM reserved for malloc() use */
  34. #define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
  35. #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
  36. #undef CONFIG_SYS_FLASH_QUIET_TEST
  37. #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
  38. /* Timeout for Flash erase operations (in ms) */
  39. #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
  40. /* Timeout for Flash write operations (in ms) */
  41. #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
  42. /* Timeout for Flash set sector lock bit operations (in ms) */
  43. #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
  44. /* Timeout for Flash clear lock bit operations (in ms) */
  45. #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
  46. /* Use hardware flash sectors protection instead of U-Boot software protection */
  47. #undef CONFIG_SYS_DIRECT_FLASH_TFTP
  48. /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
  49. /* Clock */
  50. #define CONFIG_SYS_CLK_FREQ 66666666
  51. #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
  52. /* Ether */
  53. #define CONFIG_SH_ETHER_USE_PORT (1)
  54. #define CONFIG_SH_ETHER_PHY_ADDR (0x01)
  55. #define CONFIG_BITBANGMII
  56. #define CONFIG_BITBANGMII_MULTI
  57. #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
  58. #endif /* __SH7763RDP_H */