rk3188_common.h 1.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2015 Google, Inc
  4. */
  5. #ifndef __CONFIG_RK3188_COMMON_H
  6. #define __CONFIG_RK3188_COMMON_H
  7. #define CONFIG_SYS_CACHELINE_SIZE 64
  8. #include <asm/arch-rockchip/hardware.h>
  9. #include "rockchip-common.h"
  10. #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
  11. #define CONFIG_SYS_CBSIZE 1024
  12. #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
  13. /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
  14. #endif
  15. #define CONFIG_SYS_INIT_SP_ADDR 0x60100000
  16. #define CONFIG_SYS_LOAD_ADDR 0x60800800
  17. #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x8000 - 0x800)
  18. #define CONFIG_ROCKCHIP_CHIP_TAG "RK31"
  19. #define CONFIG_IRAM_BASE 0x10080000
  20. /* spl size 32kb sram - 2kb bootrom */
  21. #define CONFIG_SPL_MAX_SIZE (0x8000 - 0x800)
  22. #define CONFIG_ROCKCHIP_SERIAL 1
  23. #define CONFIG_SPL_STACK 0x10087fff
  24. #define CONFIG_SYS_SDRAM_BASE 0x60000000
  25. #define SDRAM_BANK_SIZE (2UL << 30)
  26. #define SDRAM_MAX_SIZE 0x80000000
  27. #ifndef CONFIG_SPL_BUILD
  28. /* usb otg */
  29. /* usb host support */
  30. #define ENV_MEM_LAYOUT_SETTINGS \
  31. "scriptaddr=0x60000000\0" \
  32. "pxefile_addr_r=0x60100000\0" \
  33. "fdt_addr_r=0x61f00000\0" \
  34. "kernel_addr_r=0x62000000\0" \
  35. "ramdisk_addr_r=0x64000000\0"
  36. #include <config_distro_bootcmd.h>
  37. /* Linux fails to load the fdt if it's loaded above 256M on a Rock board,
  38. * so limit the fdt reallocation to that */
  39. #define CONFIG_EXTRA_ENV_SETTINGS \
  40. "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
  41. "fdt_high=0x6fffffff\0" \
  42. "initrd_high=0x6fffffff\0" \
  43. "partitions=" PARTS_DEFAULT \
  44. ENV_MEM_LAYOUT_SETTINGS \
  45. ROCKCHIP_DEVICE_SETTINGS \
  46. BOOTENV
  47. #endif /* CONFIG_SPL_BUILD */
  48. #endif