picosam9g45.h 3.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Configuration settings for the mini-box PICOSAM9G45 board.
  4. * (C) Copyright 2015 Inter Act B.V.
  5. *
  6. * Based on:
  7. * U-Boot file: include/configs/at91sam9m10g45ek.h
  8. * (C) Copyright 2007-2008
  9. * Stelian Pop <stelian@popies.net>
  10. * Lead Tech Design <www.leadtechdesign.com>
  11. */
  12. #ifndef __CONFIG_H
  13. #define __CONFIG_H
  14. #include <asm/hardware.h>
  15. #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
  16. /* ARM asynchronous clock */
  17. #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
  18. #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
  19. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  20. #define CONFIG_SETUP_MEMORY_TAGS
  21. #define CONFIG_INITRD_TAG
  22. #define CONFIG_SKIP_LOWLEVEL_INIT
  23. /* general purpose I/O */
  24. #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
  25. #define CONFIG_AT91_GPIO
  26. #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
  27. /* serial console */
  28. #define CONFIG_ATMEL_USART
  29. #define CONFIG_USART_BASE ATMEL_BASE_DBGU
  30. #define CONFIG_USART_ID ATMEL_ID_SYS
  31. /* LCD */
  32. #define LCD_BPP LCD_COLOR8
  33. #define CONFIG_LCD_LOGO
  34. #undef LCD_TEST_PATTERN
  35. #define CONFIG_LCD_INFO
  36. #define CONFIG_LCD_INFO_BELOW_LOGO
  37. #define CONFIG_ATMEL_LCD
  38. #define CONFIG_ATMEL_LCD_RGB565
  39. /* board specific(not enough SRAM) */
  40. #define CONFIG_AT91SAM9G45_LCD_BASE 0x23E00000
  41. /* LED */
  42. #define CONFIG_AT91_LED
  43. #define CONFIG_GREEN_LED AT91_PIN_PD31 /* this is the user1 led */
  44. /*
  45. * BOOTP options
  46. */
  47. #define CONFIG_BOOTP_BOOTFILESIZE
  48. /*
  49. * Command line configuration.
  50. */
  51. /* SDRAM */
  52. #define PHYS_SDRAM_1 ATMEL_BASE_CS1 /* on DDRSDRC1 */
  53. #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
  54. #define PHYS_SDRAM_2 ATMEL_BASE_CS6 /* on DDRSDRC0 */
  55. #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
  56. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  57. #define CONFIG_SYS_INIT_SP_ADDR \
  58. (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
  59. /* MMC */
  60. #ifdef CONFIG_CMD_MMC
  61. #define CONFIG_GENERIC_ATMEL_MCI
  62. #endif
  63. /* Ethernet */
  64. #define CONFIG_MACB
  65. #define CONFIG_RMII
  66. #define CONFIG_NET_RETRY_COUNT 20
  67. #define CONFIG_RESET_PHY_R
  68. #define CONFIG_AT91_WANTS_COMMON_PHY
  69. #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
  70. #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
  71. #define CONFIG_SYS_MEMTEST_END 0x23e00000
  72. #ifdef CONFIG_SYS_USE_MMC
  73. /* bootstrap + u-boot + env + linux in mmc */
  74. #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \
  75. "fatload mmc 0:1 0x22000000 zImage; " \
  76. "bootz 0x22000000 - 0x21000000"
  77. #endif
  78. /*
  79. * Size of malloc() pool
  80. */
  81. #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
  82. /* Defines for SPL */
  83. #define CONFIG_SPL_MAX_SIZE 0x010000
  84. #define CONFIG_SPL_STACK 0x310000
  85. #define CONFIG_SYS_MONITOR_LEN 0x80000
  86. #ifdef CONFIG_SYS_USE_MMC
  87. #define CONFIG_SPL_BSS_START_ADDR 0x20000000
  88. #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000
  89. #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
  90. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
  91. #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
  92. #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
  93. #define CONFIG_SPL_ATMEL_SIZE
  94. #define CONFIG_SYS_MASTER_CLOCK 132096000
  95. #define CONFIG_SYS_AT91_PLLA 0x20c73f03
  96. #define CONFIG_SYS_MCKR 0x1301
  97. #define CONFIG_SYS_MCKR_CSS 0x1302
  98. #endif
  99. #endif