pcm058.h 1.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) Stefano Babic <sbabic@denx.de>
  4. */
  5. #ifndef __PCM058_CONFIG_H
  6. #define __PCM058_CONFIG_H
  7. #ifdef CONFIG_SPL
  8. #include "imx6_spl.h"
  9. #endif
  10. #include "mx6_common.h"
  11. /* Thermal */
  12. #define CONFIG_IMX_THERMAL
  13. /* Serial */
  14. #define CONFIG_MXC_UART
  15. #define CONFIG_MXC_UART_BASE UART2_BASE
  16. #define CONSOLE_DEV "ttymxc1"
  17. #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
  18. /* Early setup */
  19. /* Size of malloc() pool */
  20. #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
  21. /* Ethernet */
  22. #define CONFIG_FEC_MXC
  23. #define IMX_FEC_BASE ENET_BASE_ADDR
  24. #define CONFIG_FEC_XCV_TYPE RGMII
  25. #define CONFIG_ETHPRIME "FEC"
  26. #define CONFIG_FEC_MXC_PHYADDR 3
  27. /* SPI Flash */
  28. /* I2C Configs */
  29. #define CONFIG_SYS_I2C
  30. #define CONFIG_SYS_I2C_MXC
  31. #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */
  32. #define CONFIG_SYS_I2C_SPEED 100000
  33. #ifndef CONFIG_SPL_BUILD
  34. /* Enable NAND support */
  35. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  36. #define CONFIG_SYS_NAND_BASE 0x40000000
  37. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  38. #define CONFIG_SYS_NAND_ONFI_DETECTION
  39. #endif
  40. /* DMA stuff, needed for GPMI/MXS NAND support */
  41. /* Filesystem support */
  42. /* Physical Memory Map */
  43. #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
  44. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
  45. #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
  46. #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
  47. #define CONFIG_SYS_INIT_SP_OFFSET \
  48. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  49. #define CONFIG_SYS_INIT_SP_ADDR \
  50. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  51. /* MMC Configs */
  52. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  53. #define CONFIG_SYS_FSL_USDHC_NUM 1
  54. /* Environment organization */
  55. #endif