pcl063_ull.h 2.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Board configuration file for Phytec phyBOARD-i.MX6ULL-Segin SBC
  4. * Copyright (C) 2019 Parthiban Nallathambi <parthitce@gmail.com>
  5. *
  6. * Based on include/configs/xpress.h:
  7. * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
  8. */
  9. #ifndef __PCL063_ULL_H
  10. #define __PCL063_ULL_H
  11. #include <linux/sizes.h>
  12. #include "mx6_common.h"
  13. /* SPL options */
  14. #include "imx6_spl.h"
  15. #define CONFIG_SYS_FSL_USDHC_NUM 2
  16. /* Size of malloc() pool */
  17. #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
  18. /* Environment settings */
  19. /* Environment in SD */
  20. #define CONFIG_SYS_MMC_ENV_DEV 0
  21. #define CONFIG_SYS_MMC_ENV_PART 0
  22. #define MMC_ROOTFS_DEV 0
  23. #define MMC_ROOTFS_PART 2
  24. /* Console configs */
  25. #define CONFIG_MXC_UART_BASE UART1_BASE
  26. /* MMC Configs */
  27. #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
  28. #define CONFIG_SUPPORT_EMMC_BOOT
  29. /* I2C configs */
  30. #ifdef CONFIG_CMD_I2C
  31. #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
  32. #define CONFIG_SYS_I2C_SPEED 100000
  33. #endif
  34. /* Miscellaneous configurable options */
  35. #define CONFIG_SYS_MEMTEST_START 0x80000000
  36. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000)
  37. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  38. #define CONFIG_SYS_HZ 1000
  39. /* Physical Memory Map */
  40. #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
  41. #define PHYS_SDRAM_SIZE SZ_256M
  42. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
  43. #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
  44. #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
  45. #define CONFIG_SYS_INIT_SP_OFFSET \
  46. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  47. #define CONFIG_SYS_INIT_SP_ADDR \
  48. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  49. /* NAND */
  50. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  51. #define CONFIG_SYS_NAND_BASE 0x40000000
  52. /* USB Configs */
  53. #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  54. #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
  55. #define CONFIG_MXC_USB_FLAGS 0
  56. #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
  57. #define CONFIG_IMX_THERMAL
  58. #define ENV_MMC \
  59. "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \
  60. "mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \
  61. "fitpart=1\0" \
  62. "bootdelay=3\0" \
  63. "silent=1\0" \
  64. "optargs=rw rootwait\0" \
  65. "mmcautodetect=yes\0" \
  66. "mmcrootfstype=ext4\0" \
  67. "mmcfit_name=fitImage\0" \
  68. "mmcloadfit=fatload mmc ${mmcdev}:${fitpart} ${fit_addr} " \
  69. "${mmcfit_name}\0" \
  70. "mmcargs=setenv bootargs " \
  71. "root=/dev/mmcblk${mmcdev}p${mmcpart} ${optargs} " \
  72. "console=${console} rootfstype=${mmcrootfstype}\0" \
  73. "mmc_mmc_fit=run mmcloadfit;run mmcargs addcon; bootm ${fit_addr}\0" \
  74. /* Default environment */
  75. #define CONFIG_EXTRA_ENV_SETTINGS \
  76. "fdt_high=0xffffffff\0" \
  77. "console=ttymxc0,115200n8\0" \
  78. "addcon=setenv bootargs ${bootargs} console=${console},${baudrate}\0" \
  79. "fit_addr=0x82000000\0" \
  80. ENV_MMC
  81. #define CONFIG_BOOTCOMMAND "run mmc_mmc_fit"
  82. #define BOOT_TARGET_DEVICES(func) \
  83. func(MMC, mmc, 0) \
  84. func(MMC, mmc, 1) \
  85. func(DHCP, dhcp, na)
  86. #include <config_distro_bootcmd.h>
  87. #endif /* __PCL063_ULL_H */