omap3_igep00x0.h 2.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Common configuration settings for IGEP technology based boards
  4. *
  5. * (C) Copyright 2012
  6. * ISEE 2007 SL, <www.iseebcn.com>
  7. */
  8. #ifndef __IGEP00X0_H
  9. #define __IGEP00X0_H
  10. #include <configs/ti_omap3_common.h>
  11. /*
  12. * We are only ever GP parts and will utilize all of the "downloaded image"
  13. * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
  14. */
  15. #define CONFIG_REVISION_TAG 1
  16. /* TPS65950 */
  17. #define PBIASLITEVMODE1 (1 << 8)
  18. /* LED */
  19. #define IGEP0020_GPIO_LED 27
  20. #define IGEP0030_GPIO_LED 16
  21. /* Board and revision detection GPIOs */
  22. #define IGEP0030_USB_TRANSCEIVER_RESET 54
  23. #define GPIO_IGEP00X0_BOARD_DETECTION 28
  24. #define GPIO_IGEP00X0_REVISION_DETECTION 129
  25. #ifndef CONFIG_SPL_BUILD
  26. /* Environment */
  27. #define ENV_DEVICE_SETTINGS \
  28. "stdin=serial\0" \
  29. "stdout=serial\0" \
  30. "stderr=serial\0"
  31. #define MEM_LAYOUT_SETTINGS \
  32. DEFAULT_LINUX_BOOT_ENV \
  33. "scriptaddr=0x87E00000\0" \
  34. "pxefile_addr_r=0x87F00000\0"
  35. #define BOOT_TARGET_DEVICES(func) \
  36. func(MMC, mmc, 0)
  37. #include <config_distro_bootcmd.h>
  38. #define ENV_FINDFDT \
  39. "findfdt="\
  40. "if test ${board_name} = igep0020; then " \
  41. "if test ${board_rev} = F; then " \
  42. "setenv fdtfile omap3-igep0020-rev-f.dtb; " \
  43. "else " \
  44. "setenv fdtfile omap3-igep0020.dtb; fi; fi; " \
  45. "if test ${board_name} = igep0030; then " \
  46. "if test ${board_rev} = G; then " \
  47. "setenv fdtfile omap3-igep0030-rev-g.dtb; " \
  48. "else " \
  49. "setenv fdtfile omap3-igep0030.dtb; fi; fi; " \
  50. "if test ${fdtfile} = ''; then " \
  51. "echo WARNING: Could not determine device tree to use; fi; \0"
  52. #define CONFIG_EXTRA_ENV_SETTINGS \
  53. ENV_FINDFDT \
  54. ENV_DEVICE_SETTINGS \
  55. MEM_LAYOUT_SETTINGS \
  56. BOOTENV
  57. #endif
  58. #define CONFIG_SYS_MTDPARTS_RUNTIME
  59. /* OneNAND config */
  60. #define CONFIG_USE_ONENAND_BOARD_INIT
  61. #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
  62. #define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024)
  63. /* NAND config */
  64. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  65. #define CONFIG_SYS_NAND_PAGE_COUNT 64
  66. #define CONFIG_SYS_NAND_PAGE_SIZE 2048
  67. #define CONFIG_SYS_NAND_OOBSIZE 64
  68. #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
  69. #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
  70. #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
  71. 10, 11, 12, 13, 14, 15, 16, 17, \
  72. 18, 19, 20, 21, 22, 23, 24, 25, \
  73. 26, 27, 28, 29, 30, 31, 32, 33, \
  74. 34, 35, 36, 37, 38, 39, 40, 41, \
  75. 42, 43, 44, 45, 46, 47, 48, 49, \
  76. 50, 51, 52, 53, 54, 55, 56, 57, }
  77. #define CONFIG_SYS_NAND_ECCSIZE 512
  78. #define CONFIG_SYS_NAND_ECCBYTES 14
  79. #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
  80. #endif /* __IGEP00X0_H */